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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/arm/mach-h720x/include/mach/entry-macro.S
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/*

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 * arch/arm/mach-h720x/include/mach/entry-macro.S

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 *

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 * Low-level IRQ helper macros for Hynix HMS720x based platforms

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 *

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 * This file is licensed under  the terms of the GNU General Public

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 * License version 2. This program is licensed "as is" without any

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 * warranty of any kind, whether express or implied.

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 */

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		.macro  disable_fiq

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		.endm

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		.macro  get_irqnr_preamble, base, tmp

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		.endm

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		.macro  arch_ret_to_user, tmp1, tmp2

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		.endm

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		.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp

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#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)

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		@ we could use the id register on H7202, but this is not

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		@ properly updated when we come back from asm_do_irq

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		@ without a previous return from interrupt

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		@ (see loops below in irq_svc, irq_usr)

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		@ We see unmasked pending ints only, as the masked pending ints

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		@ are not visible here

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		mov     \base, #0xf0000000	       @ base register

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		orr     \base, \base, #0x24000	       @ irqbase

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		ldr     \irqstat, [\base, #0x04]        @ get interrupt status

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#if defined (CONFIG_CPU_H7201)

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		ldr	\tmp, =0x001fffff

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#else

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		mvn     \tmp, #0xc0000000

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#endif

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		and     \irqstat, \irqstat, \tmp        @ mask out unused ints

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		mov     \irqnr, #0

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		mov     \tmp, #0xff00

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		orr     \tmp, \tmp, #0xff

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		tst     \irqstat, \tmp

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		addeq   \irqnr, \irqnr, #16

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		moveq   \irqstat, \irqstat, lsr #16

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		tst     \irqstat, #255

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		addeq   \irqnr, \irqnr, #8

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		moveq   \irqstat, \irqstat, lsr #8

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		tst     \irqstat, #15

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		addeq   \irqnr, \irqnr, #4

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		moveq   \irqstat, \irqstat, lsr #4

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		tst     \irqstat, #3

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		addeq   \irqnr, \irqnr, #2

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		moveq   \irqstat, \irqstat, lsr #2

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		tst     \irqstat, #1

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		addeq   \irqnr, \irqnr, #1

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		moveq   \irqstat, \irqstat, lsr #1

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		tst     \irqstat, #1		       @ bit 0 should be set

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		.endm

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		.macro  irq_prio_table

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		.endm

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#else

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#error hynix processor selection missmatch

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#endif

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