Path: blob/master/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
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/*1* Copyright (C) 2010 Eric Benard - [email protected]2*3* Based on pcm970-baseboard.c which is :4* Copyright (C) 2008 Juergen Beisert ([email protected])5*6* This program is free software; you can redistribute it and/or7* modify it under the terms of the GNU General Public License8* as published by the Free Software Foundation; either version 29* of the License, or (at your option) any later version.10* This program is distributed in the hope that it will be useful,11* but WITHOUT ANY WARRANTY; without even the implied warranty of12* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the13* GNU General Public License for more details.14*15* You should have received a copy of the GNU General Public License16* along with this program; if not, write to the Free Software17* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,18* MA 02110-1301, USA.19*/2021#include <linux/types.h>22#include <linux/init.h>2324#include <linux/gpio.h>25#include <linux/interrupt.h>26#include <linux/leds.h>27#include <linux/platform_device.h>28#include <linux/input.h>29#include <video/platform_lcd.h>30#include <linux/i2c.h>3132#include <asm/mach-types.h>33#include <asm/mach/arch.h>34#include <asm/mach/time.h>35#include <asm/mach/map.h>3637#include <mach/hardware.h>38#include <mach/common.h>39#include <mach/iomux-mx35.h>40#include <mach/audmux.h>4142#include "devices-imx35.h"4344static const struct fb_videomode fb_modedb[] = {45{46.name = "CMO-QVGA",47.refresh = 60,48.xres = 320,49.yres = 240,50.pixclock = KHZ2PICOS(6500),51.left_margin = 68,52.right_margin = 20,53.upper_margin = 15,54.lower_margin = 4,55.hsync_len = 30,56.vsync_len = 3,57.sync = 0,58.vmode = FB_VMODE_NONINTERLACED,59.flag = 0,60},61{62.name = "DVI-VGA",63.refresh = 60,64.xres = 640,65.yres = 480,66.pixclock = 32000,67.left_margin = 100,68.right_margin = 100,69.upper_margin = 7,70.lower_margin = 100,71.hsync_len = 7,72.vsync_len = 7,73.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |74FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,75.vmode = FB_VMODE_NONINTERLACED,76.flag = 0,77},78{79.name = "DVI-SVGA",80.refresh = 60,81.xres = 800,82.yres = 600,83.pixclock = 25000,84.left_margin = 75,85.right_margin = 75,86.upper_margin = 7,87.lower_margin = 75,88.hsync_len = 7,89.vsync_len = 7,90.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |91FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,92.vmode = FB_VMODE_NONINTERLACED,93.flag = 0,94},95};9697static const struct ipu_platform_data mx3_ipu_data __initconst = {98.irq_base = MXC_IPU_IRQ_START,99};100101static struct mx3fb_platform_data mx3fb_pdata __initdata = {102.name = "CMO-QVGA",103.mode = fb_modedb,104.num_modes = ARRAY_SIZE(fb_modedb),105};106107static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {108/* LCD */109MX35_PAD_LD0__IPU_DISPB_DAT_0,110MX35_PAD_LD1__IPU_DISPB_DAT_1,111MX35_PAD_LD2__IPU_DISPB_DAT_2,112MX35_PAD_LD3__IPU_DISPB_DAT_3,113MX35_PAD_LD4__IPU_DISPB_DAT_4,114MX35_PAD_LD5__IPU_DISPB_DAT_5,115MX35_PAD_LD6__IPU_DISPB_DAT_6,116MX35_PAD_LD7__IPU_DISPB_DAT_7,117MX35_PAD_LD8__IPU_DISPB_DAT_8,118MX35_PAD_LD9__IPU_DISPB_DAT_9,119MX35_PAD_LD10__IPU_DISPB_DAT_10,120MX35_PAD_LD11__IPU_DISPB_DAT_11,121MX35_PAD_LD12__IPU_DISPB_DAT_12,122MX35_PAD_LD13__IPU_DISPB_DAT_13,123MX35_PAD_LD14__IPU_DISPB_DAT_14,124MX35_PAD_LD15__IPU_DISPB_DAT_15,125MX35_PAD_LD16__IPU_DISPB_DAT_16,126MX35_PAD_LD17__IPU_DISPB_DAT_17,127MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,128MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,129MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,130MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,131/* Backlight */132MX35_PAD_CONTRAST__IPU_DISPB_CONTR,133/* LCD_PWR */134MX35_PAD_D3_CLS__GPIO1_4,135/* LED */136MX35_PAD_LD23__GPIO3_29,137/* SWITCH */138MX35_PAD_LD19__GPIO3_25,139/* UART2 */140MX35_PAD_CTS2__UART2_CTS,141MX35_PAD_RTS2__UART2_RTS,142MX35_PAD_TXD2__UART2_TXD_MUX,143MX35_PAD_RXD2__UART2_RXD_MUX,144/* I2S */145MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,146MX35_PAD_STXD4__AUDMUX_AUD4_TXD,147MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,148MX35_PAD_SCK4__AUDMUX_AUD4_TXC,149/* CAN2 */150MX35_PAD_TX5_RX0__CAN2_TXCAN,151MX35_PAD_TX4_RX1__CAN2_RXCAN,152/* SDCARD */153MX35_PAD_SD1_CMD__ESDHC1_CMD,154MX35_PAD_SD1_CLK__ESDHC1_CLK,155MX35_PAD_SD1_DATA0__ESDHC1_DAT0,156MX35_PAD_SD1_DATA1__ESDHC1_DAT1,157MX35_PAD_SD1_DATA2__ESDHC1_DAT2,158MX35_PAD_SD1_DATA3__ESDHC1_DAT3,159/* SD1 CD */160MX35_PAD_LD18__GPIO3_24,161};162163#define GPIO_LED1 IMX_GPIO_NR(3, 29)164#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)165#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)166#define GPIO_SD1CD IMX_GPIO_NR(3, 24)167168static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,169unsigned int power)170{171if (power)172gpio_direction_output(GPIO_LCDPWR, 1);173else174gpio_direction_output(GPIO_LCDPWR, 0);175}176177static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {178.set_power = eukrea_mbimxsd_lcd_power_set,179};180181static struct platform_device eukrea_mbimxsd_lcd_powerdev = {182.name = "platform-lcd",183.dev.platform_data = &eukrea_mbimxsd_lcd_power_data,184};185186static struct gpio_led eukrea_mbimxsd_leds[] = {187{188.name = "led1",189.default_trigger = "heartbeat",190.active_low = 1,191.gpio = GPIO_LED1,192},193};194195static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {196.leds = eukrea_mbimxsd_leds,197.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),198};199200static struct platform_device eukrea_mbimxsd_leds_gpio = {201.name = "leds-gpio",202.id = -1,203.dev = {204.platform_data = &eukrea_mbimxsd_led_info,205},206};207208static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {209{210.gpio = GPIO_SWITCH1,211.code = BTN_0,212.desc = "BP1",213.active_low = 1,214.wakeup = 1,215},216};217218static const struct gpio_keys_platform_data219eukrea_mbimxsd_button_data __initconst = {220.buttons = eukrea_mbimxsd_gpio_buttons,221.nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),222};223224static struct platform_device *platform_devices[] __initdata = {225&eukrea_mbimxsd_leds_gpio,226&eukrea_mbimxsd_lcd_powerdev,227};228229static const struct imxuart_platform_data uart_pdata __initconst = {230.flags = IMXUART_HAVE_RTSCTS,231};232233static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {234{235I2C_BOARD_INFO("tlv320aic23", 0x1a),236},237};238239static const240struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {241.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,242};243244static struct esdhc_platform_data sd1_pdata = {245.cd_gpio = GPIO_SD1CD,246.wp_gpio = -EINVAL,247};248249/*250* system init for baseboard usage. Will be called by cpuimx35 init.251*252* Add platform devices present on this baseboard and init253* them from CPU side as far as required to use them later on254*/255void __init eukrea_mbimxsd35_baseboard_init(void)256{257if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,258ARRAY_SIZE(eukrea_mbimxsd_pads)))259printk(KERN_ERR "error setting mbimxsd pads !\n");260261#if defined(CONFIG_SND_SOC_EUKREA_TLV320)262/* SSI unit master I2S codec connected to SSI_AUD4 */263mxc_audmux_v2_configure_port(0,264MXC_AUDMUX_V2_PTCR_SYN |265MXC_AUDMUX_V2_PTCR_TFSDIR |266MXC_AUDMUX_V2_PTCR_TFSEL(3) |267MXC_AUDMUX_V2_PTCR_TCLKDIR |268MXC_AUDMUX_V2_PTCR_TCSEL(3),269MXC_AUDMUX_V2_PDCR_RXDSEL(3)270);271mxc_audmux_v2_configure_port(3,272MXC_AUDMUX_V2_PTCR_SYN,273MXC_AUDMUX_V2_PDCR_RXDSEL(0)274);275#endif276277imx35_add_imx_uart1(&uart_pdata);278imx35_add_ipu_core(&mx3_ipu_data);279imx35_add_mx3_sdc_fb(&mx3fb_pdata);280281imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);282283imx35_add_flexcan1(NULL);284imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);285286gpio_request(GPIO_LED1, "LED1");287gpio_direction_output(GPIO_LED1, 1);288gpio_free(GPIO_LED1);289290gpio_request(GPIO_SWITCH1, "SWITCH1");291gpio_direction_input(GPIO_SWITCH1);292gpio_free(GPIO_SWITCH1);293294gpio_request(GPIO_LCDPWR, "LCDPWR");295gpio_direction_output(GPIO_LCDPWR, 1);296297i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,298ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));299300platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));301imx_add_gpio_keys(&eukrea_mbimxsd_button_data);302}303304305