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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/arm/mach-imx/mach-armadillo5x0.c
10819 views
1
/*
2
* armadillo5x0.c
3
*
4
* Copyright 2009 Alberto Panizzo <[email protected]>
5
* updates in http://alberdroid.blogspot.com/
6
*
7
* Based on Atmark Techno, Inc. armadillo 500 BSP 2008
8
* Based on mx31ads.c and pcm037.c Great Work!
9
*
10
* This program is free software; you can redistribute it and/or modify
11
* it under the terms of the GNU General Public License as published by
12
* the Free Software Foundation; either version 2 of the License, or
13
* (at your option) any later version.
14
*
15
* This program is distributed in the hope that it will be useful,
16
* but WITHOUT ANY WARRANTY; without even the implied warranty of
17
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18
* GNU General Public License for more details.
19
*
20
* You should have received a copy of the GNU General Public License
21
* along with this program; if not, write to the Free Software
22
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
23
* MA 02110-1301, USA.
24
*/
25
26
#include <linux/types.h>
27
#include <linux/init.h>
28
#include <linux/clk.h>
29
#include <linux/platform_device.h>
30
#include <linux/gpio.h>
31
#include <linux/smsc911x.h>
32
#include <linux/interrupt.h>
33
#include <linux/irq.h>
34
#include <linux/mtd/physmap.h>
35
#include <linux/io.h>
36
#include <linux/input.h>
37
#include <linux/i2c.h>
38
#include <linux/usb/otg.h>
39
#include <linux/usb/ulpi.h>
40
#include <linux/delay.h>
41
42
#include <mach/hardware.h>
43
#include <asm/mach-types.h>
44
#include <asm/mach/arch.h>
45
#include <asm/mach/time.h>
46
#include <asm/memory.h>
47
#include <asm/mach/map.h>
48
49
#include <mach/common.h>
50
#include <mach/iomux-mx3.h>
51
#include <mach/ulpi.h>
52
53
#include "devices-imx31.h"
54
#include "crmregs-imx31.h"
55
56
static int armadillo5x0_pins[] = {
57
/* UART1 */
58
MX31_PIN_CTS1__CTS1,
59
MX31_PIN_RTS1__RTS1,
60
MX31_PIN_TXD1__TXD1,
61
MX31_PIN_RXD1__RXD1,
62
/* UART2 */
63
MX31_PIN_CTS2__CTS2,
64
MX31_PIN_RTS2__RTS2,
65
MX31_PIN_TXD2__TXD2,
66
MX31_PIN_RXD2__RXD2,
67
/* LAN9118_IRQ */
68
IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
69
/* SDHC1 */
70
MX31_PIN_SD1_DATA3__SD1_DATA3,
71
MX31_PIN_SD1_DATA2__SD1_DATA2,
72
MX31_PIN_SD1_DATA1__SD1_DATA1,
73
MX31_PIN_SD1_DATA0__SD1_DATA0,
74
MX31_PIN_SD1_CLK__SD1_CLK,
75
MX31_PIN_SD1_CMD__SD1_CMD,
76
/* Framebuffer */
77
MX31_PIN_LD0__LD0,
78
MX31_PIN_LD1__LD1,
79
MX31_PIN_LD2__LD2,
80
MX31_PIN_LD3__LD3,
81
MX31_PIN_LD4__LD4,
82
MX31_PIN_LD5__LD5,
83
MX31_PIN_LD6__LD6,
84
MX31_PIN_LD7__LD7,
85
MX31_PIN_LD8__LD8,
86
MX31_PIN_LD9__LD9,
87
MX31_PIN_LD10__LD10,
88
MX31_PIN_LD11__LD11,
89
MX31_PIN_LD12__LD12,
90
MX31_PIN_LD13__LD13,
91
MX31_PIN_LD14__LD14,
92
MX31_PIN_LD15__LD15,
93
MX31_PIN_LD16__LD16,
94
MX31_PIN_LD17__LD17,
95
MX31_PIN_VSYNC3__VSYNC3,
96
MX31_PIN_HSYNC__HSYNC,
97
MX31_PIN_FPSHIFT__FPSHIFT,
98
MX31_PIN_DRDY0__DRDY0,
99
IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
100
/* I2C2 */
101
MX31_PIN_CSPI2_MOSI__SCL,
102
MX31_PIN_CSPI2_MISO__SDA,
103
/* OTG */
104
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
105
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
106
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
107
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
108
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
109
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
110
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
111
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
112
MX31_PIN_USBOTG_CLK__USBOTG_CLK,
113
MX31_PIN_USBOTG_DIR__USBOTG_DIR,
114
MX31_PIN_USBOTG_NXT__USBOTG_NXT,
115
MX31_PIN_USBOTG_STP__USBOTG_STP,
116
/* USB host 2 */
117
IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
118
IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
119
IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
120
IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
121
IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
122
IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
123
IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
124
IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
125
IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
126
IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
127
IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
128
IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
129
};
130
131
/* USB */
132
133
#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
134
#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
135
#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
136
137
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
138
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
139
140
static int usbotg_init(struct platform_device *pdev)
141
{
142
int err;
143
144
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
145
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
146
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
147
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
148
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
149
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
150
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
151
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
152
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
153
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
154
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
155
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
156
157
/* Chip already enabled by hardware */
158
/* OTG phy reset*/
159
err = gpio_request(OTG_RESET, "USB-OTG-RESET");
160
if (err) {
161
pr_err("Failed to request the usb otg reset gpio\n");
162
return err;
163
}
164
165
err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
166
if (err) {
167
pr_err("Failed to reset the usb otg phy\n");
168
goto otg_free_reset;
169
}
170
171
gpio_set_value(OTG_RESET, 0/*LOW*/);
172
mdelay(5);
173
gpio_set_value(OTG_RESET, 1/*HIGH*/);
174
mdelay(10);
175
176
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
177
MXC_EHCI_INTERFACE_DIFF_UNI);
178
179
otg_free_reset:
180
gpio_free(OTG_RESET);
181
return err;
182
}
183
184
static int usbh2_init(struct platform_device *pdev)
185
{
186
int err;
187
188
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
189
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
190
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
191
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
192
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
193
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
194
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
195
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
196
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
197
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
198
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
199
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
200
201
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
202
203
204
/* Enable the chip */
205
err = gpio_request(USBH2_CS, "USB-H2-CS");
206
if (err) {
207
pr_err("Failed to request the usb host 2 CS gpio\n");
208
return err;
209
}
210
211
err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
212
if (err) {
213
pr_err("Failed to drive the usb host 2 CS gpio\n");
214
goto h2_free_cs;
215
}
216
217
/* H2 phy reset*/
218
err = gpio_request(USBH2_RESET, "USB-H2-RESET");
219
if (err) {
220
pr_err("Failed to request the usb host 2 reset gpio\n");
221
goto h2_free_cs;
222
}
223
224
err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
225
if (err) {
226
pr_err("Failed to reset the usb host 2 phy\n");
227
goto h2_free_reset;
228
}
229
230
gpio_set_value(USBH2_RESET, 0/*LOW*/);
231
mdelay(5);
232
gpio_set_value(USBH2_RESET, 1/*HIGH*/);
233
mdelay(10);
234
235
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
236
MXC_EHCI_INTERFACE_DIFF_UNI);
237
238
h2_free_reset:
239
gpio_free(USBH2_RESET);
240
h2_free_cs:
241
gpio_free(USBH2_CS);
242
return err;
243
}
244
245
static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
246
.init = usbotg_init,
247
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
248
};
249
250
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
251
.init = usbh2_init,
252
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
253
};
254
255
/* RTC over I2C*/
256
#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
257
258
static struct i2c_board_info armadillo5x0_i2c_rtc = {
259
I2C_BOARD_INFO("s35390a", 0x30),
260
};
261
262
/* GPIO BUTTONS */
263
static struct gpio_keys_button armadillo5x0_buttons[] = {
264
{
265
.code = KEY_ENTER, /*28*/
266
.gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
267
.active_low = 1,
268
.desc = "menu",
269
.wakeup = 1,
270
}, {
271
.code = KEY_BACK, /*158*/
272
.gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
273
.active_low = 1,
274
.desc = "back",
275
.wakeup = 1,
276
}
277
};
278
279
static const struct gpio_keys_platform_data
280
armadillo5x0_button_data __initconst = {
281
.buttons = armadillo5x0_buttons,
282
.nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
283
};
284
285
/*
286
* NAND Flash
287
*/
288
static const struct mxc_nand_platform_data
289
armadillo5x0_nand_board_info __initconst = {
290
.width = 1,
291
.hw_ecc = 1,
292
};
293
294
/*
295
* MTD NOR Flash
296
*/
297
static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
298
{
299
.name = "nor.bootloader",
300
.offset = 0x00000000,
301
.size = 4*32*1024,
302
}, {
303
.name = "nor.kernel",
304
.offset = MTDPART_OFS_APPEND,
305
.size = 16*128*1024,
306
}, {
307
.name = "nor.userland",
308
.offset = MTDPART_OFS_APPEND,
309
.size = 110*128*1024,
310
}, {
311
.name = "nor.config",
312
.offset = MTDPART_OFS_APPEND,
313
.size = 1*128*1024,
314
},
315
};
316
317
static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
318
.width = 2,
319
.parts = armadillo5x0_nor_flash_partitions,
320
.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
321
};
322
323
static struct resource armadillo5x0_nor_flash_resource = {
324
.flags = IORESOURCE_MEM,
325
.start = MX31_CS0_BASE_ADDR,
326
.end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
327
};
328
329
static struct platform_device armadillo5x0_nor_flash = {
330
.name = "physmap-flash",
331
.id = -1,
332
.num_resources = 1,
333
.resource = &armadillo5x0_nor_flash_resource,
334
};
335
336
/*
337
* FB support
338
*/
339
static const struct fb_videomode fb_modedb[] = {
340
{ /* 640x480 @ 60 Hz */
341
.name = "CRT-VGA",
342
.refresh = 60,
343
.xres = 640,
344
.yres = 480,
345
.pixclock = 39721,
346
.left_margin = 35,
347
.right_margin = 115,
348
.upper_margin = 43,
349
.lower_margin = 1,
350
.hsync_len = 10,
351
.vsync_len = 1,
352
.sync = FB_SYNC_OE_ACT_HIGH,
353
.vmode = FB_VMODE_NONINTERLACED,
354
.flag = 0,
355
}, {/* 800x600 @ 56 Hz */
356
.name = "CRT-SVGA",
357
.refresh = 56,
358
.xres = 800,
359
.yres = 600,
360
.pixclock = 30000,
361
.left_margin = 30,
362
.right_margin = 108,
363
.upper_margin = 13,
364
.lower_margin = 10,
365
.hsync_len = 10,
366
.vsync_len = 1,
367
.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
368
FB_SYNC_VERT_HIGH_ACT,
369
.vmode = FB_VMODE_NONINTERLACED,
370
.flag = 0,
371
},
372
};
373
374
static const struct ipu_platform_data mx3_ipu_data __initconst = {
375
.irq_base = MXC_IPU_IRQ_START,
376
};
377
378
static struct mx3fb_platform_data mx3fb_pdata __initdata = {
379
.name = "CRT-VGA",
380
.mode = fb_modedb,
381
.num_modes = ARRAY_SIZE(fb_modedb),
382
};
383
384
/*
385
* SDHC 1
386
* MMC support
387
*/
388
static int armadillo5x0_sdhc1_get_ro(struct device *dev)
389
{
390
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
391
}
392
393
static int armadillo5x0_sdhc1_init(struct device *dev,
394
irq_handler_t detect_irq, void *data)
395
{
396
int ret;
397
int gpio_det, gpio_wp;
398
399
gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
400
gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
401
402
ret = gpio_request(gpio_det, "sdhc-card-detect");
403
if (ret)
404
return ret;
405
406
gpio_direction_input(gpio_det);
407
408
ret = gpio_request(gpio_wp, "sdhc-write-protect");
409
if (ret)
410
goto err_gpio_free;
411
412
gpio_direction_input(gpio_wp);
413
414
/* When supported the trigger type have to be BOTH */
415
ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
416
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
417
"sdhc-detect", data);
418
419
if (ret)
420
goto err_gpio_free_2;
421
422
return 0;
423
424
err_gpio_free_2:
425
gpio_free(gpio_wp);
426
427
err_gpio_free:
428
gpio_free(gpio_det);
429
430
return ret;
431
432
}
433
434
static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
435
{
436
free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
437
gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
438
gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
439
}
440
441
static const struct imxmmc_platform_data sdhc_pdata __initconst = {
442
.get_ro = armadillo5x0_sdhc1_get_ro,
443
.init = armadillo5x0_sdhc1_init,
444
.exit = armadillo5x0_sdhc1_exit,
445
};
446
447
/*
448
* SMSC 9118
449
* Network support
450
*/
451
static struct resource armadillo5x0_smc911x_resources[] = {
452
{
453
.start = MX31_CS3_BASE_ADDR,
454
.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
455
.flags = IORESOURCE_MEM,
456
}, {
457
.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
458
.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
459
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
460
},
461
};
462
463
static struct smsc911x_platform_config smsc911x_info = {
464
.flags = SMSC911X_USE_16BIT,
465
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
466
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
467
};
468
469
static struct platform_device armadillo5x0_smc911x_device = {
470
.name = "smsc911x",
471
.id = -1,
472
.num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
473
.resource = armadillo5x0_smc911x_resources,
474
.dev = {
475
.platform_data = &smsc911x_info,
476
},
477
};
478
479
/* UART device data */
480
static const struct imxuart_platform_data uart_pdata __initconst = {
481
.flags = IMXUART_HAVE_RTSCTS,
482
};
483
484
static struct platform_device *devices[] __initdata = {
485
&armadillo5x0_smc911x_device,
486
};
487
488
/*
489
* Perform board specific initializations
490
*/
491
static void __init armadillo5x0_init(void)
492
{
493
mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
494
ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
495
496
platform_add_devices(devices, ARRAY_SIZE(devices));
497
imx_add_gpio_keys(&armadillo5x0_button_data);
498
imx31_add_imx_i2c1(NULL);
499
500
/* Register UART */
501
imx31_add_imx_uart0(&uart_pdata);
502
imx31_add_imx_uart1(&uart_pdata);
503
504
/* SMSC9118 IRQ pin */
505
gpio_direction_input(MX31_PIN_GPIO1_0);
506
507
/* Register SDHC */
508
imx31_add_mxc_mmc(0, &sdhc_pdata);
509
510
/* Register FB */
511
imx31_add_ipu_core(&mx3_ipu_data);
512
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
513
514
/* Register NOR Flash */
515
mxc_register_device(&armadillo5x0_nor_flash,
516
&armadillo5x0_nor_flash_pdata);
517
518
/* Register NAND Flash */
519
imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
520
521
/* set NAND page size to 2k if not configured via boot mode pins */
522
__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
523
524
/* RTC */
525
/* Get RTC IRQ and register the chip */
526
if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
527
if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
528
armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
529
else
530
gpio_free(ARMADILLO5X0_RTC_GPIO);
531
}
532
if (armadillo5x0_i2c_rtc.irq == 0)
533
pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
534
i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
535
536
/* USB */
537
538
usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
539
ULPI_OTG_DRVVBUS_EXT);
540
if (usbotg_pdata.otg)
541
imx31_add_mxc_ehci_otg(&usbotg_pdata);
542
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
543
ULPI_OTG_DRVVBUS_EXT);
544
if (usbh2_pdata.otg)
545
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
546
}
547
548
static void __init armadillo5x0_timer_init(void)
549
{
550
mx31_clocks_init(26000000);
551
}
552
553
static struct sys_timer armadillo5x0_timer = {
554
.init = armadillo5x0_timer_init,
555
};
556
557
MACHINE_START(ARMADILLO5X0, "Armadillo-500")
558
/* Maintainer: Alberto Panizzo */
559
.boot_params = MX3x_PHYS_OFFSET + 0x100,
560
.map_io = mx31_map_io,
561
.init_early = imx31_init_early,
562
.init_irq = mx31_init_irq,
563
.timer = &armadillo5x0_timer,
564
.init_machine = armadillo5x0_init,
565
MACHINE_END
566
567