Path: blob/master/arch/arm/mach-imx/mach-mx31lite.c
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/*1* Copyright (C) 2000 Deep Blue Solutions Ltd2* Copyright (C) 2002 Shane Nay ([email protected])3* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.4* Copyright (C) 2009 Daniel Mack <[email protected]>5*6* This program is free software; you can redistribute it and/or modify7* it under the terms of the GNU General Public License as published by8* the Free Software Foundation; either version 2 of the License, or9* (at your option) any later version.10*11* This program is distributed in the hope that it will be useful,12* but WITHOUT ANY WARRANTY; without even the implied warranty of13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the14* GNU General Public License for more details.15*/1617#include <linux/types.h>18#include <linux/init.h>19#include <linux/kernel.h>20#include <linux/memory.h>21#include <linux/platform_device.h>22#include <linux/gpio.h>23#include <linux/smsc911x.h>24#include <linux/mfd/mc13783.h>25#include <linux/spi/spi.h>26#include <linux/usb/otg.h>27#include <linux/usb/ulpi.h>28#include <linux/mtd/physmap.h>29#include <linux/delay.h>3031#include <asm/mach-types.h>32#include <asm/mach/arch.h>33#include <asm/mach/time.h>34#include <asm/mach/map.h>35#include <asm/page.h>36#include <asm/setup.h>3738#include <mach/hardware.h>39#include <mach/common.h>40#include <mach/board-mx31lite.h>41#include <mach/iomux-mx3.h>42#include <mach/irqs.h>43#include <mach/ulpi.h>4445#include "devices-imx31.h"4647/*48* This file contains the module-specific initialization routines.49*/5051static unsigned int mx31lite_pins[] = {52/* LAN9117 IRQ pin */53IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),54/* SPI 1 */55MX31_PIN_CSPI2_SCLK__SCLK,56MX31_PIN_CSPI2_MOSI__MOSI,57MX31_PIN_CSPI2_MISO__MISO,58MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,59MX31_PIN_CSPI2_SS0__SS0,60MX31_PIN_CSPI2_SS1__SS1,61MX31_PIN_CSPI2_SS2__SS2,62};6364static const struct mxc_nand_platform_data65mx31lite_nand_board_info __initconst = {66.width = 1,67.hw_ecc = 1,68};6970static struct smsc911x_platform_config smsc911x_config = {71.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,72.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,73.flags = SMSC911X_USE_16BIT,74};7576static struct resource smsc911x_resources[] = {77{78.start = MX31_CS4_BASE_ADDR,79.end = MX31_CS4_BASE_ADDR + 0x100,80.flags = IORESOURCE_MEM,81}, {82.start = IOMUX_TO_IRQ(MX31_PIN_SFS6),83.end = IOMUX_TO_IRQ(MX31_PIN_SFS6),84.flags = IORESOURCE_IRQ,85},86};8788static struct platform_device smsc911x_device = {89.name = "smsc911x",90.id = -1,91.num_resources = ARRAY_SIZE(smsc911x_resources),92.resource = smsc911x_resources,93.dev = {94.platform_data = &smsc911x_config,95},96};9798/*99* SPI100*101* The MC13783 is the only hard-wired SPI device on the module.102*/103104static int spi_internal_chipselect[] = {105MXC_SPI_CS(0),106};107108static const struct spi_imx_master spi1_pdata __initconst = {109.chipselect = spi_internal_chipselect,110.num_chipselect = ARRAY_SIZE(spi_internal_chipselect),111};112113static struct mc13xxx_platform_data mc13783_pdata __initdata = {114.flags = MC13XXX_USE_RTC |115MC13XXX_USE_REGULATOR,116};117118static struct spi_board_info mc13783_spi_dev __initdata = {119.modalias = "mc13783",120.max_speed_hz = 1000000,121.bus_num = 1,122.chip_select = 0,123.platform_data = &mc13783_pdata,124.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),125};126127/*128* USB129*/130131#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \132PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)133134static int usbh2_init(struct platform_device *pdev)135{136int pins[] = {137MX31_PIN_USBH2_DATA0__USBH2_DATA0,138MX31_PIN_USBH2_DATA1__USBH2_DATA1,139MX31_PIN_USBH2_CLK__USBH2_CLK,140MX31_PIN_USBH2_DIR__USBH2_DIR,141MX31_PIN_USBH2_NXT__USBH2_NXT,142MX31_PIN_USBH2_STP__USBH2_STP,143};144145mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");146147mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);148mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);149mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);150mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);151mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);152mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);153mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);154mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);155mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);156mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);157mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);158mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);159160mxc_iomux_set_gpr(MUX_PGP_UH2, true);161162/* chip select */163mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),164"USBH2_CS");165gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");166gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);167168mdelay(10);169170return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);171}172173static struct mxc_usbh_platform_data usbh2_pdata __initdata = {174.init = usbh2_init,175.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,176};177178/*179* NOR flash180*/181182static struct physmap_flash_data nor_flash_data = {183.width = 2,184};185186static struct resource nor_flash_resource = {187.start = 0xa0000000,188.end = 0xa1ffffff,189.flags = IORESOURCE_MEM,190};191192static struct platform_device physmap_flash_device = {193.name = "physmap-flash",194.id = 0,195.dev = {196.platform_data = &nor_flash_data,197},198.resource = &nor_flash_resource,199.num_resources = 1,200};201202203204/*205* This structure defines the MX31 memory map.206*/207static struct map_desc mx31lite_io_desc[] __initdata = {208{209.virtual = MX31_CS4_BASE_ADDR_VIRT,210.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),211.length = MX31_CS4_SIZE,212.type = MT_DEVICE213}214};215216/*217* Set up static virtual mappings.218*/219void __init mx31lite_map_io(void)220{221mx31_map_io();222iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));223}224225static int mx31lite_baseboard;226core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);227228static void __init mx31lite_init(void)229{230int ret;231232switch (mx31lite_baseboard) {233case MX31LITE_NOBOARD:234break;235case MX31LITE_DB:236mx31lite_db_init();237break;238default:239printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",240mx31lite_baseboard);241}242243mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),244"mx31lite");245246/* NOR and NAND flash */247platform_device_register(&physmap_flash_device);248imx31_add_mxc_nand(&mx31lite_nand_board_info);249250imx31_add_spi_imx1(&spi1_pdata);251spi_register_board_info(&mc13783_spi_dev, 1);252253/* USB */254usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |255ULPI_OTG_DRVVBUS_EXT);256if (usbh2_pdata.otg)257imx31_add_mxc_ehci_hs(2, &usbh2_pdata);258259/* SMSC9117 IRQ pin */260ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");261if (ret)262pr_warning("could not get LAN irq gpio\n");263else {264gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));265platform_device_register(&smsc911x_device);266}267}268269static void __init mx31lite_timer_init(void)270{271mx31_clocks_init(26000000);272}273274struct sys_timer mx31lite_timer = {275.init = mx31lite_timer_init,276};277278MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")279/* Maintainer: Freescale Semiconductor, Inc. */280.boot_params = MX3x_PHYS_OFFSET + 0x100,281.map_io = mx31lite_map_io,282.init_early = imx31_init_early,283.init_irq = mx31_init_irq,284.timer = &mx31lite_timer,285.init_machine = mx31lite_init,286MACHINE_END287288289