Path: blob/master/arch/arm/mach-iop32x/include/mach/iop32x.h
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/*1* arch/arm/mach-iop32x/include/mach/iop32x.h2*3* Intel IOP32X Chip definitions4*5* Author: Rory Bolt <[email protected]>6* Copyright (C) 2002 Rory Bolt7* Copyright (C) 2004 Intel Corp.8*9* This program is free software; you can redistribute it and/or modify10* it under the terms of the GNU General Public License version 2 as11* published by the Free Software Foundation.12*/1314#ifndef __IOP32X_H15#define __IOP32X_H1617/*18* Peripherals that are shared between the iop32x and iop33x but19* located at different addresses.20*/21#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))22#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))2324#include <asm/hardware/iop3xx.h>2526/* ATU Parameters27* set up a 1:1 bus to physical ram relationship28* w/ physical ram on top of pci in the memory map29*/30#define IOP32X_MAX_RAM_SIZE 0x40000000UL31#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE32#define IOP3XX_PCI_LOWER_MEM_BA 0x800000003334#endif353637