Path: blob/master/arch/arm/mach-iop33x/include/mach/iop33x.h
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/*1* arch/arm/mach-iop33x/include/mach/iop33x.h2*3* Intel IOP33X Chip definitions4*5* Author: Dave Jiang ([email protected])6* Copyright (C) 2003, 2004 Intel Corp.7*8* This program is free software; you can redistribute it and/or modify9* it under the terms of the GNU General Public License version 2 as10* published by the Free Software Foundation.11*/1213#ifndef __IOP33X_H14#define __IOP33X_H1516/*17* Peripherals that are shared between the iop32x and iop33x but18* located at different addresses.19*/20#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))21#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))2223#include <asm/hardware/iop3xx.h>2425/* UARTs */26#define IOP33X_UART0_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700)27#define IOP33X_UART0_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700)28#define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740)29#define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740)3031/* ATU Parameters32* set up a 1:1 bus to physical ram relationship33* w/ pci on top of physical ram in memory map34*/35#define IOP33X_MAX_RAM_SIZE 0x80000000UL36#define IOP3XX_MAX_RAM_SIZE IOP33X_MAX_RAM_SIZE37#define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)383940#endif414243