CoCalc -- irqs.h

GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/arm/mach-ixp2000/include/mach/irqs.h
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/*
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 * arch/arm/mach-ixp2000/include/mach/irqs.h
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 *
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 * Original Author: Naeem Afzal <[email protected]>
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 * Maintainer: Deepak Saxena <[email protected]>
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 *
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 * Copyright (C) 2002 Intel Corp.
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 * Copyright (C) 2003-2004 MontaVista Software, Inc.
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 * 
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 */
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#ifndef _IRQS_H
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#define _IRQS_H
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/*
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 * Do NOT add #ifdef MACHINE_FOO in here.
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 * Simpy add your machine IRQs here and increase NR_IRQS if needed to
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 * hold your machine's IRQ table.
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 */
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/*
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 * Some interrupt numbers go unused b/c the IRQ mask/ummask/status
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 * register has those bit reserved. We just mark those interrupts
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 * as invalid and this allows us to do mask/unmask with a single
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 * shift operation instead of having to map the IRQ number to
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 * a HW IRQ number.
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 */
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#define	IRQ_IXP2000_SOFT_INT		0 /* soft interrupt */
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#define	IRQ_IXP2000_ERRSUM		1 /* OR of all bits in ErrorStatus reg*/
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#define	IRQ_IXP2000_UART		2
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#define	IRQ_IXP2000_GPIO		3
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#define	IRQ_IXP2000_TIMER1     		4
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#define	IRQ_IXP2000_TIMER2     		5
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#define	IRQ_IXP2000_TIMER3     		6
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#define	IRQ_IXP2000_TIMER4     		7
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#define	IRQ_IXP2000_PMU        		8               
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#define	IRQ_IXP2000_SPF        		9  /* Slow port framer IRQ */
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#define	IRQ_IXP2000_DMA1      		10
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#define	IRQ_IXP2000_DMA2      		11
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#define	IRQ_IXP2000_DMA3      		12
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#define	IRQ_IXP2000_PCI_DOORBELL	13
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#define	IRQ_IXP2000_ME_ATTN       	14 
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#define	IRQ_IXP2000_PCI   		15 /* PCI INTA or INTB */
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#define	IRQ_IXP2000_THDA0   		16 /* thread 0-31A */
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#define	IRQ_IXP2000_THDA1  		17 /* thread 32-63A, IXP2800 only */
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#define	IRQ_IXP2000_THDA2		18 /* thread 64-95A */
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#define	IRQ_IXP2000_THDA3 		19 /* thread 96-127A, IXP2800 only */
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#define	IRQ_IXP2000_THDB0		24 /* thread 0-31B */
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#define	IRQ_IXP2000_THDB1		25 /* thread 32-63B, IXP2800 only */
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#define	IRQ_IXP2000_THDB2		26 /* thread 64-95B */
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#define	IRQ_IXP2000_THDB3		27 /* thread 96-127B, IXP2800 only */
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/* define generic GPIOs */
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#define IRQ_IXP2000_GPIO0		32
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#define IRQ_IXP2000_GPIO1		33
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#define IRQ_IXP2000_GPIO2		34
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#define IRQ_IXP2000_GPIO3		35
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#define IRQ_IXP2000_GPIO4		36
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#define IRQ_IXP2000_GPIO5		37
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#define IRQ_IXP2000_GPIO6		38
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#define IRQ_IXP2000_GPIO7		39
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/* split off the 2 PCI sources */
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#define IRQ_IXP2000_PCIA		40
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#define IRQ_IXP2000_PCIB		41
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/* Int sources from IRQ_ERROR_STATUS */
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#define IRQ_IXP2000_DRAM0_MIN_ERR	42
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#define IRQ_IXP2000_DRAM0_MAJ_ERR	43
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#define IRQ_IXP2000_DRAM1_MIN_ERR	44
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#define IRQ_IXP2000_DRAM1_MAJ_ERR	45
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#define IRQ_IXP2000_DRAM2_MIN_ERR	46
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#define IRQ_IXP2000_DRAM2_MAJ_ERR	47
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/* 48-57 reserved */
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#define IRQ_IXP2000_SRAM0_ERR		58
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#define IRQ_IXP2000_SRAM1_ERR		59
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#define IRQ_IXP2000_SRAM2_ERR		60
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#define IRQ_IXP2000_SRAM3_ERR		61
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/* 62-65 reserved */
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#define IRQ_IXP2000_MEDIA_ERR		66
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#define IRQ_IXP2000_PCI_ERR			67
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#define IRQ_IXP2000_SP_INT			68
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#define NR_IXP2000_IRQS				69
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#define	IXP2000_BOARD_IRQ(x)		(NR_IXP2000_IRQS + (x))
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#define	IXP2000_BOARD_IRQ_MASK(irq)	(1 << (irq - NR_IXP2000_IRQS))	
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#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))
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#define IXP2000_VALID_ERR_IRQ_MASK (\
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \
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		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT)	)
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/*
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 * This allows for all the on-chip sources plus up to 32 CPLD based
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 * IRQs. Should be more than enough.
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 */
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#define	IXP2000_BOARD_IRQS		32
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#define NR_IRQS				(NR_IXP2000_IRQS + IXP2000_BOARD_IRQS)
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/* 
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 * IXDP2400 specific IRQs
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 */
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#define	IRQ_IXDP2400_INGRESS_NPU	IXP2000_BOARD_IRQ(0) 
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#define	IRQ_IXDP2400_ENET		IXP2000_BOARD_IRQ(1) 
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#define	IRQ_IXDP2400_MEDIA_PCI		IXP2000_BOARD_IRQ(2) 
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#define	IRQ_IXDP2400_MEDIA_SP		IXP2000_BOARD_IRQ(3) 
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#define	IRQ_IXDP2400_SF_PCI		IXP2000_BOARD_IRQ(4) 
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#define	IRQ_IXDP2400_SF_SP		IXP2000_BOARD_IRQ(5) 
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#define	IRQ_IXDP2400_PMC		IXP2000_BOARD_IRQ(6) 
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#define	IRQ_IXDP2400_TVM		IXP2000_BOARD_IRQ(7) 
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#define	NR_IXDP2400_IRQS		((IRQ_IXDP2400_TVM)+1)  
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#define	IXDP2400_NR_IRQS		NR_IXDP2400_IRQS - NR_IXP2000_IRQS
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/* IXDP2800 specific IRQs */
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#define IRQ_IXDP2800_EGRESS_ENET	IXP2000_BOARD_IRQ(0)
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#define IRQ_IXDP2800_INGRESS_NPU	IXP2000_BOARD_IRQ(1)
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#define IRQ_IXDP2800_PMC		IXP2000_BOARD_IRQ(2)
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#define IRQ_IXDP2800_FABRIC_PCI		IXP2000_BOARD_IRQ(3)
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#define IRQ_IXDP2800_FABRIC		IXP2000_BOARD_IRQ(4)
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#define IRQ_IXDP2800_MEDIA		IXP2000_BOARD_IRQ(5)
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#define	NR_IXDP2800_IRQS		((IRQ_IXDP2800_MEDIA)+1)
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#define	IXDP2800_NR_IRQS		NR_IXDP2800_IRQS - NR_IXP2000_IRQS
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/* 
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 * IRQs on both IXDP2x01 boards
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 */
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#define IRQ_IXDP2X01_SPCI_DB_0		IXP2000_BOARD_IRQ(2)
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#define IRQ_IXDP2X01_SPCI_DB_1		IXP2000_BOARD_IRQ(3)
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#define IRQ_IXDP2X01_SPCI_PMC_INTA	IXP2000_BOARD_IRQ(4)
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#define IRQ_IXDP2X01_SPCI_PMC_INTB	IXP2000_BOARD_IRQ(5)
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#define IRQ_IXDP2X01_SPCI_PMC_INTC	IXP2000_BOARD_IRQ(6)
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#define IRQ_IXDP2X01_SPCI_PMC_INTD	IXP2000_BOARD_IRQ(7)
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#define IRQ_IXDP2X01_SPCI_FIC_INT	IXP2000_BOARD_IRQ(8)
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#define IRQ_IXDP2X01_IPMI_FROM		IXP2000_BOARD_IRQ(16)
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#define IRQ_IXDP2X01_125US		IXP2000_BOARD_IRQ(17)
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#define IRQ_IXDP2X01_DB_0_ADD		IXP2000_BOARD_IRQ(18)
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#define IRQ_IXDP2X01_DB_1_ADD		IXP2000_BOARD_IRQ(19)
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#define IRQ_IXDP2X01_UART1		IXP2000_BOARD_IRQ(21)
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#define IRQ_IXDP2X01_UART2		IXP2000_BOARD_IRQ(22)
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#define IRQ_IXDP2X01_FIC_ADD_INT	IXP2000_BOARD_IRQ(24)
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#define IRQ_IXDP2X01_CS8900		IXP2000_BOARD_IRQ(25)
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#define IRQ_IXDP2X01_BBSRAM		IXP2000_BOARD_IRQ(26)
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#define IXDP2X01_VALID_IRQ_MASK ( \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_0) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_1) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTA) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTB) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTC) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTD) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_FIC_INT) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_IPMI_FROM) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_125US) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_0_ADD) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_1_ADD) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART1) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART2) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_FIC_ADD_INT) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_CS8900) | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_BBSRAM) )
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/* 
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 * IXDP2401 specific IRQs
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 */
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#define IRQ_IXDP2401_INTA_82546		IXP2000_BOARD_IRQ(0)
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#define IRQ_IXDP2401_INTB_82546		IXP2000_BOARD_IRQ(1)
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#define	IXDP2401_VALID_IRQ_MASK ( \
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		IXDP2X01_VALID_IRQ_MASK | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTA_82546) |\
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTB_82546))
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/*
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 * IXDP2801-specific IRQs
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 */
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#define IRQ_IXDP2801_RIV		IXP2000_BOARD_IRQ(0)
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#define IRQ_IXDP2801_CNFG_MEDIA		IXP2000_BOARD_IRQ(27)
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#define IRQ_IXDP2801_CLOCK_REF		IXP2000_BOARD_IRQ(28)
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#define	IXDP2801_VALID_IRQ_MASK ( \
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		IXDP2X01_VALID_IRQ_MASK | \
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_RIV) |\
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CNFG_MEDIA) |\
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		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CLOCK_REF))
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#define	NR_IXDP2X01_IRQS		((IRQ_IXDP2801_CLOCK_REF) + 1)
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#endif /*_IRQS_H*/
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