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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h
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/*

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 * arch/arm/mach-ixp2000/include/mach/ixdp2x01.h

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 *

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 * Platform definitions for IXDP2X01 && IXDP2801 systems

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 *

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 * Author: Deepak Saxena <[email protected]>

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 *

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 * Copyright 2004 (c) MontaVista Software, Inc. 

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 *

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 * Based on original code Copyright (c) 2002-2003 Intel Corporation

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 * 

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 * This file is licensed under  the terms of the GNU General Public 

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 * License version 2. This program is licensed "as is" without any 

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 * warranty of any kind, whether express or implied.

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 */

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#ifndef __IXDP2X01_H__

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#define __IXDP2X01_H__

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#define	IXDP2X01_PHYS_CPLD_BASE		0xc6024000

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#define	IXDP2X01_VIRT_CPLD_BASE		0xfe000000

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#define	IXDP2X01_CPLD_REGION_SIZE	0x00100000

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#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)

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#define IXDP2X01_CPLD_PHYS_REG(reg) (IXDP2X01_PHYS_CPLD_BASE | reg)

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#define IXDP2X01_UART1_VIRT_BASE	IXDP2X01_CPLD_VIRT_REG(0x40)

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#define IXDP2X01_UART1_PHYS_BASE	IXDP2X01_CPLD_PHYS_REG(0x40)

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#define IXDP2X01_UART2_VIRT_BASE	IXDP2X01_CPLD_VIRT_REG(0x60)

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#define IXDP2X01_UART2_PHYS_BASE	IXDP2X01_CPLD_PHYS_REG(0x60)

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#define IXDP2X01_CS8900_VIRT_BASE	IXDP2X01_CPLD_VIRT_REG(0x80)

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#define IXDP2X01_CS8900_VIRT_END	(IXDP2X01_CS8900_VIRT_BASE + 16)

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#define IXDP2X01_CPLD_RESET_REG         IXDP2X01_CPLD_VIRT_REG(0x00)

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#define IXDP2X01_INT_MASK_SET_REG	IXDP2X01_CPLD_VIRT_REG(0x08)

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#define IXDP2X01_INT_STAT_REG		IXDP2X01_CPLD_VIRT_REG(0x0C)

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#define IXDP2X01_INT_RAW_REG		IXDP2X01_CPLD_VIRT_REG(0x10) 

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#define IXDP2X01_INT_MASK_CLR_REG	IXDP2X01_INT_RAW_REG

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#define IXDP2X01_INT_SIM_REG		IXDP2X01_CPLD_VIRT_REG(0x14)

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#define IXDP2X01_CPLD_FLASH_REG		IXDP2X01_CPLD_VIRT_REG(0x20)

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#define IXDP2X01_CPLD_FLASH_INTERN 	0x8000

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#define IXDP2X01_CPLD_FLASH_BANK_MASK 	0xF

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#define IXDP2X01_FLASH_WINDOW_BITS 	25

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#define IXDP2X01_FLASH_WINDOW_SIZE 	(1 << IXDP2X01_FLASH_WINDOW_BITS)

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#define IXDP2X01_FLASH_WINDOW_MASK 	(IXDP2X01_FLASH_WINDOW_SIZE - 1)

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#define	IXDP2X01_UART_CLK		1843200

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#define	IXDP2X01_GPIO_I2C_ENABLE	0x02

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#define	IXDP2X01_GPIO_SCL		0x07

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#define	IXDP2X01_GPIO_SDA		0x06

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#endif /* __IXDP2x01_H__ */

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