Path: blob/master/arch/arm/mach-ixp4xx/include/mach/qmgr.h
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/*1* Copyright (C) 2007 Krzysztof Halasa <[email protected]>2*3* This program is free software; you can redistribute it and/or modify it4* under the terms of version 2 of the GNU General Public License5* as published by the Free Software Foundation.6*/78#ifndef IXP4XX_QMGR_H9#define IXP4XX_QMGR_H1011#include <linux/io.h>12#include <linux/kernel.h>1314#define DEBUG_QMGR 01516#define HALF_QUEUES 3217#define QUEUES 6418#define MAX_QUEUE_LENGTH 4 /* in dwords */1920#define QUEUE_STAT1_EMPTY 1 /* queue status bits */21#define QUEUE_STAT1_NEARLY_EMPTY 222#define QUEUE_STAT1_NEARLY_FULL 423#define QUEUE_STAT1_FULL 824#define QUEUE_STAT2_UNDERFLOW 125#define QUEUE_STAT2_OVERFLOW 22627#define QUEUE_WATERMARK_0_ENTRIES 028#define QUEUE_WATERMARK_1_ENTRY 129#define QUEUE_WATERMARK_2_ENTRIES 230#define QUEUE_WATERMARK_4_ENTRIES 331#define QUEUE_WATERMARK_8_ENTRIES 432#define QUEUE_WATERMARK_16_ENTRIES 533#define QUEUE_WATERMARK_32_ENTRIES 634#define QUEUE_WATERMARK_64_ENTRIES 73536/* queue interrupt request conditions */37#define QUEUE_IRQ_SRC_EMPTY 038#define QUEUE_IRQ_SRC_NEARLY_EMPTY 139#define QUEUE_IRQ_SRC_NEARLY_FULL 240#define QUEUE_IRQ_SRC_FULL 341#define QUEUE_IRQ_SRC_NOT_EMPTY 442#define QUEUE_IRQ_SRC_NOT_NEARLY_EMPTY 543#define QUEUE_IRQ_SRC_NOT_NEARLY_FULL 644#define QUEUE_IRQ_SRC_NOT_FULL 74546struct qmgr_regs {47u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 0x000 - 0x3FF */48u32 stat1[4]; /* 0x400 - 0x40F */49u32 stat2[2]; /* 0x410 - 0x417 */50u32 statne_h; /* 0x418 - queue nearly empty */51u32 statf_h; /* 0x41C - queue full */52u32 irqsrc[4]; /* 0x420 - 0x42F IRC source */53u32 irqen[2]; /* 0x430 - 0x437 IRQ enabled */54u32 irqstat[2]; /* 0x438 - 0x43F - IRQ access only */55u32 reserved[1776];56u32 sram[2048]; /* 0x2000 - 0x3FFF - config and buffer */57};5859void qmgr_set_irq(unsigned int queue, int src,60void (*handler)(void *pdev), void *pdev);61void qmgr_enable_irq(unsigned int queue);62void qmgr_disable_irq(unsigned int queue);6364/* request_ and release_queue() must be called from non-IRQ context */6566#if DEBUG_QMGR67extern char qmgr_queue_descs[QUEUES][32];6869int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,70unsigned int nearly_empty_watermark,71unsigned int nearly_full_watermark,72const char *desc_format, const char* name);73#else74int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,75unsigned int nearly_empty_watermark,76unsigned int nearly_full_watermark);77#define qmgr_request_queue(queue, len, nearly_empty_watermark, \78nearly_full_watermark, desc_format, name) \79__qmgr_request_queue(queue, len, nearly_empty_watermark, \80nearly_full_watermark)81#endif8283void qmgr_release_queue(unsigned int queue);848586static inline void qmgr_put_entry(unsigned int queue, u32 val)87{88extern struct qmgr_regs __iomem *qmgr_regs;89#if DEBUG_QMGR90BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */9192printk(KERN_DEBUG "Queue %s(%i) put %X\n",93qmgr_queue_descs[queue], queue, val);94#endif95__raw_writel(val, &qmgr_regs->acc[queue][0]);96}9798static inline u32 qmgr_get_entry(unsigned int queue)99{100u32 val;101extern struct qmgr_regs __iomem *qmgr_regs;102val = __raw_readl(&qmgr_regs->acc[queue][0]);103#if DEBUG_QMGR104BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */105106printk(KERN_DEBUG "Queue %s(%i) get %X\n",107qmgr_queue_descs[queue], queue, val);108#endif109return val;110}111112static inline int __qmgr_get_stat1(unsigned int queue)113{114extern struct qmgr_regs __iomem *qmgr_regs;115return (__raw_readl(&qmgr_regs->stat1[queue >> 3])116>> ((queue & 7) << 2)) & 0xF;117}118119static inline int __qmgr_get_stat2(unsigned int queue)120{121extern struct qmgr_regs __iomem *qmgr_regs;122BUG_ON(queue >= HALF_QUEUES);123return (__raw_readl(&qmgr_regs->stat2[queue >> 4])124>> ((queue & 0xF) << 1)) & 0x3;125}126127/**128* qmgr_stat_empty() - checks if a hardware queue is empty129* @queue: queue number130*131* Returns non-zero value if the queue is empty.132*/133static inline int qmgr_stat_empty(unsigned int queue)134{135BUG_ON(queue >= HALF_QUEUES);136return __qmgr_get_stat1(queue) & QUEUE_STAT1_EMPTY;137}138139/**140* qmgr_stat_below_low_watermark() - checks if a queue is below low watermark141* @queue: queue number142*143* Returns non-zero value if the queue is below low watermark.144*/145static inline int qmgr_stat_below_low_watermark(unsigned int queue)146{147extern struct qmgr_regs __iomem *qmgr_regs;148if (queue >= HALF_QUEUES)149return (__raw_readl(&qmgr_regs->statne_h) >>150(queue - HALF_QUEUES)) & 0x01;151return __qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_EMPTY;152}153154/**155* qmgr_stat_above_high_watermark() - checks if a queue is above high watermark156* @queue: queue number157*158* Returns non-zero value if the queue is above high watermark159*/160static inline int qmgr_stat_above_high_watermark(unsigned int queue)161{162BUG_ON(queue >= HALF_QUEUES);163return __qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_FULL;164}165166/**167* qmgr_stat_full() - checks if a hardware queue is full168* @queue: queue number169*170* Returns non-zero value if the queue is full.171*/172static inline int qmgr_stat_full(unsigned int queue)173{174extern struct qmgr_regs __iomem *qmgr_regs;175if (queue >= HALF_QUEUES)176return (__raw_readl(&qmgr_regs->statf_h) >>177(queue - HALF_QUEUES)) & 0x01;178return __qmgr_get_stat1(queue) & QUEUE_STAT1_FULL;179}180181/**182* qmgr_stat_underflow() - checks if a hardware queue experienced underflow183* @queue: queue number184*185* Returns non-zero value if the queue experienced underflow.186*/187static inline int qmgr_stat_underflow(unsigned int queue)188{189return __qmgr_get_stat2(queue) & QUEUE_STAT2_UNDERFLOW;190}191192/**193* qmgr_stat_overflow() - checks if a hardware queue experienced overflow194* @queue: queue number195*196* Returns non-zero value if the queue experienced overflow.197*/198static inline int qmgr_stat_overflow(unsigned int queue)199{200return __qmgr_get_stat2(queue) & QUEUE_STAT2_OVERFLOW;201}202203#endif204205206