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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/arm/mach-ks8695/include/mach/regs-gpio.h
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/*

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 * arch/arm/mach-ks8695/include/mach/regs-gpio.h

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 *

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 * Copyright (C) 2007 Andrew Victor

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 *

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 * KS8695 - GPIO control registers and bit definitions.

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 *

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 * This file is licensed under  the terms of the GNU General Public

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 * License version 2. This program is licensed "as is" without any

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 * warranty of any kind, whether express or implied.

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 */

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#ifndef KS8695_GPIO_H

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#define KS8695_GPIO_H

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#define KS8695_GPIO_OFFSET	(0xF0000 + 0xE600)

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#define KS8695_GPIO_VA		(KS8695_IO_VA + KS8695_GPIO_OFFSET)

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#define KS8695_GPIO_PA		(KS8695_IO_PA + KS8695_GPIO_OFFSET)

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#define KS8695_IOPM		(0x00)		/* I/O Port Mode Register */

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#define KS8695_IOPC		(0x04)		/* I/O Port Control Register */

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#define KS8695_IOPD		(0x08)		/* I/O Port Data Register */

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/* Port Mode Register */

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#define IOPM(x)			(1 << (x))	/* Mode for GPIO Pin x */

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/* Port Control Register */

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#define IOPC_IOTIM1EN		(1 << 17)	/* GPIO Pin for Timer1 Enable */

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#define IOPC_IOTIM0EN		(1 << 16)	/* GPIO Pin for Timer0 Enable */

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#define IOPC_IOEINT3EN		(1 << 15)	/* GPIO Pin for External/Soft Interrupt 3 Enable */

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#define IOPC_IOEINT3TM		(7 << 12)	/* GPIO Pin for External/Soft Interrupt 3 Trigger Mode */

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#define IOPC_IOEINT3_MODE(x)	((x) << 12)

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#define IOPC_IOEINT2EN		(1 << 11)	/* GPIO Pin for External/Soft Interrupt 2 Enable */

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#define IOPC_IOEINT2TM		(7 << 8)	/* GPIO Pin for External/Soft Interrupt 2 Trigger Mode */

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#define IOPC_IOEINT2_MODE(x)	((x) << 8)

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#define IOPC_IOEINT1EN		(1 << 7)	/* GPIO Pin for External/Soft Interrupt 1 Enable */

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#define IOPC_IOEINT1TM		(7 << 4)	/* GPIO Pin for External/Soft Interrupt 1 Trigger Mode */

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#define IOPC_IOEINT1_MODE(x)	((x) << 4)

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#define IOPC_IOEINT0EN		(1 << 3)	/* GPIO Pin for External/Soft Interrupt 0 Enable */

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#define IOPC_IOEINT0TM		(7 << 0)	/* GPIO Pin for External/Soft Interrupt 0 Trigger Mode */

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#define IOPC_IOEINT0_MODE(x)	((x) << 0)

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 /* Trigger Modes */

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#define IOPC_TM_LOW		(0)		/* Level Detection (Active Low) */

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#define IOPC_TM_HIGH		(1)		/* Level Detection (Active High) */

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#define IOPC_TM_RISING		(2)		/* Rising Edge Detection */

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#define IOPC_TM_FALLING		(4)		/* Falling Edge Detection */

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#define IOPC_TM_EDGE		(6)		/* Both Edge Detection */

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/* Port Data Register */

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#define IOPD(x)			(1 << (x))	/* Signal Level of GPIO Pin x */

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#endif

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