Path: blob/master/arch/arm/mach-lpc32xx/include/mach/i2c.h
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/*1* PNX4008-specific tweaks for I2C IP3204 block2*3* Author: Vitaly Wool <[email protected]>4*5* 2005 (c) MontaVista Software, Inc. This file is licensed under6* the terms of the GNU General Public License version 2. This program7* is licensed "as is" without any warranty of any kind, whether express8* or implied.9*/1011#ifndef __ASM_ARCH_I2C_H12#define __ASM_ARCH_I2C_H1314enum {15mstatus_tdi = 0x00000001,16mstatus_afi = 0x00000002,17mstatus_nai = 0x00000004,18mstatus_drmi = 0x00000008,19mstatus_active = 0x00000020,20mstatus_scl = 0x00000040,21mstatus_sda = 0x00000080,22mstatus_rff = 0x00000100,23mstatus_rfe = 0x00000200,24mstatus_tff = 0x00000400,25mstatus_tfe = 0x00000800,26};2728enum {29mcntrl_tdie = 0x00000001,30mcntrl_afie = 0x00000002,31mcntrl_naie = 0x00000004,32mcntrl_drmie = 0x00000008,33mcntrl_daie = 0x00000020,34mcntrl_rffie = 0x00000040,35mcntrl_tffie = 0x00000080,36mcntrl_reset = 0x00000100,37mcntrl_cdbmode = 0x00000400,38};3940enum {41rw_bit = 1 << 0,42start_bit = 1 << 8,43stop_bit = 1 << 9,44};4546#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */47#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */48#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */49#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */50#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */51#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */52#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */53#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */54#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */55#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */56#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */57#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */58#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */5960#define I2C_CHIP_NAME "PNX4008-I2C"6162#endif /* __ASM_ARCH_I2C_H */636465