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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/arm/mach-msm/include/mach/irqs-8x50.h
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/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.

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 *

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 * This program is free software; you can redistribute it and/or modify

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 * it under the terms of the GNU General Public License version 2 and

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 * only version 2 as published by the Free Software Foundation.

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 *

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 * This program is distributed in the hope that it will be useful,

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 * but WITHOUT ANY WARRANTY; without even the implied warranty of

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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 * GNU General Public License for more details.

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 */

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#ifndef __ASM_ARCH_MSM_IRQS_8XXX_H

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#define __ASM_ARCH_MSM_IRQS_8XXX_H

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/* MSM ACPU Interrupt Numbers */

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#define INT_A9_M2A_0         0

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#define INT_A9_M2A_1         1

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#define INT_A9_M2A_2         2

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#define INT_A9_M2A_3         3

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#define INT_A9_M2A_4         4

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#define INT_A9_M2A_5         5

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#define INT_A9_M2A_6         6

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#define INT_GP_TIMER_EXP     7

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#define INT_DEBUG_TIMER_EXP  8

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#define INT_SIRC_0           9

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#define INT_SDC3_0           10

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#define INT_SDC3_1           11

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#define INT_SDC4_0           12

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#define INT_SDC4_1           13

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#define INT_AD6_EXT_VFR      14

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#define INT_USB_OTG          15

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#define INT_MDDI_PRI         16

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#define INT_MDDI_EXT         17

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#define INT_MDDI_CLIENT      18

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#define INT_MDP              19

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#define INT_GRAPHICS         20

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#define INT_ADM_AARM         21

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#define INT_ADSP_A11         22

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#define INT_ADSP_A9_A11      23

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#define INT_SDC1_0           24

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#define INT_SDC1_1           25

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#define INT_SDC2_0           26

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#define INT_SDC2_1           27

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#define INT_KEYSENSE         28

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#define INT_TCHSCRN_SSBI     29

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#define INT_TCHSCRN1         30

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#define INT_TCHSCRN2         31

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#define INT_TCSR_MPRPH_SC1   (32 + 0)

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#define INT_USB_FS2          (32 + 1)

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#define INT_PWB_I2C          (32 + 2)

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#define INT_SOFTRESET        (32 + 3)

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#define INT_NAND_WR_ER_DONE  (32 + 4)

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#define INT_NAND_OP_DONE     (32 + 5)

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#define INT_TCSR_MPRPH_SC2   (32 + 6)

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#define INT_OP_PEN           (32 + 7)

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#define INT_AD_HSSD          (32 + 8)

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#define INT_ARM11_PM         (32 + 9)

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#define INT_SDMA_NON_SECURE  (32 + 10)

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#define INT_TSIF_IRQ         (32 + 11)

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#define INT_UART1DM_IRQ      (32 + 12)

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#define INT_UART1DM_RX       (32 + 13)

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#define INT_SDMA_SECURE      (32 + 14)

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#define INT_SI2S_SLAVE       (32 + 15)

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#define INT_SC_I2CPU         (32 + 16)

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#define INT_SC_DBG_RDTRFULL  (32 + 17)

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#define INT_SC_DBG_WDTRFULL  (32 + 18)

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#define INT_SCPLL_CTL_DONE   (32 + 19)

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#define INT_UART2DM_IRQ      (32 + 20)

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#define INT_UART2DM_RX       (32 + 21)

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#define INT_VDC_MEC          (32 + 22)

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#define INT_VDC_DB           (32 + 23)

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#define INT_VDC_AXI          (32 + 24)

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#define INT_VFE              (32 + 25)

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#define INT_USB_HS           (32 + 26)

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#define INT_AUDIO_OUT0       (32 + 27)

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#define INT_AUDIO_OUT1       (32 + 28)

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#define INT_CRYPTO           (32 + 29)

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#define INT_AD6M_IDLE        (32 + 30)

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#define INT_SIRC_1           (32 + 31)

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#define NR_GPIO_IRQS 165

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#define NR_MSM_IRQS 64

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#define NR_BOARD_IRQS 64

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#endif

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