Path: blob/master/arch/arm/mach-msm/include/mach/msm_iomap.h
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/*1* Copyright (C) 2007 Google, Inc.2* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.3* Author: Brian Swetland <[email protected]>4*5* This software is licensed under the terms of the GNU General Public6* License version 2, as published by the Free Software Foundation, and7* may be copied, distributed, and modified under those terms.8*9* This program is distributed in the hope that it will be useful,10* but WITHOUT ANY WARRANTY; without even the implied warranty of11* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the12* GNU General Public License for more details.13*14*15* The MSM peripherals are spread all over across 768MB of physical16* space, which makes just having a simple IO_ADDRESS macro to slide17* them into the right virtual location rough. Instead, we will18* provide a master phys->virt mapping for peripherals here.19*20*/2122#ifndef __ASM_ARCH_MSM_IOMAP_H23#define __ASM_ARCH_MSM_IOMAP_H2425#include <asm/sizes.h>2627/* Physical base address and size of peripherals.28* Ordered by the virtual base addresses they will be mapped at.29*30* MSM_VIC_BASE must be an value that can be loaded via a "mov"31* instruction, otherwise entry-macro.S will not compile.32*33* If you add or remove entries here, you'll want to edit the34* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your35* changes.36*37*/3839#ifdef __ASSEMBLY__40#define IOMEM(x) x41#else42#define IOMEM(x) ((void __force __iomem *)(x))43#endif4445#if defined(CONFIG_ARCH_MSM7X30)46#include "msm_iomap-7x30.h"47#elif defined(CONFIG_ARCH_QSD8X50)48#include "msm_iomap-8x50.h"49#elif defined(CONFIG_ARCH_MSM8X60)50#include "msm_iomap-8x60.h"51#else52#include "msm_iomap-7x00.h"53#endif5455#include "msm_iomap-8960.h"5657/* Virtual addresses shared across all MSM targets. */58#define MSM_CSR_BASE IOMEM(0xE0001000)59#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)60#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)61#define MSM_TMR_BASE IOMEM(0xF0200000)62#define MSM_TMR0_BASE IOMEM(0xF0201000)6364#endif656667