Path: blob/master/arch/arm/mach-mxs/mach-mx28evk.c
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/*1* Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.2*3* This program is free software; you can redistribute it and/or modify4* it under the terms of the GNU General Public License as published by5* the Free Software Foundation; either version 2 of the License, or6* (at your option) any later version.7*8* This program is distributed in the hope that it will be useful,9* but WITHOUT ANY WARRANTY; without even the implied warranty of10* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the11* GNU General Public License for more details.12*/1314#include <linux/delay.h>15#include <linux/platform_device.h>16#include <linux/gpio.h>17#include <linux/irq.h>18#include <linux/clk.h>1920#include <asm/mach-types.h>21#include <asm/mach/arch.h>22#include <asm/mach/time.h>2324#include <mach/common.h>25#include <mach/iomux-mx28.h>2627#include "devices-mx28.h"28#include "gpio.h"2930#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)31#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)32#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)33#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)34#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)3536#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)37#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)38#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)39#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)4041static const iomux_cfg_t mx28evk_pads[] __initconst = {42/* duart */43MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,44MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,4546/* auart0 */47MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,48MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,49MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,50MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,51/* auart3 */52MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,53MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,54MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,55MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,5657#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)58/* fec0 */59MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,60MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,61MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,62MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,63MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,64MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,65MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,66MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,67MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,68/* fec1 */69MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,70MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,71MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,72MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,73MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,74MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,75/* phy power line */76MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,77/* phy reset line */78MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,7980/* flexcan0 */81MX28_PAD_GPMI_RDY2__CAN0_TX,82MX28_PAD_GPMI_RDY3__CAN0_RX,83/* flexcan1 */84MX28_PAD_GPMI_CE2N__CAN1_TX,85MX28_PAD_GPMI_CE3N__CAN1_RX,86/* transceiver power control */87MX28_PAD_SSP1_CMD__GPIO_2_13,8889/* mxsfb (lcdif) */90MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,91MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,92MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,93MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,94MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,95MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,96MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,97MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,98MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,99MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,100MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,101MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,102MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,103MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,104MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,105MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,106MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,107MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,108MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,109MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,110MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,111MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,112MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,113MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,114MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,115MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,116MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,117MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,118/* LCD panel enable */119MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,120/* backlight control */121MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,122/* mmc0 */123MX28_PAD_SSP0_DATA0__SSP0_D0 |124(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),125MX28_PAD_SSP0_DATA1__SSP0_D1 |126(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),127MX28_PAD_SSP0_DATA2__SSP0_D2 |128(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),129MX28_PAD_SSP0_DATA3__SSP0_D3 |130(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),131MX28_PAD_SSP0_DATA4__SSP0_D4 |132(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),133MX28_PAD_SSP0_DATA5__SSP0_D5 |134(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),135MX28_PAD_SSP0_DATA6__SSP0_D6 |136(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),137MX28_PAD_SSP0_DATA7__SSP0_D7 |138(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),139MX28_PAD_SSP0_CMD__SSP0_CMD |140(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),141MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |142(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),143MX28_PAD_SSP0_SCK__SSP0_SCK |144(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),145/* write protect */146MX28_PAD_SSP1_SCK__GPIO_2_12 |147(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),148/* slot power enable */149MX28_PAD_PWM3__GPIO_3_28 |150(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),151152/* mmc1 */153MX28_PAD_GPMI_D00__SSP1_D0 |154(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),155MX28_PAD_GPMI_D01__SSP1_D1 |156(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),157MX28_PAD_GPMI_D02__SSP1_D2 |158(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),159MX28_PAD_GPMI_D03__SSP1_D3 |160(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),161MX28_PAD_GPMI_D04__SSP1_D4 |162(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),163MX28_PAD_GPMI_D05__SSP1_D5 |164(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),165MX28_PAD_GPMI_D06__SSP1_D6 |166(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),167MX28_PAD_GPMI_D07__SSP1_D7 |168(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),169MX28_PAD_GPMI_RDY1__SSP1_CMD |170(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),171MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |172(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),173MX28_PAD_GPMI_WRN__SSP1_SCK |174(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),175/* write protect */176MX28_PAD_GPMI_RESETN__GPIO_0_28 |177(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),178/* slot power enable */179MX28_PAD_PWM4__GPIO_3_29 |180(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),181};182183/* fec */184static void __init mx28evk_fec_reset(void)185{186int ret;187struct clk *clk;188189/* Enable fec phy clock */190clk = clk_get_sys("pll2", NULL);191if (!IS_ERR(clk))192clk_enable(clk);193194/* Power up fec phy */195ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");196if (ret) {197pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);198return;199}200201ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);202if (ret) {203pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);204return;205}206207/* Reset fec phy */208ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");209if (ret) {210pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);211return;212}213214gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);215if (ret) {216pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);217return;218}219220mdelay(1);221gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);222}223224static struct fec_platform_data mx28_fec_pdata[] __initdata = {225{226/* fec0 */227.phy = PHY_INTERFACE_MODE_RMII,228}, {229/* fec1 */230.phy = PHY_INTERFACE_MODE_RMII,231},232};233234static int __init mx28evk_fec_get_mac(void)235{236int i;237u32 val;238const u32 *ocotp = mxs_get_ocotp();239240if (!ocotp)241goto error;242243/*244* OCOTP only stores the last 4 octets for each mac address,245* so hard-code Freescale OUI (00:04:9f) here.246*/247for (i = 0; i < 2; i++) {248val = ocotp[i * 4];249mx28_fec_pdata[i].mac[0] = 0x00;250mx28_fec_pdata[i].mac[1] = 0x04;251mx28_fec_pdata[i].mac[2] = 0x9f;252mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;253mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;254mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;255}256257return 0;258259error:260pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);261return -ETIMEDOUT;262}263264/*265* MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers266*/267static int flexcan0_en, flexcan1_en;268269static void mx28evk_flexcan_switch(void)270{271if (flexcan0_en || flexcan1_en)272gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);273else274gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);275}276277static void mx28evk_flexcan0_switch(int enable)278{279flexcan0_en = enable;280mx28evk_flexcan_switch();281}282283static void mx28evk_flexcan1_switch(int enable)284{285flexcan1_en = enable;286mx28evk_flexcan_switch();287}288289static const struct flexcan_platform_data290mx28evk_flexcan_pdata[] __initconst = {291{292.transceiver_switch = mx28evk_flexcan0_switch,293}, {294.transceiver_switch = mx28evk_flexcan1_switch,295}296};297298/* mxsfb (lcdif) */299static struct fb_videomode mx28evk_video_modes[] = {300{301.name = "Seiko-43WVF1G",302.refresh = 60,303.xres = 800,304.yres = 480,305.pixclock = 29851, /* picosecond (33.5 MHz) */306.left_margin = 89,307.right_margin = 164,308.upper_margin = 23,309.lower_margin = 10,310.hsync_len = 10,311.vsync_len = 10,312.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |313FB_SYNC_DOTCLK_FAILING_ACT,314},315};316317static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {318.mode_list = mx28evk_video_modes,319.mode_count = ARRAY_SIZE(mx28evk_video_modes),320.default_bpp = 32,321.ld_intf_width = STMLCDIF_24BIT,322};323324static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {325{326/* mmc0 */327.wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,328.flags = SLOTF_8_BIT_CAPABLE,329}, {330/* mmc1 */331.wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,332.flags = SLOTF_8_BIT_CAPABLE,333},334};335336static void __init mx28evk_init(void)337{338int ret;339340mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));341342mx28_add_duart();343mx28_add_auart0();344mx28_add_auart3();345346if (mx28evk_fec_get_mac())347pr_warn("%s: failed on fec mac setup\n", __func__);348349mx28evk_fec_reset();350mx28_add_fec(0, &mx28_fec_pdata[0]);351mx28_add_fec(1, &mx28_fec_pdata[1]);352353ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,354"flexcan-switch");355if (ret) {356pr_err("failed to request gpio flexcan-switch: %d\n", ret);357} else {358mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);359mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);360}361362ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");363if (ret)364pr_warn("failed to request gpio lcd-enable: %d\n", ret);365else366gpio_set_value(MX28EVK_LCD_ENABLE, 1);367368ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");369if (ret)370pr_warn("failed to request gpio bl-enable: %d\n", ret);371else372gpio_set_value(MX28EVK_BL_ENABLE, 1);373374mx28_add_mxsfb(&mx28evk_mxsfb_pdata);375376/* power on mmc slot by writing 0 to the gpio */377ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,378"mmc0-slot-power");379if (ret)380pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);381mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);382383ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,384"mmc1-slot-power");385if (ret)386pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);387mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);388}389390static void __init mx28evk_timer_init(void)391{392mx28_clocks_init();393}394395static struct sys_timer mx28evk_timer = {396.init = mx28evk_timer_init,397};398399MACHINE_START(MX28EVK, "Freescale MX28 EVK")400/* Maintainer: Freescale Semiconductor, Inc. */401.map_io = mx28_map_io,402.init_irq = mx28_init_irq,403.init_machine = mx28evk_init,404.timer = &mx28evk_timer,405MACHINE_END406407408