Path: blob/master/arch/arm/mach-omap2/board-flash.c
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/*1* board-flash.c2* Modified from mach-omap2/board-3430sdp-flash.c3*4* Copyright (C) 2009 Nokia Corporation5* Copyright (C) 2009 Texas Instruments6*7* Vimal Singh <[email protected]>8*9* This program is free software; you can redistribute it and/or modify10* it under the terms of the GNU General Public License version 2 as11* published by the Free Software Foundation.12*/1314#include <linux/kernel.h>15#include <linux/platform_device.h>16#include <linux/mtd/physmap.h>17#include <linux/io.h>18#include <plat/irqs.h>1920#include <plat/gpmc.h>21#include <plat/nand.h>22#include <plat/onenand.h>23#include <plat/tc.h>2425#include "board-flash.h"2627#define REG_FPGA_REV 0x1028#define REG_FPGA_DIP_SWITCH_INPUT2 0x6029#define MAX_SUPPORTED_GPMC_CONFIG 33031#define DEBUG_BASE 0x08000000 /* debug board */3233/* various memory sizes */34#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */35#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */3637static struct physmap_flash_data board_nor_data = {38.width = 2,39};4041static struct resource board_nor_resource = {42.flags = IORESOURCE_MEM,43};4445static struct platform_device board_nor_device = {46.name = "physmap-flash",47.id = 0,48.dev = {49.platform_data = &board_nor_data,50},51.num_resources = 1,52.resource = &board_nor_resource,53};5455static void56__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)57{58int err;5960board_nor_data.parts = nor_parts;61board_nor_data.nr_parts = nr_parts;6263/* Configure start address and size of NOR device */64if (omap_rev() >= OMAP3430_REV_ES1_0) {65err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,66(unsigned long *)&board_nor_resource.start);67board_nor_resource.end = board_nor_resource.start68+ FLASH_SIZE_SDPV2 - 1;69} else {70err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,71(unsigned long *)&board_nor_resource.start);72board_nor_resource.end = board_nor_resource.start73+ FLASH_SIZE_SDPV1 - 1;74}75if (err < 0) {76pr_err("NOR: Can't request GPMC CS\n");77return;78}79if (platform_device_register(&board_nor_device) < 0)80pr_err("Unable to register NOR device\n");81}8283#if defined(CONFIG_MTD_ONENAND_OMAP2) || \84defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)85static struct omap_onenand_platform_data board_onenand_data = {86.dma_channel = -1, /* disable DMA in OMAP OneNAND driver */87};8889static void90__init board_onenand_init(struct mtd_partition *onenand_parts,91u8 nr_parts, u8 cs)92{93board_onenand_data.cs = cs;94board_onenand_data.parts = onenand_parts;95board_onenand_data.nr_parts = nr_parts;9697gpmc_onenand_init(&board_onenand_data);98}99#else100static void101__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)102{103}104#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */105106#if defined(CONFIG_MTD_NAND_OMAP2) || \107defined(CONFIG_MTD_NAND_OMAP2_MODULE)108109/* Note that all values in this struct are in nanoseconds */110static struct gpmc_timings nand_timings = {111112.sync_clk = 0,113114.cs_on = 0,115.cs_rd_off = 36,116.cs_wr_off = 36,117118.adv_on = 6,119.adv_rd_off = 24,120.adv_wr_off = 36,121122.we_off = 30,123.oe_off = 48,124125.access = 54,126.rd_cycle = 72,127.wr_cycle = 72,128129.wr_access = 30,130.wr_data_mux_bus = 0,131};132133static struct omap_nand_platform_data board_nand_data = {134.nand_setup = NULL,135.gpmc_t = &nand_timings,136.dma_channel = -1, /* disable DMA in OMAP NAND driver */137.dev_ready = NULL,138.devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */139};140141void142__init board_nand_init(struct mtd_partition *nand_parts,143u8 nr_parts, u8 cs, int nand_type)144{145board_nand_data.cs = cs;146board_nand_data.parts = nand_parts;147board_nand_data.nr_parts = nr_parts;148board_nand_data.devsize = nand_type;149150board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;151board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;152gpmc_nand_init(&board_nand_data);153}154#else155void156__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type)157{158}159#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */160161/**162* get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get163* the various cs values.164*/165static u8 get_gpmc0_type(void)166{167u8 cs = 0;168void __iomem *fpga_map_addr;169170fpga_map_addr = ioremap(DEBUG_BASE, 4096);171if (!fpga_map_addr)172return -ENOMEM;173174if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))175/* we dont have an DEBUG FPGA??? */176/* Depend on #defines!! default to strata boot return param */177goto unmap;178179/* S8-DIP-OFF = 1, S8-DIP-ON = 0 */180cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;181182/* ES2.0 SDP's onwards 4 dip switches are provided for CS */183if (omap_rev() >= OMAP3430_REV_ES1_0)184/* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */185cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |186((cs & 2) << 1) | ((cs & 1) << 3);187else188/* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */189cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);190unmap:191iounmap(fpga_map_addr);192return cs;193}194195/**196* board_flash_init - Identify devices connected to GPMC and register.197*198* @return - void.199*/200void board_flash_init(struct flash_partitions partition_info[],201char chip_sel_board[][GPMC_CS_NUM], int nand_type)202{203u8 cs = 0;204u8 norcs = GPMC_CS_NUM + 1;205u8 nandcs = GPMC_CS_NUM + 1;206u8 onenandcs = GPMC_CS_NUM + 1;207u8 idx;208unsigned char *config_sel = NULL;209210/* REVISIT: Is this return correct idx for 2430 SDP?211* for which cs configuration matches for 2430 SDP?212*/213idx = get_gpmc0_type();214if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {215pr_err("%s: Invalid chip select: %d\n", __func__, cs);216return;217}218config_sel = (unsigned char *)(chip_sel_board[idx]);219220while (cs < GPMC_CS_NUM) {221switch (config_sel[cs]) {222case PDC_NOR:223if (norcs > GPMC_CS_NUM)224norcs = cs;225break;226case PDC_NAND:227if (nandcs > GPMC_CS_NUM)228nandcs = cs;229break;230case PDC_ONENAND:231if (onenandcs > GPMC_CS_NUM)232onenandcs = cs;233break;234};235cs++;236}237238if (norcs > GPMC_CS_NUM)239pr_err("NOR: Unable to find configuration in GPMC\n");240else241board_nor_init(partition_info[0].parts,242partition_info[0].nr_parts, norcs);243244if (onenandcs > GPMC_CS_NUM)245pr_err("OneNAND: Unable to find configuration in GPMC\n");246else247board_onenand_init(partition_info[1].parts,248partition_info[1].nr_parts, onenandcs);249250if (nandcs > GPMC_CS_NUM)251pr_err("NAND: Unable to find configuration in GPMC\n");252else253board_nand_init(partition_info[2].parts,254partition_info[2].nr_parts, nandcs, nand_type);255}256257258