Path: blob/master/arch/arm/mach-orion5x/include/mach/bridge-regs.h
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/*1* arch/arm/mach-orion5x/include/mach/bridge-regs.h2*3* Orion CPU Bridge Registers4*5* This file is licensed under the terms of the GNU General Public6* License version 2. This program is licensed "as is" without any7* warranty of any kind, whether express or implied.8*/910#ifndef __ASM_ARCH_BRIDGE_REGS_H11#define __ASM_ARCH_BRIDGE_REGS_H1213#include <mach/orion5x.h>1415#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE | 0x100)1617#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104)1819#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108)20#define WDT_RESET_OUT_EN 0x00022122#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)2324#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)2526#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)2728#define WDT_INT_REQ 0x00082930#define BRIDGE_INT_TIMER1_CLR (~0x0004)3132#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)3334#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204)3536#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)3738#endif394041