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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/arm/mach-realview/include/mach/board-pba8.h
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/*

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 * include/asm-arm/arch-realview/board-pba8.h

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 *

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 * Copyright (C) 2008 ARM Limited

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 *

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 * This program is free software; you can redistribute it and/or modify

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 * it under the terms of the GNU General Public License version 2 as

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 * published by the Free Software Foundation.

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 *

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 * This program is distributed in the hope that it will be useful,

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 * but WITHOUT ANY WARRANTY; without even the implied warranty of

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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 * GNU General Public License for more details.

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 *

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 * You should have received a copy of the GNU General Public License

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 * along with this program; if not, write to the Free Software

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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,

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 * MA 02110-1301, USA.

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 */

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#ifndef __ASM_ARCH_BOARD_PBA8_H

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#define __ASM_ARCH_BOARD_PBA8_H

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#include <mach/platform.h>

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/*

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 * Peripheral addresses

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 */

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#define REALVIEW_PBA8_UART0_BASE		0x10009000	/* UART 0 */

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#define REALVIEW_PBA8_UART1_BASE		0x1000A000	/* UART 1 */

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#define REALVIEW_PBA8_UART2_BASE		0x1000B000	/* UART 2 */

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#define REALVIEW_PBA8_UART3_BASE		0x1000C000	/* UART 3 */

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#define REALVIEW_PBA8_SSP_BASE			0x1000D000	/* Synchronous Serial Port */

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#define REALVIEW_PBA8_WATCHDOG0_BASE		0x1000F000	/* Watchdog 0 */

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#define REALVIEW_PBA8_WATCHDOG_BASE		0x10010000	/* watchdog interface */

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#define REALVIEW_PBA8_TIMER0_1_BASE		0x10011000	/* Timer 0 and 1 */

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#define REALVIEW_PBA8_TIMER2_3_BASE		0x10012000	/* Timer 2 and 3 */

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#define REALVIEW_PBA8_GPIO0_BASE		0x10013000	/* GPIO port 0 */

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#define REALVIEW_PBA8_RTC_BASE			0x10017000	/* Real Time Clock */

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#define REALVIEW_PBA8_TIMER4_5_BASE		0x10018000	/* Timer 4/5 */

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#define REALVIEW_PBA8_TIMER6_7_BASE		0x10019000	/* Timer 6/7 */

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#define REALVIEW_PBA8_SCTL_BASE			0x1001A000	/* System Controller */

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#define REALVIEW_PBA8_CLCD_BASE			0x10020000	/* CLCD */

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#define REALVIEW_PBA8_ONB_SRAM_BASE		0x10060000	/* On-board SRAM */

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#define REALVIEW_PBA8_DMC_BASE			0x100E0000	/* DMC configuration */

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#define REALVIEW_PBA8_SMC_BASE			0x100E1000	/* SMC configuration */

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#define REALVIEW_PBA8_CAN_BASE			0x100E2000	/* CAN bus */

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#define REALVIEW_PBA8_GIC_CPU_BASE		0x1E000000	/* Generic interrupt controller CPU interface */

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#define REALVIEW_PBA8_FLASH0_BASE		0x40000000

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#define REALVIEW_PBA8_FLASH0_SIZE		SZ_64M

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#define REALVIEW_PBA8_FLASH1_BASE		0x44000000

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#define REALVIEW_PBA8_FLASH1_SIZE		SZ_64M

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#define REALVIEW_PBA8_ETH_BASE			0x4E000000	/* Ethernet */

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#define REALVIEW_PBA8_USB_BASE			0x4F000000	/* USB */

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#define REALVIEW_PBA8_GIC_DIST_BASE		0x1E001000	/* Generic interrupt controller distributor */

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#define REALVIEW_PBA8_LT_BASE			0xC0000000	/* Logic Tile expansion */

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#define REALVIEW_PBA8_SDRAM6_BASE		0x70000000	/* SDRAM bank 6 256MB */

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#define REALVIEW_PBA8_SDRAM7_BASE		0x80000000	/* SDRAM bank 7 256MB */

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#define REALVIEW_PBA8_SYS_PLD_CTRL1		0x74

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/*

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 * PBA8 PCI regions

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 */

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#define REALVIEW_PBA8_PCI_BASE			0x90040000	/* PCI-X Unit base */

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#define REALVIEW_PBA8_PCI_IO_BASE		0x90050000	/* IO Region on AHB */

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#define REALVIEW_PBA8_PCI_MEM_BASE		0xA0000000	/* MEM Region on AHB */

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#define REALVIEW_PBA8_PCI_BASE_SIZE		0x10000		/* 16 Kb */

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#define REALVIEW_PBA8_PCI_IO_SIZE		0x1000		/* 4 Kb */

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#define REALVIEW_PBA8_PCI_MEM_SIZE		0x20000000	/* 512 MB */

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#endif	/* __ASM_ARCH_BOARD_PBA8_H */

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