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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/avr32/mach-at32ap/clock.c
10817 views
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/*
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* Clock management for AT32AP CPUs
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* Based on arch/arm/mach-at91/clock.c
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* Copyright (C) 2005 David Brownell
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* Copyright (C) 2005 Ivan Kokshaysky
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/device.h>
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#include <linux/string.h>
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#include <linux/list.h>
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#include <mach/chip.h>
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#include "clock.h"
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/* at32 clock list */
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static LIST_HEAD(at32_clock_list);
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static DEFINE_SPINLOCK(clk_lock);
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static DEFINE_SPINLOCK(clk_list_lock);
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void at32_clk_register(struct clk *clk)
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{
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spin_lock(&clk_list_lock);
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/* add the new item to the end of the list */
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list_add_tail(&clk->list, &at32_clock_list);
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spin_unlock(&clk_list_lock);
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}
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static struct clk *__clk_get(struct device *dev, const char *id)
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{
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struct clk *clk;
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list_for_each_entry(clk, &at32_clock_list, list) {
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if (clk->dev == dev && strcmp(id, clk->name) == 0) {
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return clk;
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}
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}
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return ERR_PTR(-ENOENT);
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}
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *clk;
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spin_lock(&clk_list_lock);
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clk = __clk_get(dev, id);
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spin_unlock(&clk_list_lock);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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/* clocks are static for now, we can't free them */
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}
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EXPORT_SYMBOL(clk_put);
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static void __clk_enable(struct clk *clk)
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{
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if (clk->parent)
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__clk_enable(clk->parent);
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if (clk->users++ == 0 && clk->mode)
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clk->mode(clk, 1);
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}
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clk_lock, flags);
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__clk_enable(clk);
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spin_unlock_irqrestore(&clk_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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static void __clk_disable(struct clk *clk)
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{
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if (clk->users == 0) {
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printk(KERN_ERR "%s: mismatched disable\n", clk->name);
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WARN_ON(1);
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return;
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}
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if (--clk->users == 0 && clk->mode)
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clk->mode(clk, 0);
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if (clk->parent)
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__clk_disable(clk->parent);
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}
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clk_lock, flags);
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__clk_disable(clk);
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spin_unlock_irqrestore(&clk_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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unsigned long flags;
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unsigned long rate;
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spin_lock_irqsave(&clk_lock, flags);
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rate = clk->get_rate(clk);
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spin_unlock_irqrestore(&clk_lock, flags);
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return rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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unsigned long flags, actual_rate;
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if (!clk->set_rate)
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return -ENOSYS;
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spin_lock_irqsave(&clk_lock, flags);
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actual_rate = clk->set_rate(clk, rate, 0);
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spin_unlock_irqrestore(&clk_lock, flags);
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return actual_rate;
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}
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EXPORT_SYMBOL(clk_round_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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unsigned long flags;
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long ret;
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if (!clk->set_rate)
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return -ENOSYS;
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spin_lock_irqsave(&clk_lock, flags);
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ret = clk->set_rate(clk, rate, 1);
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spin_unlock_irqrestore(&clk_lock, flags);
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return (ret < 0) ? ret : 0;
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}
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EXPORT_SYMBOL(clk_set_rate);
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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unsigned long flags;
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int ret;
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if (!clk->set_parent)
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return -ENOSYS;
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spin_lock_irqsave(&clk_lock, flags);
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ret = clk->set_parent(clk, parent);
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spin_unlock_irqrestore(&clk_lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(clk_set_parent);
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struct clk *clk_get_parent(struct clk *clk)
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{
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return clk->parent;
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}
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EXPORT_SYMBOL(clk_get_parent);
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#ifdef CONFIG_DEBUG_FS
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/* /sys/kernel/debug/at32ap_clk */
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#include <linux/io.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include "pm.h"
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#define NEST_DELTA 2
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#define NEST_MAX 6
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struct clkinf {
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struct seq_file *s;
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unsigned nest;
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};
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static void
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dump_clock(struct clk *parent, struct clkinf *r)
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{
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unsigned nest = r->nest;
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char buf[16 + NEST_MAX];
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struct clk *clk;
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unsigned i;
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/* skip clocks coupled to devices that aren't registered */
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if (parent->dev && !dev_name(parent->dev) && !parent->users)
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return;
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/* <nest spaces> name <pad to end> */
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memset(buf, ' ', sizeof(buf) - 1);
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buf[sizeof(buf) - 1] = 0;
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i = strlen(parent->name);
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memcpy(buf + nest, parent->name,
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min(i, (unsigned)(sizeof(buf) - 1 - nest)));
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seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
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buf, parent->set_parent ? '*' : ' ',
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parent->users,
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parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
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clk_get_rate(parent));
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if (parent->dev)
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seq_printf(r->s, ", for %s", dev_name(parent->dev));
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seq_printf(r->s, "\n");
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/* cost of this scan is small, but not linear... */
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r->nest = nest + NEST_DELTA;
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list_for_each_entry(clk, &at32_clock_list, list) {
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if (clk->parent == parent)
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dump_clock(clk, r);
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}
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r->nest = nest;
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}
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static int clk_show(struct seq_file *s, void *unused)
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{
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struct clkinf r;
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int i;
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struct clk *clk;
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/* show all the power manager registers */
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seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
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seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
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seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
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seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
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seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
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seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
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seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
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seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
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seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
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for (i = 0; i < 8; i++) {
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if (i == 5)
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continue;
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seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
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}
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seq_printf(s, "\n");
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r.s = s;
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r.nest = 0;
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/* protected from changes on the list while dumping */
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spin_lock(&clk_list_lock);
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/* show clock tree as derived from the three oscillators */
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clk = __clk_get(NULL, "osc32k");
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dump_clock(clk, &r);
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clk_put(clk);
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clk = __clk_get(NULL, "osc0");
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dump_clock(clk, &r);
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clk_put(clk);
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clk = __clk_get(NULL, "osc1");
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dump_clock(clk, &r);
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clk_put(clk);
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spin_unlock(&clk_list_lock);
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return 0;
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}
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static int clk_open(struct inode *inode, struct file *file)
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{
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return single_open(file, clk_show, NULL);
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}
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static const struct file_operations clk_operations = {
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.open = clk_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int __init clk_debugfs_init(void)
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{
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(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
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NULL, NULL, &clk_operations);
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return 0;
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}
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postcore_initcall(clk_debugfs_init);
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#endif
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