Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
10820 views
1
/*
2
* Pin definitions for AT32AP7000.
3
*
4
* Copyright (C) 2006 Atmel Corporation
5
*
6
* This program is free software; you can redistribute it and/or modify
7
* it under the terms of the GNU General Public License version 2 as
8
* published by the Free Software Foundation.
9
*/
10
#ifndef __ASM_ARCH_AT32AP700X_H__
11
#define __ASM_ARCH_AT32AP700X_H__
12
13
#define GPIO_PERIPH_A 0
14
#define GPIO_PERIPH_B 1
15
16
/*
17
* Pin numbers identifying specific GPIO pins on the chip. They can
18
* also be converted to IRQ numbers by passing them through
19
* gpio_to_irq().
20
*/
21
#define GPIO_PIOA_BASE (0)
22
#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
23
#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
24
#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
25
#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
26
27
#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
28
#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
29
#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
30
#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
31
#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
32
33
34
/*
35
* DMAC peripheral hardware handshaking interfaces, used with dw_dmac
36
*/
37
#define DMAC_MCI_RX 0
38
#define DMAC_MCI_TX 1
39
#define DMAC_DAC_TX 2
40
#define DMAC_AC97_A_RX 3
41
#define DMAC_AC97_A_TX 4
42
#define DMAC_AC97_B_RX 5
43
#define DMAC_AC97_B_TX 6
44
#define DMAC_DMAREQ_0 7
45
#define DMAC_DMAREQ_1 8
46
#define DMAC_DMAREQ_2 9
47
#define DMAC_DMAREQ_3 10
48
49
/* HSB master IDs */
50
#define HMATRIX_MASTER_CPU_DCACHE 0
51
#define HMATRIX_MASTER_CPU_ICACHE 1
52
#define HMATRIX_MASTER_PDC 2
53
#define HMATRIX_MASTER_ISI 3
54
#define HMATRIX_MASTER_USBA 4
55
#define HMATRIX_MASTER_LCDC 5
56
#define HMATRIX_MASTER_MACB0 6
57
#define HMATRIX_MASTER_MACB1 7
58
#define HMATRIX_MASTER_DMACA_M0 8
59
#define HMATRIX_MASTER_DMACA_M1 9
60
61
/* HSB slave IDs */
62
#define HMATRIX_SLAVE_SRAM0 0
63
#define HMATRIX_SLAVE_SRAM1 1
64
#define HMATRIX_SLAVE_PBA 2
65
#define HMATRIX_SLAVE_PBB 3
66
#define HMATRIX_SLAVE_EBI 4
67
#define HMATRIX_SLAVE_USBA 5
68
#define HMATRIX_SLAVE_LCDC 6
69
#define HMATRIX_SLAVE_DMACA 7
70
71
/* Bits in HMATRIX SFR4 (EBI) */
72
#define HMATRIX_EBI_SDRAM_ENABLE (1 << 1)
73
#define HMATRIX_EBI_NAND_ENABLE (1 << 3)
74
#define HMATRIX_EBI_CF0_ENABLE (1 << 4)
75
#define HMATRIX_EBI_CF1_ENABLE (1 << 5)
76
#define HMATRIX_EBI_PULLUP_DISABLE (1 << 8)
77
78
/*
79
* Base addresses of controllers that may be accessed early by
80
* platform code.
81
*/
82
#define PM_BASE 0xfff00000
83
#define HMATRIX_BASE 0xfff00800
84
#define SDRAMC_BASE 0xfff03800
85
86
/* LCDC on port C */
87
#define ATMEL_LCDC_PC_CC (1ULL << 19)
88
#define ATMEL_LCDC_PC_HSYNC (1ULL << 20)
89
#define ATMEL_LCDC_PC_PCLK (1ULL << 21)
90
#define ATMEL_LCDC_PC_VSYNC (1ULL << 22)
91
#define ATMEL_LCDC_PC_DVAL (1ULL << 23)
92
#define ATMEL_LCDC_PC_MODE (1ULL << 24)
93
#define ATMEL_LCDC_PC_PWR (1ULL << 25)
94
#define ATMEL_LCDC_PC_DATA0 (1ULL << 26)
95
#define ATMEL_LCDC_PC_DATA1 (1ULL << 27)
96
#define ATMEL_LCDC_PC_DATA2 (1ULL << 28)
97
#define ATMEL_LCDC_PC_DATA3 (1ULL << 29)
98
#define ATMEL_LCDC_PC_DATA4 (1ULL << 30)
99
#define ATMEL_LCDC_PC_DATA5 (1ULL << 31)
100
101
/* LCDC on port D */
102
#define ATMEL_LCDC_PD_DATA6 (1ULL << 0)
103
#define ATMEL_LCDC_PD_DATA7 (1ULL << 1)
104
#define ATMEL_LCDC_PD_DATA8 (1ULL << 2)
105
#define ATMEL_LCDC_PD_DATA9 (1ULL << 3)
106
#define ATMEL_LCDC_PD_DATA10 (1ULL << 4)
107
#define ATMEL_LCDC_PD_DATA11 (1ULL << 5)
108
#define ATMEL_LCDC_PD_DATA12 (1ULL << 6)
109
#define ATMEL_LCDC_PD_DATA13 (1ULL << 7)
110
#define ATMEL_LCDC_PD_DATA14 (1ULL << 8)
111
#define ATMEL_LCDC_PD_DATA15 (1ULL << 9)
112
#define ATMEL_LCDC_PD_DATA16 (1ULL << 10)
113
#define ATMEL_LCDC_PD_DATA17 (1ULL << 11)
114
#define ATMEL_LCDC_PD_DATA18 (1ULL << 12)
115
#define ATMEL_LCDC_PD_DATA19 (1ULL << 13)
116
#define ATMEL_LCDC_PD_DATA20 (1ULL << 14)
117
#define ATMEL_LCDC_PD_DATA21 (1ULL << 15)
118
#define ATMEL_LCDC_PD_DATA22 (1ULL << 16)
119
#define ATMEL_LCDC_PD_DATA23 (1ULL << 17)
120
121
/* LCDC on port E */
122
#define ATMEL_LCDC_PE_CC (1ULL << (32 + 0))
123
#define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1))
124
#define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2))
125
#define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3))
126
#define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4))
127
#define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5))
128
#define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6))
129
#define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7))
130
#define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8))
131
#define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9))
132
#define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10))
133
#define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11))
134
#define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12))
135
#define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13))
136
#define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14))
137
#define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15))
138
#define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16))
139
#define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17))
140
#define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18))
141
142
143
#define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN)
144
145
146
#define ATMEL_LCDC_PRI_24B_DATA ( \
147
ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
148
ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
149
ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
150
ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
151
ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
152
ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
153
ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
154
ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
155
ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \
156
ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
157
ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
158
ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
159
160
#define ATMEL_LCDC_ALT_24B_DATA ( \
161
ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
162
ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
163
ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
164
ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
165
ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
166
ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
167
ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
168
ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
169
ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \
170
ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
171
ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
172
ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
173
174
#define ATMEL_LCDC_PRI_18B_DATA ( \
175
ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
176
ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
177
ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
178
ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
179
ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
180
ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
181
ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
182
ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
183
ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
184
185
#define ATMEL_LCDC_ALT_18B_DATA ( \
186
ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
187
ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
188
ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
189
ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
190
ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
191
ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
192
ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
193
ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
194
ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
195
196
#define ATMEL_LCDC_PRI_15B_DATA ( \
197
ATMEL_LCDC(PC, DATA3) | ATMEL_LCDC(PC, DATA4) | \
198
ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \
199
ATMEL_LCDC(PD, DATA7) | \
200
ATMEL_LCDC(PD, DATA11) | ATMEL_LCDC(PD, DATA12) | \
201
ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \
202
ATMEL_LCDC(PD, DATA15) | \
203
ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20) | \
204
ATMEL_LCDC(PD, DATA21) | ATMEL_LCDC(PD, DATA22) | \
205
ATMEL_LCDC(PD, DATA23))
206
207
#define ATMEL_LCDC_ALT_15B_DATA ( \
208
ATMEL_LCDC(PE, DATA3) | ATMEL_LCDC(PE, DATA4) | \
209
ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \
210
ATMEL_LCDC(PD, DATA7) | \
211
ATMEL_LCDC(PE, DATA11) | ATMEL_LCDC(PE, DATA12) | \
212
ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \
213
ATMEL_LCDC(PD, DATA15) | \
214
ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20) | \
215
ATMEL_LCDC(PE, DATA21) | ATMEL_LCDC(PD, DATA22) | \
216
ATMEL_LCDC(PD, DATA23))
217
218
#define ATMEL_LCDC_PRI_CONTROL ( \
219
ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \
220
ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
221
222
#define ATMEL_LCDC_ALT_CONTROL ( \
223
ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \
224
ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
225
226
#define ATMEL_LCDC_CONTROL ( \
227
ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \
228
ATMEL_LCDC(PC, PCLK))
229
230
#define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
231
232
#define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
233
234
#define ATMEL_LCDC_PRI_18BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_18B_DATA)
235
236
#define ATMEL_LCDC_ALT_18BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_18B_DATA)
237
238
#define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
239
240
#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
241
242
/* Bitmask for all EBI data (D16..D31) pins on port E */
243
#define ATMEL_EBI_PE_DATA_ALL (0x0000FFFF)
244
245
#endif /* __ASM_ARCH_AT32AP700X_H__ */
246
247