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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/blackfin/include/asm/cplbinit.h
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/*

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 * Common CPLB definitions for CPLB init

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 *

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 * Copyright 2006-2008 Analog Devices Inc.

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 *

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 * Licensed under the GPL-2 or later.

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 */

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#ifndef __ASM_CPLBINIT_H__

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#define __ASM_CPLBINIT_H__

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#include <asm/blackfin.h>

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#include <asm/cplb.h>

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#include <linux/threads.h>

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#ifdef CONFIG_CPLB_SWITCH_TAB_L1

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# define PDT_ATTR __attribute__((l1_data))

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#else

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# define PDT_ATTR

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#endif

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struct cplb_entry {

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	unsigned long data, addr;

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};

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struct cplb_boundary {

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	unsigned long eaddr; /* End of this region.  */

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	unsigned long data; /* CPLB data value.  */

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};

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extern struct cplb_boundary dcplb_bounds[];

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extern struct cplb_boundary icplb_bounds[];

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extern int dcplb_nr_bounds, icplb_nr_bounds;

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extern struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS];

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extern struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS];

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extern int first_switched_icplb;

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extern int first_switched_dcplb;

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extern int nr_dcplb_miss[], nr_icplb_miss[], nr_icplb_supv_miss[];

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extern int nr_dcplb_prot[], nr_cplb_flush[];

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#ifdef CONFIG_MPU

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extern int first_mask_dcplb;

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extern int page_mask_order;

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extern int page_mask_nelts;

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extern unsigned long *current_rwx_mask[NR_CPUS];

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extern void flush_switched_cplbs(unsigned int);

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extern void set_mask_dcplbs(unsigned long *, unsigned int);

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extern void __noreturn panic_cplb_error(int seqstat, struct pt_regs *);

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#endif /* CONFIG_MPU */

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extern void bfin_icache_init(struct cplb_entry *icplb_tbl);

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extern void bfin_dcache_init(struct cplb_entry *icplb_tbl);

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#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)

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extern void generate_cplb_tables_all(void);

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extern void generate_cplb_tables_cpu(unsigned int cpu);

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#endif

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#endif

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