Path: blob/master/arch/blackfin/include/mach-common/irq.h
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/*1* Common Blackfin IRQ definitions (i.e. the CEC)2*3* Copyright 2005-2011 Analog Devices Inc.4*5* Licensed under the GPL-2 or later6*/78#ifndef _MACH_COMMON_IRQ_H_9#define _MACH_COMMON_IRQ_H_1011/*12* Core events interrupt source definitions13*14* Event Source Event Name15* Emulation EMU 0 (highest priority)16* Reset RST 117* NMI NMI 218* Exception EVX 319* Reserved -- 420* Hardware Error IVHW 521* Core Timer IVTMR 622* Peripherals IVG7 723* Peripherals IVG8 824* Peripherals IVG9 925* Peripherals IVG10 1026* Peripherals IVG11 1127* Peripherals IVG12 1228* Peripherals IVG13 1329* Softirq IVG14 1430* System Call IVG15 15 (lowest priority)31*/3233/* The ABSTRACT IRQ definitions */34#define IRQ_EMU 0 /* Emulation */35#define IRQ_RST 1 /* reset */36#define IRQ_NMI 2 /* Non Maskable */37#define IRQ_EVX 3 /* Exception */38#define IRQ_UNUSED 4 /* - unused interrupt */39#define IRQ_HWERR 5 /* Hardware Error */40#define IRQ_CORETMR 6 /* Core timer */4142#define BFIN_IRQ(x) ((x) + 7)4344#define IVG7 745#define IVG8 846#define IVG9 947#define IVG10 1048#define IVG11 1149#define IVG12 1250#define IVG13 1351#define IVG14 1452#define IVG15 155354#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)5556#endif575859