/*1* arch/blackfin/kernel/reboot.c - handle shutdown/reboot2*3* Copyright 2004-2007 Analog Devices Inc.4*5* Licensed under the GPL-2 or later.6*/78#include <linux/interrupt.h>9#include <asm/bfin-global.h>10#include <asm/reboot.h>11#include <asm/system.h>12#include <asm/bfrom.h>1314/* A system soft reset makes external memory unusable so force15* this function into L1. We use the compiler ssync here rather16* than SSYNC() because it's safe (no interrupts and such) and17* we save some L1. We do not need to force sanity in the SYSCR18* register as the BMODE selection bit is cleared by the soft19* reset while the Core B bit (on dual core parts) is cleared by20* the core reset.21*/22__attribute__ ((__l1_text__, __noreturn__))23static void bfin_reset(void)24{25if (!ANOMALY_05000353 && !ANOMALY_05000386)26bfrom_SoftReset((void *)(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 20));2728/* Wait for completion of "system" events such as cache line29* line fills so that we avoid infinite stalls later on as30* much as possible. This code is in L1, so it won't trigger31* any such event after this point in time.32*/33__builtin_bfin_ssync();3435/* Initiate System software reset. */36bfin_write_SWRST(0x7);3738/* Due to the way reset is handled in the hardware, we need39* to delay for 10 SCLKS. The only reliable way to do this is40* to calculate the CCLK/SCLK ratio and multiply 10. For now,41* we'll assume worse case which is a 1:15 ratio.42*/43asm(44"LSETUP (1f, 1f) LC0 = %0\n"45"1: nop;"46:47: "a" (15 * 10)48: "LC0", "LB0", "LT0"49);5051/* Clear System software reset */52bfin_write_SWRST(0);5354/* The BF526 ROM will crash during reset */55#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)56bfin_read_SWRST();57#endif5859/* Wait for the SWRST write to complete. Cannot rely on SSYNC60* though as the System state is all reset now.61*/62asm(63"LSETUP (1f, 1f) LC1 = %0\n"64"1: nop;"65:66: "a" (15 * 1)67: "LC1", "LB1", "LT1"68);6970while (1)71/* Issue core reset */72asm("raise 1");73}7475__attribute__((weak))76void native_machine_restart(char *cmd)77{78}7980void machine_restart(char *cmd)81{82native_machine_restart(cmd);83local_irq_disable();84if (smp_processor_id())85smp_call_function((void *)bfin_reset, 0, 1);86else87bfin_reset();88}8990__attribute__((weak))91void native_machine_halt(void)92{93idle_with_irq_disabled();94}9596void machine_halt(void)97{98native_machine_halt();99}100101__attribute__((weak))102void native_machine_power_off(void)103{104idle_with_irq_disabled();105}106107void machine_power_off(void)108{109native_machine_power_off();110}111112113