Path: blob/master/arch/blackfin/mach-bf518/boards/tcm-bf518.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2005 National ICT Australia (NICTA)3* Aidan Williams <[email protected]>4*5* Licensed under the GPL-2 or later.6*/78#include <linux/device.h>9#include <linux/etherdevice.h>10#include <linux/platform_device.h>11#include <linux/mtd/mtd.h>12#include <linux/mtd/partitions.h>13#include <linux/mtd/physmap.h>14#include <linux/spi/spi.h>15#include <linux/spi/flash.h>1617#include <linux/i2c.h>18#include <linux/irq.h>19#include <linux/interrupt.h>20#include <asm/dma.h>21#include <asm/bfin5xx_spi.h>22#include <asm/reboot.h>23#include <asm/portmux.h>24#include <asm/dpmc.h>25#include <asm/bfin_sdh.h>26#include <linux/spi/ad7877.h>27#include <net/dsa.h>2829/*30* Name the Board for the /proc/cpuinfo31*/32const char bfin_board_name[] = "Bluetechnix TCM-BF518";3334/*35* Driver needs to know address, irq and flag pin.36*/3738#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)39static struct mtd_partition tcm_partitions[] = {40{41.name = "bootloader(nor)",42.size = 0x40000,43.offset = 0,44},45{46.name = "linux(nor)",47.size = 0x1C0000,48.offset = MTDPART_OFS_APPEND,49}50};5152static struct physmap_flash_data tcm_flash_data = {53.width = 2,54.parts = tcm_partitions,55.nr_parts = ARRAY_SIZE(tcm_partitions),56};5758static struct resource tcm_flash_resource = {59.start = 0x20000000,60.end = 0x201fffff,61.flags = IORESOURCE_MEM,62};6364static struct platform_device tcm_flash_device = {65.name = "physmap-flash",66.id = 0,67.dev = {68.platform_data = &tcm_flash_data,69},70.num_resources = 1,71.resource = &tcm_flash_resource,72};73#endif7475#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)76static struct platform_device rtc_device = {77.name = "rtc-bfin",78.id = -1,79};80#endif8182#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)83#include <linux/bfin_mac.h>84static const unsigned short bfin_mac_peripherals[] = P_MII0;8586static struct bfin_phydev_platform_data bfin_phydev_data[] = {87{88.addr = 1,89.irq = IRQ_MAC_PHYINT,90},91};9293static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {94.phydev_number = 1,95.phydev_data = bfin_phydev_data,96.phy_mode = PHY_INTERFACE_MODE_MII,97.mac_peripherals = bfin_mac_peripherals,98};99100static struct platform_device bfin_mii_bus = {101.name = "bfin_mii_bus",102.dev = {103.platform_data = &bfin_mii_bus_data,104}105};106107static struct platform_device bfin_mac_device = {108.name = "bfin_mac",109.dev = {110.platform_data = &bfin_mii_bus,111}112};113#endif114115#if defined(CONFIG_MTD_M25P80) \116|| defined(CONFIG_MTD_M25P80_MODULE)117static struct mtd_partition bfin_spi_flash_partitions[] = {118{119.name = "bootloader(spi)",120.size = 0x00040000,121.offset = 0,122.mask_flags = MTD_CAP_ROM123}, {124.name = "linux kernel(spi)",125.size = MTDPART_SIZ_FULL,126.offset = MTDPART_OFS_APPEND,127}128};129130static struct flash_platform_data bfin_spi_flash_data = {131.name = "m25p80",132.parts = bfin_spi_flash_partitions,133.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),134.type = "m25p16",135};136137/* SPI flash chip (m25p64) */138static struct bfin5xx_spi_chip spi_flash_chip_info = {139.enable_dma = 0, /* use dma transfer with this chip*/140.bits_per_word = 8,141};142#endif143144#if defined(CONFIG_BFIN_SPI_ADC) \145|| defined(CONFIG_BFIN_SPI_ADC_MODULE)146/* SPI ADC chip */147static struct bfin5xx_spi_chip spi_adc_chip_info = {148.enable_dma = 1, /* use dma transfer with this chip*/149.bits_per_word = 16,150};151#endif152153#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)154static struct bfin5xx_spi_chip mmc_spi_chip_info = {155.enable_dma = 0,156.bits_per_word = 8,157};158#endif159160#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)161static struct bfin5xx_spi_chip spi_ad7877_chip_info = {162.enable_dma = 0,163.bits_per_word = 16,164};165166static const struct ad7877_platform_data bfin_ad7877_ts_info = {167.model = 7877,168.vref_delay_usecs = 50, /* internal, no capacitor */169.x_plate_ohms = 419,170.y_plate_ohms = 486,171.pressure_max = 1000,172.pressure_min = 0,173.stopacq_polarity = 1,174.first_conversion_delay = 3,175.acquisition_time = 1,176.averaging = 1,177.pen_down_acc_interval = 1,178};179#endif180181#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \182&& defined(CONFIG_SND_SOC_WM8731_SPI)183static struct bfin5xx_spi_chip spi_wm8731_chip_info = {184.enable_dma = 0,185.bits_per_word = 16,186};187#endif188189#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)190static struct bfin5xx_spi_chip spidev_chip_info = {191.enable_dma = 0,192.bits_per_word = 8,193};194#endif195196static struct spi_board_info bfin_spi_board_info[] __initdata = {197#if defined(CONFIG_MTD_M25P80) \198|| defined(CONFIG_MTD_M25P80_MODULE)199{200/* the modalias must be the same as spi device driver name */201.modalias = "m25p80", /* Name of spi_driver for this device */202.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */203.bus_num = 0, /* Framework bus number */204.chip_select = 2, /* SPI0_SSEL2 */205.platform_data = &bfin_spi_flash_data,206.controller_data = &spi_flash_chip_info,207.mode = SPI_MODE_3,208},209#endif210211#if defined(CONFIG_BFIN_SPI_ADC) \212|| defined(CONFIG_BFIN_SPI_ADC_MODULE)213{214.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */215.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */216.bus_num = 0, /* Framework bus number */217.chip_select = 1, /* Framework chip select. */218.platform_data = NULL, /* No spi_driver specific config */219.controller_data = &spi_adc_chip_info,220},221#endif222223#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)224{225.modalias = "mmc_spi",226.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */227.bus_num = 0,228.chip_select = 5,229.controller_data = &mmc_spi_chip_info,230.mode = SPI_MODE_3,231},232#endif233#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)234{235.modalias = "ad7877",236.platform_data = &bfin_ad7877_ts_info,237.irq = IRQ_PF8,238.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */239.bus_num = 0,240.chip_select = 2,241.controller_data = &spi_ad7877_chip_info,242},243#endif244#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \245&& defined(CONFIG_SND_SOC_WM8731_SPI)246{247.modalias = "wm8731",248.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */249.bus_num = 0,250.chip_select = 5,251.controller_data = &spi_wm8731_chip_info,252.mode = SPI_MODE_0,253},254#endif255#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)256{257.modalias = "spidev",258.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */259.bus_num = 0,260.chip_select = 1,261.controller_data = &spidev_chip_info,262},263#endif264#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)265{266.modalias = "bfin-lq035q1-spi",267.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */268.bus_num = 0,269.chip_select = 1,270.controller_data = &lq035q1_spi_chip_info,271.mode = SPI_CPHA | SPI_CPOL,272},273#endif274};275276/* SPI controller data */277#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)278/* SPI (0) */279static struct bfin5xx_spi_master bfin_spi0_info = {280.num_chipselect = 6,281.enable_dma = 1, /* master has the ability to do dma transfer */282.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},283};284285static struct resource bfin_spi0_resource[] = {286[0] = {287.start = SPI0_REGBASE,288.end = SPI0_REGBASE + 0xFF,289.flags = IORESOURCE_MEM,290},291[1] = {292.start = CH_SPI0,293.end = CH_SPI0,294.flags = IORESOURCE_DMA,295},296[2] = {297.start = IRQ_SPI0,298.end = IRQ_SPI0,299.flags = IORESOURCE_IRQ,300},301};302303static struct platform_device bfin_spi0_device = {304.name = "bfin-spi",305.id = 0, /* Bus number */306.num_resources = ARRAY_SIZE(bfin_spi0_resource),307.resource = bfin_spi0_resource,308.dev = {309.platform_data = &bfin_spi0_info, /* Passed to driver */310},311};312313/* SPI (1) */314static struct bfin5xx_spi_master bfin_spi1_info = {315.num_chipselect = 6,316.enable_dma = 1, /* master has the ability to do dma transfer */317.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},318};319320static struct resource bfin_spi1_resource[] = {321[0] = {322.start = SPI1_REGBASE,323.end = SPI1_REGBASE + 0xFF,324.flags = IORESOURCE_MEM,325},326[1] = {327.start = CH_SPI1,328.end = CH_SPI1,329.flags = IORESOURCE_DMA,330},331[2] = {332.start = IRQ_SPI1,333.end = IRQ_SPI1,334.flags = IORESOURCE_IRQ,335},336};337338static struct platform_device bfin_spi1_device = {339.name = "bfin-spi",340.id = 1, /* Bus number */341.num_resources = ARRAY_SIZE(bfin_spi1_resource),342.resource = bfin_spi1_resource,343.dev = {344.platform_data = &bfin_spi1_info, /* Passed to driver */345},346};347#endif /* spi master and devices */348349#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)350#ifdef CONFIG_SERIAL_BFIN_UART0351static struct resource bfin_uart0_resources[] = {352{353.start = UART0_THR,354.end = UART0_GCTL+2,355.flags = IORESOURCE_MEM,356},357{358.start = IRQ_UART0_RX,359.end = IRQ_UART0_RX+1,360.flags = IORESOURCE_IRQ,361},362{363.start = IRQ_UART0_ERROR,364.end = IRQ_UART0_ERROR,365.flags = IORESOURCE_IRQ,366},367{368.start = CH_UART0_TX,369.end = CH_UART0_TX,370.flags = IORESOURCE_DMA,371},372{373.start = CH_UART0_RX,374.end = CH_UART0_RX,375.flags = IORESOURCE_DMA,376},377};378379static unsigned short bfin_uart0_peripherals[] = {380P_UART0_TX, P_UART0_RX, 0381};382383static struct platform_device bfin_uart0_device = {384.name = "bfin-uart",385.id = 0,386.num_resources = ARRAY_SIZE(bfin_uart0_resources),387.resource = bfin_uart0_resources,388.dev = {389.platform_data = &bfin_uart0_peripherals, /* Passed to driver */390},391};392#endif393#ifdef CONFIG_SERIAL_BFIN_UART1394static struct resource bfin_uart1_resources[] = {395{396.start = UART1_THR,397.end = UART1_GCTL+2,398.flags = IORESOURCE_MEM,399},400{401.start = IRQ_UART1_RX,402.end = IRQ_UART1_RX+1,403.flags = IORESOURCE_IRQ,404},405{406.start = IRQ_UART1_ERROR,407.end = IRQ_UART1_ERROR,408.flags = IORESOURCE_IRQ,409},410{411.start = CH_UART1_TX,412.end = CH_UART1_TX,413.flags = IORESOURCE_DMA,414},415{416.start = CH_UART1_RX,417.end = CH_UART1_RX,418.flags = IORESOURCE_DMA,419},420};421422static unsigned short bfin_uart1_peripherals[] = {423P_UART1_TX, P_UART1_RX, 0424};425426static struct platform_device bfin_uart1_device = {427.name = "bfin-uart",428.id = 1,429.num_resources = ARRAY_SIZE(bfin_uart1_resources),430.resource = bfin_uart1_resources,431.dev = {432.platform_data = &bfin_uart1_peripherals, /* Passed to driver */433},434};435#endif436#endif437438#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)439#ifdef CONFIG_BFIN_SIR0440static struct resource bfin_sir0_resources[] = {441{442.start = 0xFFC00400,443.end = 0xFFC004FF,444.flags = IORESOURCE_MEM,445},446{447.start = IRQ_UART0_RX,448.end = IRQ_UART0_RX+1,449.flags = IORESOURCE_IRQ,450},451{452.start = CH_UART0_RX,453.end = CH_UART0_RX+1,454.flags = IORESOURCE_DMA,455},456};457458static struct platform_device bfin_sir0_device = {459.name = "bfin_sir",460.id = 0,461.num_resources = ARRAY_SIZE(bfin_sir0_resources),462.resource = bfin_sir0_resources,463};464#endif465#ifdef CONFIG_BFIN_SIR1466static struct resource bfin_sir1_resources[] = {467{468.start = 0xFFC02000,469.end = 0xFFC020FF,470.flags = IORESOURCE_MEM,471},472{473.start = IRQ_UART1_RX,474.end = IRQ_UART1_RX+1,475.flags = IORESOURCE_IRQ,476},477{478.start = CH_UART1_RX,479.end = CH_UART1_RX+1,480.flags = IORESOURCE_DMA,481},482};483484static struct platform_device bfin_sir1_device = {485.name = "bfin_sir",486.id = 1,487.num_resources = ARRAY_SIZE(bfin_sir1_resources),488.resource = bfin_sir1_resources,489};490#endif491#endif492493#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)494static struct resource bfin_twi0_resource[] = {495[0] = {496.start = TWI0_REGBASE,497.end = TWI0_REGBASE,498.flags = IORESOURCE_MEM,499},500[1] = {501.start = IRQ_TWI,502.end = IRQ_TWI,503.flags = IORESOURCE_IRQ,504},505};506507static struct platform_device i2c_bfin_twi_device = {508.name = "i2c-bfin-twi",509.id = 0,510.num_resources = ARRAY_SIZE(bfin_twi0_resource),511.resource = bfin_twi0_resource,512};513#endif514515static struct i2c_board_info __initdata bfin_i2c_board_info[] = {516#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)517{518I2C_BOARD_INFO("pcf8574_lcd", 0x22),519},520#endif521#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)522{523I2C_BOARD_INFO("pcf8574_keypad", 0x27),524.irq = IRQ_PF8,525},526#endif527};528529#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)530#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART531static struct resource bfin_sport0_uart_resources[] = {532{533.start = SPORT0_TCR1,534.end = SPORT0_MRCS3+4,535.flags = IORESOURCE_MEM,536},537{538.start = IRQ_SPORT0_RX,539.end = IRQ_SPORT0_RX+1,540.flags = IORESOURCE_IRQ,541},542{543.start = IRQ_SPORT0_ERROR,544.end = IRQ_SPORT0_ERROR,545.flags = IORESOURCE_IRQ,546},547};548549static unsigned short bfin_sport0_peripherals[] = {550P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,551P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0552};553554static struct platform_device bfin_sport0_uart_device = {555.name = "bfin-sport-uart",556.id = 0,557.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),558.resource = bfin_sport0_uart_resources,559.dev = {560.platform_data = &bfin_sport0_peripherals, /* Passed to driver */561},562};563#endif564#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART565static struct resource bfin_sport1_uart_resources[] = {566{567.start = SPORT1_TCR1,568.end = SPORT1_MRCS3+4,569.flags = IORESOURCE_MEM,570},571{572.start = IRQ_SPORT1_RX,573.end = IRQ_SPORT1_RX+1,574.flags = IORESOURCE_IRQ,575},576{577.start = IRQ_SPORT1_ERROR,578.end = IRQ_SPORT1_ERROR,579.flags = IORESOURCE_IRQ,580},581};582583static unsigned short bfin_sport1_peripherals[] = {584P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,585P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0586};587588static struct platform_device bfin_sport1_uart_device = {589.name = "bfin-sport-uart",590.id = 1,591.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),592.resource = bfin_sport1_uart_resources,593.dev = {594.platform_data = &bfin_sport1_peripherals, /* Passed to driver */595},596};597#endif598#endif599600#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)601#include <linux/input.h>602#include <linux/gpio_keys.h>603604static struct gpio_keys_button bfin_gpio_keys_table[] = {605{BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},606{BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},607};608609static struct gpio_keys_platform_data bfin_gpio_keys_data = {610.buttons = bfin_gpio_keys_table,611.nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),612};613614static struct platform_device bfin_device_gpiokeys = {615.name = "gpio-keys",616.dev = {617.platform_data = &bfin_gpio_keys_data,618},619};620#endif621622#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)623624static struct bfin_sd_host bfin_sdh_data = {625.dma_chan = CH_RSI,626.irq_int0 = IRQ_RSI_INT0,627.pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},628};629630static struct platform_device bf51x_sdh_device = {631.name = "bfin-sdh",632.id = 0,633.dev = {634.platform_data = &bfin_sdh_data,635},636};637#endif638639static const unsigned int cclk_vlev_datasheet[] =640{641VRPAIR(VLEV_100, 400000000),642VRPAIR(VLEV_105, 426000000),643VRPAIR(VLEV_110, 500000000),644VRPAIR(VLEV_115, 533000000),645VRPAIR(VLEV_120, 600000000),646};647648static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {649.tuple_tab = cclk_vlev_datasheet,650.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),651.vr_settling_time = 25 /* us */,652};653654static struct platform_device bfin_dpmc = {655.name = "bfin dpmc",656.dev = {657.platform_data = &bfin_dmpc_vreg_data,658},659};660661static struct platform_device *tcm_devices[] __initdata = {662663&bfin_dpmc,664665#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)666&rtc_device,667#endif668669#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)670&bfin_mii_bus,671&bfin_mac_device,672#endif673674#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)675&bfin_spi0_device,676&bfin_spi1_device,677#endif678679#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)680#ifdef CONFIG_SERIAL_BFIN_UART0681&bfin_uart0_device,682#endif683#ifdef CONFIG_SERIAL_BFIN_UART1684&bfin_uart1_device,685#endif686#endif687688#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)689#ifdef CONFIG_BFIN_SIR0690&bfin_sir0_device,691#endif692#ifdef CONFIG_BFIN_SIR1693&bfin_sir1_device,694#endif695#endif696697#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)698&i2c_bfin_twi_device,699#endif700701#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)702#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART703&bfin_sport0_uart_device,704#endif705#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART706&bfin_sport1_uart_device,707#endif708#endif709710#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)711&bfin_device_gpiokeys,712#endif713714#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)715&bf51x_sdh_device,716#endif717718#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)719&tcm_flash_device,720#endif721};722723static int __init tcm_init(void)724{725printk(KERN_INFO "%s(): registering device resources\n", __func__);726i2c_register_board_info(0, bfin_i2c_board_info,727ARRAY_SIZE(bfin_i2c_board_info));728platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));729spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));730return 0;731}732733arch_initcall(tcm_init);734735static struct platform_device *tcm_early_devices[] __initdata = {736#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)737#ifdef CONFIG_SERIAL_BFIN_UART0738&bfin_uart0_device,739#endif740#ifdef CONFIG_SERIAL_BFIN_UART1741&bfin_uart1_device,742#endif743#endif744745#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)746#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART747&bfin_sport0_uart_device,748#endif749#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART750&bfin_sport1_uart_device,751#endif752#endif753};754755void __init native_machine_early_platform_add_devices(void)756{757printk(KERN_INFO "register early platform devices\n");758early_platform_add_devices(tcm_early_devices,759ARRAY_SIZE(tcm_early_devices));760}761762void native_machine_restart(char *cmd)763{764/* workaround reboot hang when booting from SPI */765if ((bfin_read_SYSCR() & 0x7) == 0x3)766bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);767}768769void bfin_get_ether_addr(char *addr)770{771random_ether_addr(addr);772printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);773}774EXPORT_SYMBOL(bfin_get_ether_addr);775776777