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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/blackfin/mach-bf527/boards/ad7160eval.c
15112 views
1
/*
2
* Copyright 2004-20010 Analog Devices Inc.
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* 2005 National ICT Australia (NICTA)
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* Aidan Williams <[email protected]>
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*
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* Licensed under the GPL-2 or later.
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*/
8
9
#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
15
#include <linux/spi/flash.h>
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#include <linux/i2c.h>
17
#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/usb/musb.h>
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#include <linux/leds.h>
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#include <linux/input.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/reboot.h>
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#include <asm/nand.h>
26
#include <asm/portmux.h>
27
#include <asm/dpmc.h>
28
29
30
/*
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* Name the Board for the /proc/cpuinfo
32
*/
33
const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
34
35
/*
36
* Driver needs to know address, irq and flag pin.
37
*/
38
39
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
40
static struct resource musb_resources[] = {
41
[0] = {
42
.start = 0xffc03800,
43
.end = 0xffc03cff,
44
.flags = IORESOURCE_MEM,
45
},
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[1] = { /* general IRQ */
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.start = IRQ_USB_INT0,
48
.end = IRQ_USB_INT0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
50
},
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[2] = { /* DMA IRQ */
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.start = IRQ_USB_DMA,
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.end = IRQ_USB_DMA,
54
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
55
},
56
};
57
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static struct musb_hdrc_config musb_config = {
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.multipoint = 0,
60
.dyn_fifo = 0,
61
.soft_con = 1,
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.dma = 1,
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.num_eps = 8,
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.dma_channels = 8,
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.gpio_vrsel = GPIO_PG13,
66
/* Some custom boards need to be active low, just set it to "0"
67
* if it is the case.
68
*/
69
.gpio_vrsel_active = 1,
70
.clkin = 24, /* musb CLKIN in MHZ */
71
};
72
73
static struct musb_hdrc_platform_data musb_plat = {
74
#if defined(CONFIG_USB_MUSB_OTG)
75
.mode = MUSB_OTG,
76
#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
77
.mode = MUSB_HOST,
78
#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
79
.mode = MUSB_PERIPHERAL,
80
#endif
81
.config = &musb_config,
82
};
83
84
static u64 musb_dmamask = ~(u32)0;
85
86
static struct platform_device musb_device = {
87
.name = "musb-blackfin",
88
.id = 0,
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.dev = {
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.dma_mask = &musb_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &musb_plat,
93
},
94
.num_resources = ARRAY_SIZE(musb_resources),
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.resource = musb_resources,
96
};
97
#endif
98
99
#if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
100
static struct resource bf52x_ra158z_resources[] = {
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{
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.start = IRQ_PPI_ERROR,
103
.end = IRQ_PPI_ERROR,
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.flags = IORESOURCE_IRQ,
105
},
106
};
107
108
static struct platform_device bf52x_ra158z_device = {
109
.name = "bfin-ra158z",
110
.id = -1,
111
.num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
112
.resource = bf52x_ra158z_resources,
113
};
114
#endif
115
116
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
117
static struct mtd_partition ad7160eval_partitions[] = {
118
{
119
.name = "bootloader(nor)",
120
.size = 0x40000,
121
.offset = 0,
122
}, {
123
.name = "linux kernel(nor)",
124
.size = 0x1C0000,
125
.offset = MTDPART_OFS_APPEND,
126
}, {
127
.name = "file system(nor)",
128
.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
130
}
131
};
132
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static struct physmap_flash_data ad7160eval_flash_data = {
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.width = 2,
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.parts = ad7160eval_partitions,
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.nr_parts = ARRAY_SIZE(ad7160eval_partitions),
137
};
138
139
static struct resource ad7160eval_flash_resource = {
140
.start = 0x20000000,
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.end = 0x203fffff,
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.flags = IORESOURCE_MEM,
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};
144
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static struct platform_device ad7160eval_flash_device = {
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.name = "physmap-flash",
147
.id = 0,
148
.dev = {
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.platform_data = &ad7160eval_flash_data,
150
},
151
.num_resources = 1,
152
.resource = &ad7160eval_flash_resource,
153
};
154
#endif
155
156
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
157
static struct mtd_partition partition_info[] = {
158
{
159
.name = "linux kernel(nand)",
160
.offset = 0,
161
.size = 4 * 1024 * 1024,
162
},
163
{
164
.name = "file system(nand)",
165
.offset = MTDPART_OFS_APPEND,
166
.size = MTDPART_SIZ_FULL,
167
},
168
};
169
170
static struct bf5xx_nand_platform bf5xx_nand_platform = {
171
.data_width = NFC_NWIDTH_8,
172
.partitions = partition_info,
173
.nr_partitions = ARRAY_SIZE(partition_info),
174
.rd_dly = 3,
175
.wr_dly = 3,
176
};
177
178
static struct resource bf5xx_nand_resources[] = {
179
{
180
.start = NFC_CTL,
181
.end = NFC_DATA_RD + 2,
182
.flags = IORESOURCE_MEM,
183
},
184
{
185
.start = CH_NFC,
186
.end = CH_NFC,
187
.flags = IORESOURCE_IRQ,
188
},
189
};
190
191
static struct platform_device bf5xx_nand_device = {
192
.name = "bf5xx-nand",
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.id = 0,
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.num_resources = ARRAY_SIZE(bf5xx_nand_resources),
195
.resource = bf5xx_nand_resources,
196
.dev = {
197
.platform_data = &bf5xx_nand_platform,
198
},
199
};
200
#endif
201
202
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
203
static struct platform_device rtc_device = {
204
.name = "rtc-bfin",
205
.id = -1,
206
};
207
#endif
208
209
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
210
#include <linux/bfin_mac.h>
211
static const unsigned short bfin_mac_peripherals[] = P_RMII0;
212
213
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
214
{
215
.addr = 1,
216
.irq = IRQ_MAC_PHYINT,
217
},
218
};
219
220
static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
221
.phydev_number = 1,
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.phydev_data = bfin_phydev_data,
223
.phy_mode = PHY_INTERFACE_MODE_RMII,
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.mac_peripherals = bfin_mac_peripherals,
225
};
226
227
static struct platform_device bfin_mii_bus = {
228
.name = "bfin_mii_bus",
229
.dev = {
230
.platform_data = &bfin_mii_bus_data,
231
}
232
};
233
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static struct platform_device bfin_mac_device = {
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.name = "bfin_mac",
236
.dev = {
237
.platform_data = &bfin_mii_bus,
238
}
239
};
240
#endif
241
242
243
#if defined(CONFIG_MTD_M25P80) \
244
|| defined(CONFIG_MTD_M25P80_MODULE)
245
static struct mtd_partition bfin_spi_flash_partitions[] = {
246
{
247
.name = "bootloader(spi)",
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.size = 0x00040000,
249
.offset = 0,
250
.mask_flags = MTD_CAP_ROM
251
}, {
252
.name = "linux kernel(spi)",
253
.size = MTDPART_SIZ_FULL,
254
.offset = MTDPART_OFS_APPEND,
255
}
256
};
257
258
static struct flash_platform_data bfin_spi_flash_data = {
259
.name = "m25p80",
260
.parts = bfin_spi_flash_partitions,
261
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
262
.type = "m25p16",
263
};
264
265
/* SPI flash chip (m25p64) */
266
static struct bfin5xx_spi_chip spi_flash_chip_info = {
267
.enable_dma = 0, /* use dma transfer with this chip*/
268
.bits_per_word = 8,
269
};
270
#endif
271
272
#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
273
|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
274
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
275
.enable_dma = 0,
276
.bits_per_word = 16,
277
};
278
#endif
279
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
281
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
282
.enable_dma = 0,
283
.bits_per_word = 8,
284
};
285
#endif
286
287
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
288
static struct bfin5xx_spi_chip spidev_chip_info = {
289
.enable_dma = 0,
290
.bits_per_word = 8,
291
};
292
#endif
293
294
#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
295
static struct platform_device bfin_i2s = {
296
.name = "bfin-i2s",
297
.id = CONFIG_SND_BF5XX_SPORT_NUM,
298
/* TODO: add platform data here */
299
};
300
#endif
301
302
#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
303
static struct platform_device bfin_tdm = {
304
.name = "bfin-tdm",
305
.id = CONFIG_SND_BF5XX_SPORT_NUM,
306
/* TODO: add platform data here */
307
};
308
#endif
309
310
static struct spi_board_info bfin_spi_board_info[] __initdata = {
311
#if defined(CONFIG_MTD_M25P80) \
312
|| defined(CONFIG_MTD_M25P80_MODULE)
313
{
314
/* the modalias must be the same as spi device driver name */
315
.modalias = "m25p80", /* Name of spi_driver for this device */
316
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
317
.bus_num = 0, /* Framework bus number */
318
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
319
.platform_data = &bfin_spi_flash_data,
320
.controller_data = &spi_flash_chip_info,
321
.mode = SPI_MODE_3,
322
},
323
#endif
324
#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
325
|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
326
{
327
.modalias = "ad183x",
328
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
329
.bus_num = 0,
330
.chip_select = 4,
331
.controller_data = &ad1836_spi_chip_info,
332
},
333
#endif
334
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
335
{
336
.modalias = "mmc_spi",
337
.max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
338
.bus_num = 0,
339
.chip_select = GPIO_PH3 + MAX_CTRL_CS,
340
.controller_data = &mmc_spi_chip_info,
341
.mode = SPI_MODE_3,
342
},
343
#endif
344
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
345
{
346
.modalias = "spidev",
347
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
348
.bus_num = 0,
349
.chip_select = 1,
350
.controller_data = &spidev_chip_info,
351
},
352
#endif
353
};
354
355
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
356
/* SPI controller data */
357
static struct bfin5xx_spi_master bfin_spi0_info = {
358
.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
359
.enable_dma = 1, /* master has the ability to do dma transfer */
360
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
361
};
362
363
/* SPI (0) */
364
static struct resource bfin_spi0_resource[] = {
365
[0] = {
366
.start = SPI0_REGBASE,
367
.end = SPI0_REGBASE + 0xFF,
368
.flags = IORESOURCE_MEM,
369
},
370
[1] = {
371
.start = CH_SPI,
372
.end = CH_SPI,
373
.flags = IORESOURCE_DMA,
374
},
375
[2] = {
376
.start = IRQ_SPI,
377
.end = IRQ_SPI,
378
.flags = IORESOURCE_IRQ,
379
},
380
};
381
382
static struct platform_device bfin_spi0_device = {
383
.name = "bfin-spi",
384
.id = 0, /* Bus number */
385
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
386
.resource = bfin_spi0_resource,
387
.dev = {
388
.platform_data = &bfin_spi0_info, /* Passed to driver */
389
},
390
};
391
#endif /* spi master and devices */
392
393
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
394
#ifdef CONFIG_SERIAL_BFIN_UART0
395
static struct resource bfin_uart0_resources[] = {
396
{
397
.start = UART0_THR,
398
.end = UART0_GCTL+2,
399
.flags = IORESOURCE_MEM,
400
},
401
{
402
.start = IRQ_UART0_RX,
403
.end = IRQ_UART0_RX+1,
404
.flags = IORESOURCE_IRQ,
405
},
406
{
407
.start = IRQ_UART0_ERROR,
408
.end = IRQ_UART0_ERROR,
409
.flags = IORESOURCE_IRQ,
410
},
411
{
412
.start = CH_UART0_TX,
413
.end = CH_UART0_TX,
414
.flags = IORESOURCE_DMA,
415
},
416
{
417
.start = CH_UART0_RX,
418
.end = CH_UART0_RX,
419
.flags = IORESOURCE_DMA,
420
},
421
};
422
423
static unsigned short bfin_uart0_peripherals[] = {
424
P_UART0_TX, P_UART0_RX, 0
425
};
426
427
static struct platform_device bfin_uart0_device = {
428
.name = "bfin-uart",
429
.id = 0,
430
.num_resources = ARRAY_SIZE(bfin_uart0_resources),
431
.resource = bfin_uart0_resources,
432
.dev = {
433
.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
434
},
435
};
436
#endif
437
#ifdef CONFIG_SERIAL_BFIN_UART1
438
static struct resource bfin_uart1_resources[] = {
439
{
440
.start = UART1_THR,
441
.end = UART1_GCTL+2,
442
.flags = IORESOURCE_MEM,
443
},
444
{
445
.start = IRQ_UART1_RX,
446
.end = IRQ_UART1_RX+1,
447
.flags = IORESOURCE_IRQ,
448
},
449
{
450
.start = IRQ_UART1_ERROR,
451
.end = IRQ_UART1_ERROR,
452
.flags = IORESOURCE_IRQ,
453
},
454
{
455
.start = CH_UART1_TX,
456
.end = CH_UART1_TX,
457
.flags = IORESOURCE_DMA,
458
},
459
{
460
.start = CH_UART1_RX,
461
.end = CH_UART1_RX,
462
.flags = IORESOURCE_DMA,
463
},
464
#ifdef CONFIG_BFIN_UART1_CTSRTS
465
{ /* CTS pin */
466
.start = GPIO_PF9,
467
.end = GPIO_PF9,
468
.flags = IORESOURCE_IO,
469
},
470
{ /* RTS pin */
471
.start = GPIO_PF10,
472
.end = GPIO_PF10,
473
.flags = IORESOURCE_IO,
474
},
475
#endif
476
};
477
478
static unsigned short bfin_uart1_peripherals[] = {
479
P_UART1_TX, P_UART1_RX, 0
480
};
481
482
static struct platform_device bfin_uart1_device = {
483
.name = "bfin-uart",
484
.id = 1,
485
.num_resources = ARRAY_SIZE(bfin_uart1_resources),
486
.resource = bfin_uart1_resources,
487
.dev = {
488
.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
489
},
490
};
491
#endif
492
#endif
493
494
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
495
#ifdef CONFIG_BFIN_SIR0
496
static struct resource bfin_sir0_resources[] = {
497
{
498
.start = 0xFFC00400,
499
.end = 0xFFC004FF,
500
.flags = IORESOURCE_MEM,
501
},
502
{
503
.start = IRQ_UART0_RX,
504
.end = IRQ_UART0_RX+1,
505
.flags = IORESOURCE_IRQ,
506
},
507
{
508
.start = CH_UART0_RX,
509
.end = CH_UART0_RX+1,
510
.flags = IORESOURCE_DMA,
511
},
512
};
513
514
static struct platform_device bfin_sir0_device = {
515
.name = "bfin_sir",
516
.id = 0,
517
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
518
.resource = bfin_sir0_resources,
519
};
520
#endif
521
#ifdef CONFIG_BFIN_SIR1
522
static struct resource bfin_sir1_resources[] = {
523
{
524
.start = 0xFFC02000,
525
.end = 0xFFC020FF,
526
.flags = IORESOURCE_MEM,
527
},
528
{
529
.start = IRQ_UART1_RX,
530
.end = IRQ_UART1_RX+1,
531
.flags = IORESOURCE_IRQ,
532
},
533
{
534
.start = CH_UART1_RX,
535
.end = CH_UART1_RX+1,
536
.flags = IORESOURCE_DMA,
537
},
538
};
539
540
static struct platform_device bfin_sir1_device = {
541
.name = "bfin_sir",
542
.id = 1,
543
.num_resources = ARRAY_SIZE(bfin_sir1_resources),
544
.resource = bfin_sir1_resources,
545
};
546
#endif
547
#endif
548
549
#if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
550
#include <linux/input/ad7160.h>
551
static const struct ad7160_platform_data bfin_ad7160_ts_info = {
552
.sensor_x_res = 854,
553
.sensor_y_res = 480,
554
.pressure = 100,
555
.filter_coef = 3,
556
.coord_pref = AD7160_ORIG_TOP_LEFT,
557
.first_touch_window = 5,
558
.move_window = 3,
559
.event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
560
AD7160_EMIT_ABS_MT_PRESSURE |
561
AD7160_TRACKING_ID_ASCENDING,
562
.finger_act_ctrl = 0x64,
563
.haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
564
AD7160_HAPTIC_SLOT_A_LVL_HIGH |
565
AD7160_HAPTIC_SLOT_B(60) |
566
AD7160_HAPTIC_SLOT_B_LVL_LOW,
567
568
.haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
569
AD7160_HAPTIC_SLOT_A_LVL_HIGH |
570
AD7160_HAPTIC_SLOT_B(80) |
571
AD7160_HAPTIC_SLOT_B_LVL_LOW |
572
AD7160_HAPTIC_SLOT_C(120) |
573
AD7160_HAPTIC_SLOT_C_LVL_HIGH |
574
AD7160_HAPTIC_SLOT_D(30) |
575
AD7160_HAPTIC_SLOT_D_LVL_LOW,
576
};
577
#endif
578
579
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
580
static struct resource bfin_twi0_resource[] = {
581
[0] = {
582
.start = TWI0_REGBASE,
583
.end = TWI0_REGBASE,
584
.flags = IORESOURCE_MEM,
585
},
586
[1] = {
587
.start = IRQ_TWI,
588
.end = IRQ_TWI,
589
.flags = IORESOURCE_IRQ,
590
},
591
};
592
593
static struct platform_device i2c_bfin_twi_device = {
594
.name = "i2c-bfin-twi",
595
.id = 0,
596
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
597
.resource = bfin_twi0_resource,
598
};
599
#endif
600
601
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
602
#if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
603
{
604
I2C_BOARD_INFO("ad7160", 0x33),
605
.irq = IRQ_PH1,
606
.platform_data = (void *)&bfin_ad7160_ts_info,
607
},
608
#endif
609
};
610
611
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
612
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
613
static struct resource bfin_sport0_uart_resources[] = {
614
{
615
.start = SPORT0_TCR1,
616
.end = SPORT0_MRCS3+4,
617
.flags = IORESOURCE_MEM,
618
},
619
{
620
.start = IRQ_SPORT0_RX,
621
.end = IRQ_SPORT0_RX+1,
622
.flags = IORESOURCE_IRQ,
623
},
624
{
625
.start = IRQ_SPORT0_ERROR,
626
.end = IRQ_SPORT0_ERROR,
627
.flags = IORESOURCE_IRQ,
628
},
629
};
630
631
static unsigned short bfin_sport0_peripherals[] = {
632
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
633
P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
634
};
635
636
static struct platform_device bfin_sport0_uart_device = {
637
.name = "bfin-sport-uart",
638
.id = 0,
639
.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
640
.resource = bfin_sport0_uart_resources,
641
.dev = {
642
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
643
},
644
};
645
#endif
646
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
647
static struct resource bfin_sport1_uart_resources[] = {
648
{
649
.start = SPORT1_TCR1,
650
.end = SPORT1_MRCS3+4,
651
.flags = IORESOURCE_MEM,
652
},
653
{
654
.start = IRQ_SPORT1_RX,
655
.end = IRQ_SPORT1_RX+1,
656
.flags = IORESOURCE_IRQ,
657
},
658
{
659
.start = IRQ_SPORT1_ERROR,
660
.end = IRQ_SPORT1_ERROR,
661
.flags = IORESOURCE_IRQ,
662
},
663
};
664
665
static unsigned short bfin_sport1_peripherals[] = {
666
P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
667
P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
668
};
669
670
static struct platform_device bfin_sport1_uart_device = {
671
.name = "bfin-sport-uart",
672
.id = 1,
673
.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
674
.resource = bfin_sport1_uart_resources,
675
.dev = {
676
.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
677
},
678
};
679
#endif
680
#endif
681
682
#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
683
#include <asm/bfin_rotary.h>
684
685
static struct bfin_rotary_platform_data bfin_rotary_data = {
686
/*.rotary_up_key = KEY_UP,*/
687
/*.rotary_down_key = KEY_DOWN,*/
688
.rotary_rel_code = REL_WHEEL,
689
.rotary_button_key = KEY_ENTER,
690
.debounce = 10, /* 0..17 */
691
.mode = ROT_QUAD_ENC | ROT_DEBE,
692
};
693
694
static struct resource bfin_rotary_resources[] = {
695
{
696
.start = IRQ_CNT,
697
.end = IRQ_CNT,
698
.flags = IORESOURCE_IRQ,
699
},
700
};
701
702
static struct platform_device bfin_rotary_device = {
703
.name = "bfin-rotary",
704
.id = -1,
705
.num_resources = ARRAY_SIZE(bfin_rotary_resources),
706
.resource = bfin_rotary_resources,
707
.dev = {
708
.platform_data = &bfin_rotary_data,
709
},
710
};
711
#endif
712
713
static const unsigned int cclk_vlev_datasheet[] = {
714
VRPAIR(VLEV_100, 400000000),
715
VRPAIR(VLEV_105, 426000000),
716
VRPAIR(VLEV_110, 500000000),
717
VRPAIR(VLEV_115, 533000000),
718
VRPAIR(VLEV_120, 600000000),
719
};
720
721
static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
722
.tuple_tab = cclk_vlev_datasheet,
723
.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
724
.vr_settling_time = 25 /* us */,
725
};
726
727
static struct platform_device bfin_dpmc = {
728
.name = "bfin dpmc",
729
.dev = {
730
.platform_data = &bfin_dmpc_vreg_data,
731
},
732
};
733
734
static struct platform_device *stamp_devices[] __initdata = {
735
736
&bfin_dpmc,
737
738
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
739
&bf5xx_nand_device,
740
#endif
741
742
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
743
&rtc_device,
744
#endif
745
746
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
747
&musb_device,
748
#endif
749
750
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
751
&bfin_mii_bus,
752
&bfin_mac_device,
753
#endif
754
755
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
756
&bfin_spi0_device,
757
#endif
758
759
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
760
#ifdef CONFIG_SERIAL_BFIN_UART0
761
&bfin_uart0_device,
762
#endif
763
#ifdef CONFIG_SERIAL_BFIN_UART1
764
&bfin_uart1_device,
765
#endif
766
#endif
767
768
#if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
769
&bf52x_ra158z_device,
770
#endif
771
772
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
773
#ifdef CONFIG_BFIN_SIR0
774
&bfin_sir0_device,
775
#endif
776
#ifdef CONFIG_BFIN_SIR1
777
&bfin_sir1_device,
778
#endif
779
#endif
780
781
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
782
&i2c_bfin_twi_device,
783
#endif
784
785
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
786
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
787
&bfin_sport0_uart_device,
788
#endif
789
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
790
&bfin_sport1_uart_device,
791
#endif
792
#endif
793
794
#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
795
&bfin_rotary_device,
796
#endif
797
798
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
799
&ad7160eval_flash_device,
800
#endif
801
802
#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
803
&bfin_i2s,
804
#endif
805
806
#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
807
&bfin_tdm,
808
#endif
809
};
810
811
static int __init ad7160eval_init(void)
812
{
813
printk(KERN_INFO "%s(): registering device resources\n", __func__);
814
i2c_register_board_info(0, bfin_i2c_board_info,
815
ARRAY_SIZE(bfin_i2c_board_info));
816
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
817
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
818
return 0;
819
}
820
821
arch_initcall(ad7160eval_init);
822
823
static struct platform_device *ad7160eval_early_devices[] __initdata = {
824
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
825
#ifdef CONFIG_SERIAL_BFIN_UART0
826
&bfin_uart0_device,
827
#endif
828
#ifdef CONFIG_SERIAL_BFIN_UART1
829
&bfin_uart1_device,
830
#endif
831
#endif
832
833
#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
834
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
835
&bfin_sport0_uart_device,
836
#endif
837
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
838
&bfin_sport1_uart_device,
839
#endif
840
#endif
841
};
842
843
void __init native_machine_early_platform_add_devices(void)
844
{
845
printk(KERN_INFO "register early platform devices\n");
846
early_platform_add_devices(ad7160eval_early_devices,
847
ARRAY_SIZE(ad7160eval_early_devices));
848
}
849
850
void native_machine_restart(char *cmd)
851
{
852
/* workaround reboot hang when booting from SPI */
853
if ((bfin_read_SYSCR() & 0x7) == 0x3)
854
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
855
}
856
857
void bfin_get_ether_addr(char *addr)
858
{
859
/* the MAC is stored in OTP memory page 0xDF */
860
u32 ret;
861
u64 otp_mac;
862
u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
863
864
ret = otp_read(0xDF, 0x00, &otp_mac);
865
if (!(ret & 0x1)) {
866
char *otp_mac_p = (char *)&otp_mac;
867
for (ret = 0; ret < 6; ++ret)
868
addr[ret] = otp_mac_p[5 - ret];
869
}
870
}
871
EXPORT_SYMBOL(bfin_get_ether_addr);
872
873