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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/blackfin/mach-bf527/include/mach/cdefBF522.h
10820 views
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/*

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 * Copyright 2007-2010 Analog Devices Inc.

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 *

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 * Licensed under the GPL-2 or later.

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 */

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#ifndef _CDEF_BF522_H

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#define _CDEF_BF522_H

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/* Clock and System Control	(0xFFC00000 - 0xFFC000FF)								*/

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#define bfin_read_PLL_CTL()			bfin_read16(PLL_CTL)

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#define bfin_read_PLL_DIV()			bfin_read16(PLL_DIV)

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#define bfin_write_PLL_DIV(val)			bfin_write16(PLL_DIV, val)

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#define bfin_read_VR_CTL()			bfin_read16(VR_CTL)

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#define bfin_read_PLL_STAT()			bfin_read16(PLL_STAT)

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#define bfin_write_PLL_STAT(val)		bfin_write16(PLL_STAT, val)

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#define bfin_read_PLL_LOCKCNT()			bfin_read16(PLL_LOCKCNT)

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#define bfin_write_PLL_LOCKCNT(val)		bfin_write16(PLL_LOCKCNT, val)

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#define bfin_read_CHIPID()			bfin_read32(CHIPID)

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#define bfin_write_CHIPID(val)			bfin_write32(CHIPID, val)

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/* System Interrupt Controller (0xFFC00100 - 0xFFC001FF)							*/

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#define bfin_read_SWRST()			bfin_read16(SWRST)

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#define bfin_write_SWRST(val)			bfin_write16(SWRST, val)

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#define bfin_read_SYSCR()			bfin_read16(SYSCR)

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#define bfin_write_SYSCR(val)			bfin_write16(SYSCR, val)

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#define bfin_read_SIC_RVECT()			bfin_read32(SIC_RVECT)

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#define bfin_write_SIC_RVECT(val)		bfin_write32(SIC_RVECT, val)

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#define bfin_read_SIC_IMASK0()			bfin_read32(SIC_IMASK0)

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#define bfin_write_SIC_IMASK0(val)		bfin_write32(SIC_IMASK0, val)

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#define bfin_read_SIC_IMASK(x)			bfin_read32(SIC_IMASK0 + (x << 6))

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#define bfin_write_SIC_IMASK(x, val)		bfin_write32((SIC_IMASK0 + (x << 6)), val)

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#define bfin_read_SIC_IAR0()			bfin_read32(SIC_IAR0)

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#define bfin_write_SIC_IAR0(val)		bfin_write32(SIC_IAR0, val)

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#define bfin_read_SIC_IAR1()			bfin_read32(SIC_IAR1)

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#define bfin_write_SIC_IAR1(val)		bfin_write32(SIC_IAR1, val)

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#define bfin_read_SIC_IAR2()			bfin_read32(SIC_IAR2)

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#define bfin_write_SIC_IAR2(val)		bfin_write32(SIC_IAR2, val)

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#define bfin_read_SIC_IAR3()			bfin_read32(SIC_IAR3)

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#define bfin_write_SIC_IAR3(val)		bfin_write32(SIC_IAR3, val)

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#define bfin_read_SIC_ISR0()			bfin_read32(SIC_ISR0)

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#define bfin_write_SIC_ISR0(val)		bfin_write32(SIC_ISR0, val)

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#define bfin_read_SIC_ISR(x)			bfin_read32(SIC_ISR0 + (x << 6))

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#define bfin_write_SIC_ISR(x, val)		bfin_write32((SIC_ISR0 + (x << 6)), val)

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#define bfin_read_SIC_IWR0()			bfin_read32(SIC_IWR0)

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#define bfin_write_SIC_IWR0(val)		bfin_write32(SIC_IWR0, val)

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#define bfin_read_SIC_IWR(x)			bfin_read32(SIC_IWR0 + (x << 6))

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#define bfin_write_SIC_IWR(x, val)		bfin_write32((SIC_IWR0 + (x << 6)), val)

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/* SIC Additions to ADSP-BF52x (0xFFC0014C - 0xFFC00162) */

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#define bfin_read_SIC_IMASK1()			bfin_read32(SIC_IMASK1)

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#define bfin_write_SIC_IMASK1(val)		bfin_write32(SIC_IMASK1, val)

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#define bfin_read_SIC_IAR4()			bfin_read32(SIC_IAR4)

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#define bfin_write_SIC_IAR4(val)		bfin_write32(SIC_IAR4, val)

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#define bfin_read_SIC_IAR5()			bfin_read32(SIC_IAR5)

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#define bfin_write_SIC_IAR5(val)		bfin_write32(SIC_IAR5, val)

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#define bfin_read_SIC_IAR6()			bfin_read32(SIC_IAR6)

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#define bfin_write_SIC_IAR6(val)		bfin_write32(SIC_IAR6, val)

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#define bfin_read_SIC_IAR7()			bfin_read32(SIC_IAR7)

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#define bfin_write_SIC_IAR7(val)		bfin_write32(SIC_IAR7, val)

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#define bfin_read_SIC_ISR1()			bfin_read32(SIC_ISR1)

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#define bfin_write_SIC_ISR1(val)		bfin_write32(SIC_ISR1, val)

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#define bfin_read_SIC_IWR1()			bfin_read32(SIC_IWR1)

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#define bfin_write_SIC_IWR1(val)		bfin_write32(SIC_IWR1, val)

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/* Watchdog Timer		(0xFFC00200 - 0xFFC002FF)									*/

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#define bfin_read_WDOG_CTL()			bfin_read16(WDOG_CTL)

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#define bfin_write_WDOG_CTL(val)		bfin_write16(WDOG_CTL, val)

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#define bfin_read_WDOG_CNT()			bfin_read32(WDOG_CNT)

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#define bfin_write_WDOG_CNT(val)		bfin_write32(WDOG_CNT, val)

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#define bfin_read_WDOG_STAT()			bfin_read32(WDOG_STAT)

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#define bfin_write_WDOG_STAT(val)		bfin_write32(WDOG_STAT, val)

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/* Real Time Clock		(0xFFC00300 - 0xFFC003FF)									*/

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#define bfin_read_RTC_STAT()			bfin_read32(RTC_STAT)

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#define bfin_write_RTC_STAT(val)		bfin_write32(RTC_STAT, val)

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#define bfin_read_RTC_ICTL()			bfin_read16(RTC_ICTL)

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#define bfin_write_RTC_ICTL(val)		bfin_write16(RTC_ICTL, val)

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#define bfin_read_RTC_ISTAT()			bfin_read16(RTC_ISTAT)

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#define bfin_write_RTC_ISTAT(val)		bfin_write16(RTC_ISTAT, val)

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#define bfin_read_RTC_SWCNT()			bfin_read16(RTC_SWCNT)

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#define bfin_write_RTC_SWCNT(val)		bfin_write16(RTC_SWCNT, val)

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#define bfin_read_RTC_ALARM()			bfin_read32(RTC_ALARM)

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#define bfin_write_RTC_ALARM(val)		bfin_write32(RTC_ALARM, val)

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#define bfin_read_RTC_FAST()			bfin_read16(RTC_FAST)

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#define bfin_write_RTC_FAST(val)		bfin_write16(RTC_FAST, val)

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#define bfin_read_RTC_PREN()			bfin_read16(RTC_PREN)

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#define bfin_write_RTC_PREN(val)		bfin_write16(RTC_PREN, val)

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/* UART0 Controller		(0xFFC00400 - 0xFFC004FF)									*/

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#define bfin_read_UART0_THR()			bfin_read16(UART0_THR)

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#define bfin_write_UART0_THR(val)		bfin_write16(UART0_THR, val)

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#define bfin_read_UART0_RBR()			bfin_read16(UART0_RBR)

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#define bfin_write_UART0_RBR(val)		bfin_write16(UART0_RBR, val)

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#define bfin_read_UART0_DLL()			bfin_read16(UART0_DLL)

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#define bfin_write_UART0_DLL(val)		bfin_write16(UART0_DLL, val)

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#define bfin_read_UART0_IER()			bfin_read16(UART0_IER)

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#define bfin_write_UART0_IER(val)		bfin_write16(UART0_IER, val)

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#define bfin_read_UART0_DLH()			bfin_read16(UART0_DLH)

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#define bfin_write_UART0_DLH(val)		bfin_write16(UART0_DLH, val)

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#define bfin_read_UART0_IIR()			bfin_read16(UART0_IIR)

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#define bfin_write_UART0_IIR(val)		bfin_write16(UART0_IIR, val)

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#define bfin_read_UART0_LCR()			bfin_read16(UART0_LCR)

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#define bfin_write_UART0_LCR(val)		bfin_write16(UART0_LCR, val)

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#define bfin_read_UART0_MCR()			bfin_read16(UART0_MCR)

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#define bfin_write_UART0_MCR(val)		bfin_write16(UART0_MCR, val)

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#define bfin_read_UART0_LSR()			bfin_read16(UART0_LSR)

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#define bfin_write_UART0_LSR(val)		bfin_write16(UART0_LSR, val)

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#define bfin_read_UART0_MSR()			bfin_read16(UART0_MSR)

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#define bfin_write_UART0_MSR(val)		bfin_write16(UART0_MSR, val)

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#define bfin_read_UART0_SCR()			bfin_read16(UART0_SCR)

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#define bfin_write_UART0_SCR(val)		bfin_write16(UART0_SCR, val)

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#define bfin_read_UART0_GCTL()			bfin_read16(UART0_GCTL)

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#define bfin_write_UART0_GCTL(val)		bfin_write16(UART0_GCTL, val)

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/* SPI Controller		(0xFFC00500 - 0xFFC005FF)									*/

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#define bfin_read_SPI_CTL()			bfin_read16(SPI_CTL)

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#define bfin_write_SPI_CTL(val)			bfin_write16(SPI_CTL, val)

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#define bfin_read_SPI_FLG()			bfin_read16(SPI_FLG)

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#define bfin_write_SPI_FLG(val)			bfin_write16(SPI_FLG, val)

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#define bfin_read_SPI_STAT()			bfin_read16(SPI_STAT)

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#define bfin_write_SPI_STAT(val)		bfin_write16(SPI_STAT, val)

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#define bfin_read_SPI_TDBR()			bfin_read16(SPI_TDBR)

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#define bfin_write_SPI_TDBR(val)		bfin_write16(SPI_TDBR, val)

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#define bfin_read_SPI_RDBR()			bfin_read16(SPI_RDBR)

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#define bfin_write_SPI_RDBR(val)		bfin_write16(SPI_RDBR, val)

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#define bfin_read_SPI_BAUD()			bfin_read16(SPI_BAUD)

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#define bfin_write_SPI_BAUD(val)		bfin_write16(SPI_BAUD, val)

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#define bfin_read_SPI_SHADOW()			bfin_read16(SPI_SHADOW)

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#define bfin_write_SPI_SHADOW(val)		bfin_write16(SPI_SHADOW, val)

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/* TIMER0-7 Registers		(0xFFC00600 - 0xFFC006FF)								*/

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#define bfin_read_TIMER0_CONFIG()		bfin_read16(TIMER0_CONFIG)

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#define bfin_write_TIMER0_CONFIG(val)		bfin_write16(TIMER0_CONFIG, val)

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#define bfin_read_TIMER0_COUNTER()		bfin_read32(TIMER0_COUNTER)

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#define bfin_write_TIMER0_COUNTER(val)		bfin_write32(TIMER0_COUNTER, val)

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#define bfin_read_TIMER0_PERIOD()		bfin_read32(TIMER0_PERIOD)

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#define bfin_write_TIMER0_PERIOD(val)		bfin_write32(TIMER0_PERIOD, val)

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#define bfin_read_TIMER0_WIDTH()		bfin_read32(TIMER0_WIDTH)

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#define bfin_write_TIMER0_WIDTH(val)		bfin_write32(TIMER0_WIDTH, val)

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#define bfin_read_TIMER1_CONFIG()		bfin_read16(TIMER1_CONFIG)

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#define bfin_write_TIMER1_CONFIG(val)		bfin_write16(TIMER1_CONFIG, val)

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#define bfin_read_TIMER1_COUNTER()		bfin_read32(TIMER1_COUNTER)

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#define bfin_write_TIMER1_COUNTER(val)		bfin_write32(TIMER1_COUNTER, val)

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#define bfin_read_TIMER1_PERIOD()		bfin_read32(TIMER1_PERIOD)

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#define bfin_write_TIMER1_PERIOD(val)		bfin_write32(TIMER1_PERIOD, val)

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#define bfin_read_TIMER1_WIDTH()		bfin_read32(TIMER1_WIDTH)

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#define bfin_write_TIMER1_WIDTH(val)		bfin_write32(TIMER1_WIDTH, val)

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#define bfin_read_TIMER2_CONFIG()		bfin_read16(TIMER2_CONFIG)

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#define bfin_write_TIMER2_CONFIG(val)		bfin_write16(TIMER2_CONFIG, val)

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#define bfin_read_TIMER2_COUNTER()		bfin_read32(TIMER2_COUNTER)

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#define bfin_write_TIMER2_COUNTER(val)		bfin_write32(TIMER2_COUNTER, val)

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#define bfin_read_TIMER2_PERIOD()		bfin_read32(TIMER2_PERIOD)

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#define bfin_write_TIMER2_PERIOD(val)		bfin_write32(TIMER2_PERIOD, val)

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#define bfin_read_TIMER2_WIDTH()		bfin_read32(TIMER2_WIDTH)

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#define bfin_write_TIMER2_WIDTH(val)		bfin_write32(TIMER2_WIDTH, val)

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#define bfin_read_TIMER3_CONFIG()		bfin_read16(TIMER3_CONFIG)

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#define bfin_write_TIMER3_CONFIG(val)		bfin_write16(TIMER3_CONFIG, val)

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#define bfin_read_TIMER3_COUNTER()		bfin_read32(TIMER3_COUNTER)

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#define bfin_write_TIMER3_COUNTER(val)		bfin_write32(TIMER3_COUNTER, val)

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#define bfin_read_TIMER3_PERIOD()		bfin_read32(TIMER3_PERIOD)

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#define bfin_write_TIMER3_PERIOD(val)		bfin_write32(TIMER3_PERIOD, val)

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#define bfin_read_TIMER3_WIDTH()		bfin_read32(TIMER3_WIDTH)

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#define bfin_write_TIMER3_WIDTH(val)		bfin_write32(TIMER3_WIDTH, val)

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#define bfin_read_TIMER4_CONFIG()		bfin_read16(TIMER4_CONFIG)

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#define bfin_write_TIMER4_CONFIG(val)		bfin_write16(TIMER4_CONFIG, val)

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#define bfin_read_TIMER4_COUNTER()		bfin_read32(TIMER4_COUNTER)

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#define bfin_write_TIMER4_COUNTER(val)		bfin_write32(TIMER4_COUNTER, val)

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#define bfin_read_TIMER4_PERIOD()		bfin_read32(TIMER4_PERIOD)

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#define bfin_write_TIMER4_PERIOD(val)		bfin_write32(TIMER4_PERIOD, val)

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#define bfin_read_TIMER4_WIDTH()		bfin_read32(TIMER4_WIDTH)

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#define bfin_write_TIMER4_WIDTH(val)		bfin_write32(TIMER4_WIDTH, val)

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#define bfin_read_TIMER5_CONFIG()		bfin_read16(TIMER5_CONFIG)

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#define bfin_write_TIMER5_CONFIG(val)		bfin_write16(TIMER5_CONFIG, val)

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#define bfin_read_TIMER5_COUNTER()		bfin_read32(TIMER5_COUNTER)

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#define bfin_write_TIMER5_COUNTER(val)		bfin_write32(TIMER5_COUNTER, val)

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#define bfin_read_TIMER5_PERIOD()		bfin_read32(TIMER5_PERIOD)

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#define bfin_write_TIMER5_PERIOD(val)		bfin_write32(TIMER5_PERIOD, val)

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#define bfin_read_TIMER5_WIDTH()		bfin_read32(TIMER5_WIDTH)

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#define bfin_write_TIMER5_WIDTH(val)		bfin_write32(TIMER5_WIDTH, val)

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#define bfin_read_TIMER6_CONFIG()		bfin_read16(TIMER6_CONFIG)

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#define bfin_write_TIMER6_CONFIG(val)		bfin_write16(TIMER6_CONFIG, val)

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#define bfin_read_TIMER6_COUNTER()		bfin_read32(TIMER6_COUNTER)

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#define bfin_write_TIMER6_COUNTER(val)		bfin_write32(TIMER6_COUNTER, val)

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#define bfin_read_TIMER6_PERIOD()		bfin_read32(TIMER6_PERIOD)

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#define bfin_write_TIMER6_PERIOD(val)		bfin_write32(TIMER6_PERIOD, val)

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#define bfin_read_TIMER6_WIDTH()		bfin_read32(TIMER6_WIDTH)

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#define bfin_write_TIMER6_WIDTH(val)		bfin_write32(TIMER6_WIDTH, val)

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#define bfin_read_TIMER7_CONFIG()		bfin_read16(TIMER7_CONFIG)

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#define bfin_write_TIMER7_CONFIG(val)		bfin_write16(TIMER7_CONFIG, val)

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#define bfin_read_TIMER7_COUNTER()		bfin_read32(TIMER7_COUNTER)

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#define bfin_write_TIMER7_COUNTER(val)		bfin_write32(TIMER7_COUNTER, val)

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#define bfin_read_TIMER7_PERIOD()		bfin_read32(TIMER7_PERIOD)

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#define bfin_write_TIMER7_PERIOD(val)		bfin_write32(TIMER7_PERIOD, val)

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#define bfin_read_TIMER7_WIDTH()		bfin_read32(TIMER7_WIDTH)

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#define bfin_write_TIMER7_WIDTH(val)		bfin_write32(TIMER7_WIDTH, val)

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#define bfin_read_TIMER_ENABLE()		bfin_read16(TIMER_ENABLE)

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#define bfin_write_TIMER_ENABLE(val)		bfin_write16(TIMER_ENABLE, val)

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#define bfin_read_TIMER_DISABLE()		bfin_read16(TIMER_DISABLE)

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#define bfin_write_TIMER_DISABLE(val)		bfin_write16(TIMER_DISABLE, val)

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#define bfin_read_TIMER_STATUS()		bfin_read32(TIMER_STATUS)

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#define bfin_write_TIMER_STATUS(val)		bfin_write32(TIMER_STATUS, val)

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/* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF)								*/

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#define bfin_read_PORTFIO()			bfin_read16(PORTFIO)

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#define bfin_write_PORTFIO(val)			bfin_write16(PORTFIO, val)

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#define bfin_read_PORTFIO_CLEAR()		bfin_read16(PORTFIO_CLEAR)

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#define bfin_write_PORTFIO_CLEAR(val)		bfin_write16(PORTFIO_CLEAR, val)

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#define bfin_read_PORTFIO_SET()			bfin_read16(PORTFIO_SET)

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#define bfin_write_PORTFIO_SET(val)		bfin_write16(PORTFIO_SET, val)

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#define bfin_read_PORTFIO_TOGGLE()		bfin_read16(PORTFIO_TOGGLE)

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#define bfin_write_PORTFIO_TOGGLE(val)		bfin_write16(PORTFIO_TOGGLE, val)

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#define bfin_read_PORTFIO_MASKA()		bfin_read16(PORTFIO_MASKA)

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#define bfin_write_PORTFIO_MASKA(val)		bfin_write16(PORTFIO_MASKA, val)

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#define bfin_read_PORTFIO_MASKA_CLEAR()		bfin_read16(PORTFIO_MASKA_CLEAR)

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#define bfin_write_PORTFIO_MASKA_CLEAR(val)	bfin_write16(PORTFIO_MASKA_CLEAR, val)

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#define bfin_read_PORTFIO_MASKA_SET()		bfin_read16(PORTFIO_MASKA_SET)

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#define bfin_write_PORTFIO_MASKA_SET(val)	bfin_write16(PORTFIO_MASKA_SET, val)

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#define bfin_read_PORTFIO_MASKA_TOGGLE()	bfin_read16(PORTFIO_MASKA_TOGGLE)

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#define bfin_write_PORTFIO_MASKA_TOGGLE(val)	bfin_write16(PORTFIO_MASKA_TOGGLE, val)

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#define bfin_read_PORTFIO_MASKB()		bfin_read16(PORTFIO_MASKB)

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#define bfin_write_PORTFIO_MASKB(val)		bfin_write16(PORTFIO_MASKB, val)

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#define bfin_read_PORTFIO_MASKB_CLEAR()		bfin_read16(PORTFIO_MASKB_CLEAR)

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#define bfin_write_PORTFIO_MASKB_CLEAR(val)	bfin_write16(PORTFIO_MASKB_CLEAR, val)

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#define bfin_read_PORTFIO_MASKB_SET()		bfin_read16(PORTFIO_MASKB_SET)

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#define bfin_write_PORTFIO_MASKB_SET(val)	bfin_write16(PORTFIO_MASKB_SET, val)

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#define bfin_read_PORTFIO_MASKB_TOGGLE()	bfin_read16(PORTFIO_MASKB_TOGGLE)

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#define bfin_write_PORTFIO_MASKB_TOGGLE(val)	bfin_write16(PORTFIO_MASKB_TOGGLE, val)

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#define bfin_read_PORTFIO_DIR()			bfin_read16(PORTFIO_DIR)

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#define bfin_write_PORTFIO_DIR(val)		bfin_write16(PORTFIO_DIR, val)

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#define bfin_read_PORTFIO_POLAR()		bfin_read16(PORTFIO_POLAR)

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#define bfin_write_PORTFIO_POLAR(val)		bfin_write16(PORTFIO_POLAR, val)

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#define bfin_read_PORTFIO_EDGE()		bfin_read16(PORTFIO_EDGE)

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#define bfin_write_PORTFIO_EDGE(val)		bfin_write16(PORTFIO_EDGE, val)

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#define bfin_read_PORTFIO_BOTH()		bfin_read16(PORTFIO_BOTH)

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#define bfin_write_PORTFIO_BOTH(val)		bfin_write16(PORTFIO_BOTH, val)

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#define bfin_read_PORTFIO_INEN()		bfin_read16(PORTFIO_INEN)

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#define bfin_write_PORTFIO_INEN(val)		bfin_write16(PORTFIO_INEN, val)

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/* SPORT0 Controller		(0xFFC00800 - 0xFFC008FF)								*/

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#define bfin_read_SPORT0_TCR1()			bfin_read16(SPORT0_TCR1)

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#define bfin_write_SPORT0_TCR1(val)		bfin_write16(SPORT0_TCR1, val)

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#define bfin_read_SPORT0_TCR2()			bfin_read16(SPORT0_TCR2)

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#define bfin_write_SPORT0_TCR2(val)		bfin_write16(SPORT0_TCR2, val)

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#define bfin_read_SPORT0_TCLKDIV()		bfin_read16(SPORT0_TCLKDIV)

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#define bfin_write_SPORT0_TCLKDIV(val)		bfin_write16(SPORT0_TCLKDIV, val)

267
#define bfin_read_SPORT0_TFSDIV()		bfin_read16(SPORT0_TFSDIV)

268
#define bfin_write_SPORT0_TFSDIV(val)		bfin_write16(SPORT0_TFSDIV, val)

269
#define bfin_read_SPORT0_TX()			bfin_read32(SPORT0_TX)

270
#define bfin_write_SPORT0_TX(val)		bfin_write32(SPORT0_TX, val)

271
#define bfin_read_SPORT0_RX()			bfin_read32(SPORT0_RX)

272
#define bfin_write_SPORT0_RX(val)		bfin_write32(SPORT0_RX, val)

273
#define bfin_read_SPORT0_TX32()			bfin_read32(SPORT0_TX)

274
#define bfin_write_SPORT0_TX32(val)		bfin_write32(SPORT0_TX, val)

275
#define bfin_read_SPORT0_RX32()			bfin_read32(SPORT0_RX)

276
#define bfin_write_SPORT0_RX32(val)		bfin_write32(SPORT0_RX, val)

277
#define bfin_read_SPORT0_TX16()			bfin_read16(SPORT0_TX)

278
#define bfin_write_SPORT0_TX16(val)		bfin_write16(SPORT0_TX, val)

279
#define bfin_read_SPORT0_RX16()			bfin_read16(SPORT0_RX)

280
#define bfin_write_SPORT0_RX16(val)		bfin_write16(SPORT0_RX, val)

281
#define bfin_read_SPORT0_RCR1()			bfin_read16(SPORT0_RCR1)

282
#define bfin_write_SPORT0_RCR1(val)		bfin_write16(SPORT0_RCR1, val)

283
#define bfin_read_SPORT0_RCR2()			bfin_read16(SPORT0_RCR2)

284
#define bfin_write_SPORT0_RCR2(val)		bfin_write16(SPORT0_RCR2, val)

285
#define bfin_read_SPORT0_RCLKDIV()		bfin_read16(SPORT0_RCLKDIV)

286
#define bfin_write_SPORT0_RCLKDIV(val)		bfin_write16(SPORT0_RCLKDIV, val)

287
#define bfin_read_SPORT0_RFSDIV()		bfin_read16(SPORT0_RFSDIV)

288
#define bfin_write_SPORT0_RFSDIV(val)		bfin_write16(SPORT0_RFSDIV, val)

289
#define bfin_read_SPORT0_STAT()			bfin_read16(SPORT0_STAT)

290
#define bfin_write_SPORT0_STAT(val)		bfin_write16(SPORT0_STAT, val)

291
#define bfin_read_SPORT0_CHNL()			bfin_read16(SPORT0_CHNL)

292
#define bfin_write_SPORT0_CHNL(val)		bfin_write16(SPORT0_CHNL, val)

293
#define bfin_read_SPORT0_MCMC1()		bfin_read16(SPORT0_MCMC1)

294
#define bfin_write_SPORT0_MCMC1(val)		bfin_write16(SPORT0_MCMC1, val)

295
#define bfin_read_SPORT0_MCMC2()		bfin_read16(SPORT0_MCMC2)

296
#define bfin_write_SPORT0_MCMC2(val)		bfin_write16(SPORT0_MCMC2, val)

297
#define bfin_read_SPORT0_MTCS0()		bfin_read32(SPORT0_MTCS0)

298
#define bfin_write_SPORT0_MTCS0(val)		bfin_write32(SPORT0_MTCS0, val)

299
#define bfin_read_SPORT0_MTCS1()		bfin_read32(SPORT0_MTCS1)

300
#define bfin_write_SPORT0_MTCS1(val)		bfin_write32(SPORT0_MTCS1, val)

301
#define bfin_read_SPORT0_MTCS2()		bfin_read32(SPORT0_MTCS2)

302
#define bfin_write_SPORT0_MTCS2(val)		bfin_write32(SPORT0_MTCS2, val)

303
#define bfin_read_SPORT0_MTCS3()		bfin_read32(SPORT0_MTCS3)

304
#define bfin_write_SPORT0_MTCS3(val)		bfin_write32(SPORT0_MTCS3, val)

305
#define bfin_read_SPORT0_MRCS0()		bfin_read32(SPORT0_MRCS0)

306
#define bfin_write_SPORT0_MRCS0(val)		bfin_write32(SPORT0_MRCS0, val)

307
#define bfin_read_SPORT0_MRCS1()		bfin_read32(SPORT0_MRCS1)

308
#define bfin_write_SPORT0_MRCS1(val)		bfin_write32(SPORT0_MRCS1, val)

309
#define bfin_read_SPORT0_MRCS2()		bfin_read32(SPORT0_MRCS2)

310
#define bfin_write_SPORT0_MRCS2(val)		bfin_write32(SPORT0_MRCS2, val)

311
#define bfin_read_SPORT0_MRCS3()		bfin_read32(SPORT0_MRCS3)

312
#define bfin_write_SPORT0_MRCS3(val)		bfin_write32(SPORT0_MRCS3, val)

313


314


315
/* SPORT1 Controller		(0xFFC00900 - 0xFFC009FF)								*/

316
#define bfin_read_SPORT1_TCR1()			bfin_read16(SPORT1_TCR1)

317
#define bfin_write_SPORT1_TCR1(val)		bfin_write16(SPORT1_TCR1, val)

318
#define bfin_read_SPORT1_TCR2()			bfin_read16(SPORT1_TCR2)

319
#define bfin_write_SPORT1_TCR2(val)		bfin_write16(SPORT1_TCR2, val)

320
#define bfin_read_SPORT1_TCLKDIV()		bfin_read16(SPORT1_TCLKDIV)

321
#define bfin_write_SPORT1_TCLKDIV(val)		bfin_write16(SPORT1_TCLKDIV, val)

322
#define bfin_read_SPORT1_TFSDIV()		bfin_read16(SPORT1_TFSDIV)

323
#define bfin_write_SPORT1_TFSDIV(val)		bfin_write16(SPORT1_TFSDIV, val)

324
#define bfin_read_SPORT1_TX()			bfin_read32(SPORT1_TX)

325
#define bfin_write_SPORT1_TX(val)		bfin_write32(SPORT1_TX, val)

326
#define bfin_read_SPORT1_RX()			bfin_read32(SPORT1_RX)

327
#define bfin_write_SPORT1_RX(val)		bfin_write32(SPORT1_RX, val)

328
#define bfin_read_SPORT1_TX32()			bfin_read32(SPORT1_TX)

329
#define bfin_write_SPORT1_TX32(val)		bfin_write32(SPORT1_TX, val)

330
#define bfin_read_SPORT1_RX32()			bfin_read32(SPORT1_RX)

331
#define bfin_write_SPORT1_RX32(val)		bfin_write32(SPORT1_RX, val)

332
#define bfin_read_SPORT1_TX16()			bfin_read16(SPORT1_TX)

333
#define bfin_write_SPORT1_TX16(val)		bfin_write16(SPORT1_TX, val)

334
#define bfin_read_SPORT1_RX16()			bfin_read16(SPORT1_RX)

335
#define bfin_write_SPORT1_RX16(val)		bfin_write16(SPORT1_RX, val)

336
#define bfin_read_SPORT1_RCR1()			bfin_read16(SPORT1_RCR1)

337
#define bfin_write_SPORT1_RCR1(val)		bfin_write16(SPORT1_RCR1, val)

338
#define bfin_read_SPORT1_RCR2()			bfin_read16(SPORT1_RCR2)

339
#define bfin_write_SPORT1_RCR2(val)		bfin_write16(SPORT1_RCR2, val)

340
#define bfin_read_SPORT1_RCLKDIV()		bfin_read16(SPORT1_RCLKDIV)

341
#define bfin_write_SPORT1_RCLKDIV(val)		bfin_write16(SPORT1_RCLKDIV, val)

342
#define bfin_read_SPORT1_RFSDIV()		bfin_read16(SPORT1_RFSDIV)

343
#define bfin_write_SPORT1_RFSDIV(val)		bfin_write16(SPORT1_RFSDIV, val)

344
#define bfin_read_SPORT1_STAT()			bfin_read16(SPORT1_STAT)

345
#define bfin_write_SPORT1_STAT(val)		bfin_write16(SPORT1_STAT, val)

346
#define bfin_read_SPORT1_CHNL()			bfin_read16(SPORT1_CHNL)

347
#define bfin_write_SPORT1_CHNL(val)		bfin_write16(SPORT1_CHNL, val)

348
#define bfin_read_SPORT1_MCMC1()		bfin_read16(SPORT1_MCMC1)

349
#define bfin_write_SPORT1_MCMC1(val)		bfin_write16(SPORT1_MCMC1, val)

350
#define bfin_read_SPORT1_MCMC2()		bfin_read16(SPORT1_MCMC2)

351
#define bfin_write_SPORT1_MCMC2(val)		bfin_write16(SPORT1_MCMC2, val)

352
#define bfin_read_SPORT1_MTCS0()		bfin_read32(SPORT1_MTCS0)

353
#define bfin_write_SPORT1_MTCS0(val)		bfin_write32(SPORT1_MTCS0, val)

354
#define bfin_read_SPORT1_MTCS1()		bfin_read32(SPORT1_MTCS1)

355
#define bfin_write_SPORT1_MTCS1(val)		bfin_write32(SPORT1_MTCS1, val)

356
#define bfin_read_SPORT1_MTCS2()		bfin_read32(SPORT1_MTCS2)

357
#define bfin_write_SPORT1_MTCS2(val)		bfin_write32(SPORT1_MTCS2, val)

358
#define bfin_read_SPORT1_MTCS3()		bfin_read32(SPORT1_MTCS3)

359
#define bfin_write_SPORT1_MTCS3(val)		bfin_write32(SPORT1_MTCS3, val)

360
#define bfin_read_SPORT1_MRCS0()		bfin_read32(SPORT1_MRCS0)

361
#define bfin_write_SPORT1_MRCS0(val)		bfin_write32(SPORT1_MRCS0, val)

362
#define bfin_read_SPORT1_MRCS1()		bfin_read32(SPORT1_MRCS1)

363
#define bfin_write_SPORT1_MRCS1(val)		bfin_write32(SPORT1_MRCS1, val)

364
#define bfin_read_SPORT1_MRCS2()		bfin_read32(SPORT1_MRCS2)

365
#define bfin_write_SPORT1_MRCS2(val)		bfin_write32(SPORT1_MRCS2, val)

366
#define bfin_read_SPORT1_MRCS3()		bfin_read32(SPORT1_MRCS3)

367
#define bfin_write_SPORT1_MRCS3(val)		bfin_write32(SPORT1_MRCS3, val)

368


369


370
/* External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF)							*/

371
#define bfin_read_EBIU_AMGCTL()			bfin_read16(EBIU_AMGCTL)

372
#define bfin_write_EBIU_AMGCTL(val)		bfin_write16(EBIU_AMGCTL, val)

373
#define bfin_read_EBIU_AMBCTL0()		bfin_read32(EBIU_AMBCTL0)

374
#define bfin_write_EBIU_AMBCTL0(val)		bfin_write32(EBIU_AMBCTL0, val)

375
#define bfin_read_EBIU_AMBCTL1()		bfin_read32(EBIU_AMBCTL1)

376
#define bfin_write_EBIU_AMBCTL1(val)		bfin_write32(EBIU_AMBCTL1, val)

377
#define bfin_read_EBIU_SDGCTL()			bfin_read32(EBIU_SDGCTL)

378
#define bfin_write_EBIU_SDGCTL(val)		bfin_write32(EBIU_SDGCTL, val)

379
#define bfin_read_EBIU_SDBCTL()			bfin_read16(EBIU_SDBCTL)

380
#define bfin_write_EBIU_SDBCTL(val)		bfin_write16(EBIU_SDBCTL, val)

381
#define bfin_read_EBIU_SDRRC()			bfin_read16(EBIU_SDRRC)

382
#define bfin_write_EBIU_SDRRC(val)		bfin_write16(EBIU_SDRRC, val)

383
#define bfin_read_EBIU_SDSTAT()			bfin_read16(EBIU_SDSTAT)

384
#define bfin_write_EBIU_SDSTAT(val)		bfin_write16(EBIU_SDSTAT, val)

385


386


387
/* DMA Traffic Control Registers													*/

388
#define bfin_read_DMAC_TC_PER()			bfin_read16(DMAC_TC_PER)

389
#define bfin_write_DMAC_TC_PER(val)		bfin_write16(DMAC_TC_PER, val)

390
#define bfin_read_DMAC_TC_CNT()			bfin_read16(DMAC_TC_CNT)

391
#define bfin_write_DMAC_TC_CNT(val)		bfin_write16(DMAC_TC_CNT, val)

392


393
/* DMA Controller																	*/

394
#define bfin_read_DMA0_CONFIG()			bfin_read16(DMA0_CONFIG)

395
#define bfin_write_DMA0_CONFIG(val)		bfin_write16(DMA0_CONFIG, val)

396
#define bfin_read_DMA0_NEXT_DESC_PTR()		bfin_read32(DMA0_NEXT_DESC_PTR)

397
#define bfin_write_DMA0_NEXT_DESC_PTR(val)	bfin_write32(DMA0_NEXT_DESC_PTR, val)

398
#define bfin_read_DMA0_START_ADDR()		bfin_read32(DMA0_START_ADDR)

399
#define bfin_write_DMA0_START_ADDR(val)		bfin_write32(DMA0_START_ADDR, val)

400
#define bfin_read_DMA0_X_COUNT()		bfin_read16(DMA0_X_COUNT)

401
#define bfin_write_DMA0_X_COUNT(val)		bfin_write16(DMA0_X_COUNT, val)

402
#define bfin_read_DMA0_Y_COUNT()		bfin_read16(DMA0_Y_COUNT)

403
#define bfin_write_DMA0_Y_COUNT(val)		bfin_write16(DMA0_Y_COUNT, val)

404
#define bfin_read_DMA0_X_MODIFY()		bfin_read16(DMA0_X_MODIFY)

405
#define bfin_write_DMA0_X_MODIFY(val)		bfin_write16(DMA0_X_MODIFY, val)

406
#define bfin_read_DMA0_Y_MODIFY()		bfin_read16(DMA0_Y_MODIFY)

407
#define bfin_write_DMA0_Y_MODIFY(val)		bfin_write16(DMA0_Y_MODIFY, val)

408
#define bfin_read_DMA0_CURR_DESC_PTR()		bfin_read32(DMA0_CURR_DESC_PTR)

409
#define bfin_write_DMA0_CURR_DESC_PTR(val)	bfin_write32(DMA0_CURR_DESC_PTR, val)

410
#define bfin_read_DMA0_CURR_ADDR()		bfin_read32(DMA0_CURR_ADDR)

411
#define bfin_write_DMA0_CURR_ADDR(val)		bfin_write32(DMA0_CURR_ADDR, val)

412
#define bfin_read_DMA0_CURR_X_COUNT()		bfin_read16(DMA0_CURR_X_COUNT)

413
#define bfin_write_DMA0_CURR_X_COUNT(val)	bfin_write16(DMA0_CURR_X_COUNT, val)

414
#define bfin_read_DMA0_CURR_Y_COUNT()		bfin_read16(DMA0_CURR_Y_COUNT)

415
#define bfin_write_DMA0_CURR_Y_COUNT(val)	bfin_write16(DMA0_CURR_Y_COUNT, val)

416
#define bfin_read_DMA0_IRQ_STATUS()		bfin_read16(DMA0_IRQ_STATUS)

417
#define bfin_write_DMA0_IRQ_STATUS(val)		bfin_write16(DMA0_IRQ_STATUS, val)

418
#define bfin_read_DMA0_PERIPHERAL_MAP()		bfin_read16(DMA0_PERIPHERAL_MAP)

419
#define bfin_write_DMA0_PERIPHERAL_MAP(val)	bfin_write16(DMA0_PERIPHERAL_MAP, val)

420


421
#define bfin_read_DMA1_CONFIG()			bfin_read16(DMA1_CONFIG)

422
#define bfin_write_DMA1_CONFIG(val)		bfin_write16(DMA1_CONFIG, val)

423
#define bfin_read_DMA1_NEXT_DESC_PTR()		bfin_read32(DMA1_NEXT_DESC_PTR)

424
#define bfin_write_DMA1_NEXT_DESC_PTR(val)	bfin_write32(DMA1_NEXT_DESC_PTR, val)

425
#define bfin_read_DMA1_START_ADDR()		bfin_read32(DMA1_START_ADDR)

426
#define bfin_write_DMA1_START_ADDR(val)		bfin_write32(DMA1_START_ADDR, val)

427
#define bfin_read_DMA1_X_COUNT()		bfin_read16(DMA1_X_COUNT)

428
#define bfin_write_DMA1_X_COUNT(val)		bfin_write16(DMA1_X_COUNT, val)

429
#define bfin_read_DMA1_Y_COUNT()		bfin_read16(DMA1_Y_COUNT)

430
#define bfin_write_DMA1_Y_COUNT(val)		bfin_write16(DMA1_Y_COUNT, val)

431
#define bfin_read_DMA1_X_MODIFY()		bfin_read16(DMA1_X_MODIFY)

432
#define bfin_write_DMA1_X_MODIFY(val)		bfin_write16(DMA1_X_MODIFY, val)

433
#define bfin_read_DMA1_Y_MODIFY()		bfin_read16(DMA1_Y_MODIFY)

434
#define bfin_write_DMA1_Y_MODIFY(val)		bfin_write16(DMA1_Y_MODIFY, val)

435
#define bfin_read_DMA1_CURR_DESC_PTR()		bfin_read32(DMA1_CURR_DESC_PTR)

436
#define bfin_write_DMA1_CURR_DESC_PTR(val)	bfin_write32(DMA1_CURR_DESC_PTR, val)

437
#define bfin_read_DMA1_CURR_ADDR()		bfin_read32(DMA1_CURR_ADDR)

438
#define bfin_write_DMA1_CURR_ADDR(val)		bfin_write32(DMA1_CURR_ADDR, val)

439
#define bfin_read_DMA1_CURR_X_COUNT()		bfin_read16(DMA1_CURR_X_COUNT)

440
#define bfin_write_DMA1_CURR_X_COUNT(val)	bfin_write16(DMA1_CURR_X_COUNT, val)

441
#define bfin_read_DMA1_CURR_Y_COUNT()		bfin_read16(DMA1_CURR_Y_COUNT)

442
#define bfin_write_DMA1_CURR_Y_COUNT(val)	bfin_write16(DMA1_CURR_Y_COUNT, val)

443
#define bfin_read_DMA1_IRQ_STATUS()		bfin_read16(DMA1_IRQ_STATUS)

444
#define bfin_write_DMA1_IRQ_STATUS(val)		bfin_write16(DMA1_IRQ_STATUS, val)

445
#define bfin_read_DMA1_PERIPHERAL_MAP()		bfin_read16(DMA1_PERIPHERAL_MAP)

446
#define bfin_write_DMA1_PERIPHERAL_MAP(val)	bfin_write16(DMA1_PERIPHERAL_MAP, val)

447


448
#define bfin_read_DMA2_CONFIG()			bfin_read16(DMA2_CONFIG)

449
#define bfin_write_DMA2_CONFIG(val)		bfin_write16(DMA2_CONFIG, val)

450
#define bfin_read_DMA2_NEXT_DESC_PTR()		bfin_read32(DMA2_NEXT_DESC_PTR)

451
#define bfin_write_DMA2_NEXT_DESC_PTR(val)	bfin_write32(DMA2_NEXT_DESC_PTR, val)

452
#define bfin_read_DMA2_START_ADDR()		bfin_read32(DMA2_START_ADDR)

453
#define bfin_write_DMA2_START_ADDR(val)		bfin_write32(DMA2_START_ADDR, val)

454
#define bfin_read_DMA2_X_COUNT()		bfin_read16(DMA2_X_COUNT)

455
#define bfin_write_DMA2_X_COUNT(val)		bfin_write16(DMA2_X_COUNT, val)

456
#define bfin_read_DMA2_Y_COUNT()		bfin_read16(DMA2_Y_COUNT)

457
#define bfin_write_DMA2_Y_COUNT(val)		bfin_write16(DMA2_Y_COUNT, val)

458
#define bfin_read_DMA2_X_MODIFY()		bfin_read16(DMA2_X_MODIFY)

459
#define bfin_write_DMA2_X_MODIFY(val)		bfin_write16(DMA2_X_MODIFY, val)

460
#define bfin_read_DMA2_Y_MODIFY()		bfin_read16(DMA2_Y_MODIFY)

461
#define bfin_write_DMA2_Y_MODIFY(val)		bfin_write16(DMA2_Y_MODIFY, val)

462
#define bfin_read_DMA2_CURR_DESC_PTR()		bfin_read32(DMA2_CURR_DESC_PTR)

463
#define bfin_write_DMA2_CURR_DESC_PTR(val)	bfin_write32(DMA2_CURR_DESC_PTR, val)

464
#define bfin_read_DMA2_CURR_ADDR()		bfin_read32(DMA2_CURR_ADDR)

465
#define bfin_write_DMA2_CURR_ADDR(val)		bfin_write32(DMA2_CURR_ADDR, val)

466
#define bfin_read_DMA2_CURR_X_COUNT()		bfin_read16(DMA2_CURR_X_COUNT)

467
#define bfin_write_DMA2_CURR_X_COUNT(val)	bfin_write16(DMA2_CURR_X_COUNT, val)

468
#define bfin_read_DMA2_CURR_Y_COUNT()		bfin_read16(DMA2_CURR_Y_COUNT)

469
#define bfin_write_DMA2_CURR_Y_COUNT(val)	bfin_write16(DMA2_CURR_Y_COUNT, val)

470
#define bfin_read_DMA2_IRQ_STATUS()		bfin_read16(DMA2_IRQ_STATUS)

471
#define bfin_write_DMA2_IRQ_STATUS(val)		bfin_write16(DMA2_IRQ_STATUS, val)

472
#define bfin_read_DMA2_PERIPHERAL_MAP()		bfin_read16(DMA2_PERIPHERAL_MAP)

473
#define bfin_write_DMA2_PERIPHERAL_MAP(val)	bfin_write16(DMA2_PERIPHERAL_MAP, val)

474


475
#define bfin_read_DMA3_CONFIG()			bfin_read16(DMA3_CONFIG)

476
#define bfin_write_DMA3_CONFIG(val)		bfin_write16(DMA3_CONFIG, val)

477
#define bfin_read_DMA3_NEXT_DESC_PTR()		bfin_read32(DMA3_NEXT_DESC_PTR)

478
#define bfin_write_DMA3_NEXT_DESC_PTR(val)	bfin_write32(DMA3_NEXT_DESC_PTR, val)

479
#define bfin_read_DMA3_START_ADDR()		bfin_read32(DMA3_START_ADDR)

480
#define bfin_write_DMA3_START_ADDR(val)		bfin_write32(DMA3_START_ADDR, val)

481
#define bfin_read_DMA3_X_COUNT()		bfin_read16(DMA3_X_COUNT)

482
#define bfin_write_DMA3_X_COUNT(val)		bfin_write16(DMA3_X_COUNT, val)

483
#define bfin_read_DMA3_Y_COUNT()		bfin_read16(DMA3_Y_COUNT)

484
#define bfin_write_DMA3_Y_COUNT(val)		bfin_write16(DMA3_Y_COUNT, val)

485
#define bfin_read_DMA3_X_MODIFY()		bfin_read16(DMA3_X_MODIFY)

486
#define bfin_write_DMA3_X_MODIFY(val)		bfin_write16(DMA3_X_MODIFY, val)

487
#define bfin_read_DMA3_Y_MODIFY()		bfin_read16(DMA3_Y_MODIFY)

488
#define bfin_write_DMA3_Y_MODIFY(val)		bfin_write16(DMA3_Y_MODIFY, val)

489
#define bfin_read_DMA3_CURR_DESC_PTR()		bfin_read32(DMA3_CURR_DESC_PTR)

490
#define bfin_write_DMA3_CURR_DESC_PTR(val)	bfin_write32(DMA3_CURR_DESC_PTR, val)

491
#define bfin_read_DMA3_CURR_ADDR()		bfin_read32(DMA3_CURR_ADDR)

492
#define bfin_write_DMA3_CURR_ADDR(val)		bfin_write32(DMA3_CURR_ADDR, val)

493
#define bfin_read_DMA3_CURR_X_COUNT()		bfin_read16(DMA3_CURR_X_COUNT)

494
#define bfin_write_DMA3_CURR_X_COUNT(val)	bfin_write16(DMA3_CURR_X_COUNT, val)

495
#define bfin_read_DMA3_CURR_Y_COUNT()		bfin_read16(DMA3_CURR_Y_COUNT)

496
#define bfin_write_DMA3_CURR_Y_COUNT(val)	bfin_write16(DMA3_CURR_Y_COUNT, val)

497
#define bfin_read_DMA3_IRQ_STATUS()		bfin_read16(DMA3_IRQ_STATUS)

498
#define bfin_write_DMA3_IRQ_STATUS(val)		bfin_write16(DMA3_IRQ_STATUS, val)

499
#define bfin_read_DMA3_PERIPHERAL_MAP()		bfin_read16(DMA3_PERIPHERAL_MAP)

500
#define bfin_write_DMA3_PERIPHERAL_MAP(val)	bfin_write16(DMA3_PERIPHERAL_MAP, val)

501


502
#define bfin_read_DMA4_CONFIG()			bfin_read16(DMA4_CONFIG)

503
#define bfin_write_DMA4_CONFIG(val)		bfin_write16(DMA4_CONFIG, val)

504
#define bfin_read_DMA4_NEXT_DESC_PTR()		bfin_read32(DMA4_NEXT_DESC_PTR)

505
#define bfin_write_DMA4_NEXT_DESC_PTR(val)	bfin_write32(DMA4_NEXT_DESC_PTR, val)

506
#define bfin_read_DMA4_START_ADDR()		bfin_read32(DMA4_START_ADDR)

507
#define bfin_write_DMA4_START_ADDR(val)		bfin_write32(DMA4_START_ADDR, val)

508
#define bfin_read_DMA4_X_COUNT()		bfin_read16(DMA4_X_COUNT)

509
#define bfin_write_DMA4_X_COUNT(val)		bfin_write16(DMA4_X_COUNT, val)

510
#define bfin_read_DMA4_Y_COUNT()		bfin_read16(DMA4_Y_COUNT)

511
#define bfin_write_DMA4_Y_COUNT(val)		bfin_write16(DMA4_Y_COUNT, val)

512
#define bfin_read_DMA4_X_MODIFY()		bfin_read16(DMA4_X_MODIFY)

513
#define bfin_write_DMA4_X_MODIFY(val)		bfin_write16(DMA4_X_MODIFY, val)

514
#define bfin_read_DMA4_Y_MODIFY()		bfin_read16(DMA4_Y_MODIFY)

515
#define bfin_write_DMA4_Y_MODIFY(val)		bfin_write16(DMA4_Y_MODIFY, val)

516
#define bfin_read_DMA4_CURR_DESC_PTR()		bfin_read32(DMA4_CURR_DESC_PTR)

517
#define bfin_write_DMA4_CURR_DESC_PTR(val)	bfin_write32(DMA4_CURR_DESC_PTR, val)

518
#define bfin_read_DMA4_CURR_ADDR()		bfin_read32(DMA4_CURR_ADDR)

519
#define bfin_write_DMA4_CURR_ADDR(val)		bfin_write32(DMA4_CURR_ADDR, val)

520
#define bfin_read_DMA4_CURR_X_COUNT()		bfin_read16(DMA4_CURR_X_COUNT)

521
#define bfin_write_DMA4_CURR_X_COUNT(val)	bfin_write16(DMA4_CURR_X_COUNT, val)

522
#define bfin_read_DMA4_CURR_Y_COUNT()		bfin_read16(DMA4_CURR_Y_COUNT)

523
#define bfin_write_DMA4_CURR_Y_COUNT(val)	bfin_write16(DMA4_CURR_Y_COUNT, val)

524
#define bfin_read_DMA4_IRQ_STATUS()		bfin_read16(DMA4_IRQ_STATUS)

525
#define bfin_write_DMA4_IRQ_STATUS(val)		bfin_write16(DMA4_IRQ_STATUS, val)

526
#define bfin_read_DMA4_PERIPHERAL_MAP()		bfin_read16(DMA4_PERIPHERAL_MAP)

527
#define bfin_write_DMA4_PERIPHERAL_MAP(val)	bfin_write16(DMA4_PERIPHERAL_MAP, val)

528


529
#define bfin_read_DMA5_CONFIG()			bfin_read16(DMA5_CONFIG)

530
#define bfin_write_DMA5_CONFIG(val)		bfin_write16(DMA5_CONFIG, val)

531
#define bfin_read_DMA5_NEXT_DESC_PTR()		bfin_read32(DMA5_NEXT_DESC_PTR)

532
#define bfin_write_DMA5_NEXT_DESC_PTR(val)	bfin_write32(DMA5_NEXT_DESC_PTR, val)

533
#define bfin_read_DMA5_START_ADDR()		bfin_read32(DMA5_START_ADDR)

534
#define bfin_write_DMA5_START_ADDR(val)		bfin_write32(DMA5_START_ADDR, val)

535
#define bfin_read_DMA5_X_COUNT()		bfin_read16(DMA5_X_COUNT)

536
#define bfin_write_DMA5_X_COUNT(val)		bfin_write16(DMA5_X_COUNT, val)

537
#define bfin_read_DMA5_Y_COUNT()		bfin_read16(DMA5_Y_COUNT)

538
#define bfin_write_DMA5_Y_COUNT(val)		bfin_write16(DMA5_Y_COUNT, val)

539
#define bfin_read_DMA5_X_MODIFY()		bfin_read16(DMA5_X_MODIFY)

540
#define bfin_write_DMA5_X_MODIFY(val)		bfin_write16(DMA5_X_MODIFY, val)

541
#define bfin_read_DMA5_Y_MODIFY()		bfin_read16(DMA5_Y_MODIFY)

542
#define bfin_write_DMA5_Y_MODIFY(val)		bfin_write16(DMA5_Y_MODIFY, val)

543
#define bfin_read_DMA5_CURR_DESC_PTR()		bfin_read32(DMA5_CURR_DESC_PTR)

544
#define bfin_write_DMA5_CURR_DESC_PTR(val)	bfin_write32(DMA5_CURR_DESC_PTR, val)

545
#define bfin_read_DMA5_CURR_ADDR()		bfin_read32(DMA5_CURR_ADDR)

546
#define bfin_write_DMA5_CURR_ADDR(val)		bfin_write32(DMA5_CURR_ADDR, val)

547
#define bfin_read_DMA5_CURR_X_COUNT()		bfin_read16(DMA5_CURR_X_COUNT)

548
#define bfin_write_DMA5_CURR_X_COUNT(val)	bfin_write16(DMA5_CURR_X_COUNT, val)

549
#define bfin_read_DMA5_CURR_Y_COUNT()		bfin_read16(DMA5_CURR_Y_COUNT)

550
#define bfin_write_DMA5_CURR_Y_COUNT(val)	bfin_write16(DMA5_CURR_Y_COUNT, val)

551
#define bfin_read_DMA5_IRQ_STATUS()		bfin_read16(DMA5_IRQ_STATUS)

552
#define bfin_write_DMA5_IRQ_STATUS(val)		bfin_write16(DMA5_IRQ_STATUS, val)

553
#define bfin_read_DMA5_PERIPHERAL_MAP()		bfin_read16(DMA5_PERIPHERAL_MAP)

554
#define bfin_write_DMA5_PERIPHERAL_MAP(val)	bfin_write16(DMA5_PERIPHERAL_MAP, val)

555


556
#define bfin_read_DMA6_CONFIG()			bfin_read16(DMA6_CONFIG)

557
#define bfin_write_DMA6_CONFIG(val)		bfin_write16(DMA6_CONFIG, val)

558
#define bfin_read_DMA6_NEXT_DESC_PTR()		bfin_read32(DMA6_NEXT_DESC_PTR)

559
#define bfin_write_DMA6_NEXT_DESC_PTR(val)	bfin_write32(DMA6_NEXT_DESC_PTR, val)

560
#define bfin_read_DMA6_START_ADDR()		bfin_read32(DMA6_START_ADDR)

561
#define bfin_write_DMA6_START_ADDR(val)		bfin_write32(DMA6_START_ADDR, val)

562
#define bfin_read_DMA6_X_COUNT()		bfin_read16(DMA6_X_COUNT)

563
#define bfin_write_DMA6_X_COUNT(val)		bfin_write16(DMA6_X_COUNT, val)

564
#define bfin_read_DMA6_Y_COUNT()		bfin_read16(DMA6_Y_COUNT)

565
#define bfin_write_DMA6_Y_COUNT(val)		bfin_write16(DMA6_Y_COUNT, val)

566
#define bfin_read_DMA6_X_MODIFY()		bfin_read16(DMA6_X_MODIFY)

567
#define bfin_write_DMA6_X_MODIFY(val)		bfin_write16(DMA6_X_MODIFY, val)

568
#define bfin_read_DMA6_Y_MODIFY()		bfin_read16(DMA6_Y_MODIFY)

569
#define bfin_write_DMA6_Y_MODIFY(val)		bfin_write16(DMA6_Y_MODIFY, val)

570
#define bfin_read_DMA6_CURR_DESC_PTR()		bfin_read32(DMA6_CURR_DESC_PTR)

571
#define bfin_write_DMA6_CURR_DESC_PTR(val)	bfin_write32(DMA6_CURR_DESC_PTR, val)

572
#define bfin_read_DMA6_CURR_ADDR()		bfin_read32(DMA6_CURR_ADDR)

573
#define bfin_write_DMA6_CURR_ADDR(val)		bfin_write32(DMA6_CURR_ADDR, val)

574
#define bfin_read_DMA6_CURR_X_COUNT()		bfin_read16(DMA6_CURR_X_COUNT)

575
#define bfin_write_DMA6_CURR_X_COUNT(val)	bfin_write16(DMA6_CURR_X_COUNT, val)

576
#define bfin_read_DMA6_CURR_Y_COUNT()		bfin_read16(DMA6_CURR_Y_COUNT)

577
#define bfin_write_DMA6_CURR_Y_COUNT(val)	bfin_write16(DMA6_CURR_Y_COUNT, val)

578
#define bfin_read_DMA6_IRQ_STATUS()		bfin_read16(DMA6_IRQ_STATUS)

579
#define bfin_write_DMA6_IRQ_STATUS(val)		bfin_write16(DMA6_IRQ_STATUS, val)

580
#define bfin_read_DMA6_PERIPHERAL_MAP()		bfin_read16(DMA6_PERIPHERAL_MAP)

581
#define bfin_write_DMA6_PERIPHERAL_MAP(val)	bfin_write16(DMA6_PERIPHERAL_MAP, val)

582


583
#define bfin_read_DMA7_CONFIG()			bfin_read16(DMA7_CONFIG)

584
#define bfin_write_DMA7_CONFIG(val)		bfin_write16(DMA7_CONFIG, val)

585
#define bfin_read_DMA7_NEXT_DESC_PTR()		bfin_read32(DMA7_NEXT_DESC_PTR)

586
#define bfin_write_DMA7_NEXT_DESC_PTR(val)	bfin_write32(DMA7_NEXT_DESC_PTR, val)

587
#define bfin_read_DMA7_START_ADDR()		bfin_read32(DMA7_START_ADDR)

588
#define bfin_write_DMA7_START_ADDR(val)		bfin_write32(DMA7_START_ADDR, val)

589
#define bfin_read_DMA7_X_COUNT()		bfin_read16(DMA7_X_COUNT)

590
#define bfin_write_DMA7_X_COUNT(val)		bfin_write16(DMA7_X_COUNT, val)

591
#define bfin_read_DMA7_Y_COUNT()		bfin_read16(DMA7_Y_COUNT)

592
#define bfin_write_DMA7_Y_COUNT(val)		bfin_write16(DMA7_Y_COUNT, val)

593
#define bfin_read_DMA7_X_MODIFY()		bfin_read16(DMA7_X_MODIFY)

594
#define bfin_write_DMA7_X_MODIFY(val)		bfin_write16(DMA7_X_MODIFY, val)

595
#define bfin_read_DMA7_Y_MODIFY()		bfin_read16(DMA7_Y_MODIFY)

596
#define bfin_write_DMA7_Y_MODIFY(val)		bfin_write16(DMA7_Y_MODIFY, val)

597
#define bfin_read_DMA7_CURR_DESC_PTR()		bfin_read32(DMA7_CURR_DESC_PTR)

598
#define bfin_write_DMA7_CURR_DESC_PTR(val)	bfin_write32(DMA7_CURR_DESC_PTR, val)

599
#define bfin_read_DMA7_CURR_ADDR()		bfin_read32(DMA7_CURR_ADDR)

600
#define bfin_write_DMA7_CURR_ADDR(val)		bfin_write32(DMA7_CURR_ADDR, val)

601
#define bfin_read_DMA7_CURR_X_COUNT()		bfin_read16(DMA7_CURR_X_COUNT)

602
#define bfin_write_DMA7_CURR_X_COUNT(val)	bfin_write16(DMA7_CURR_X_COUNT, val)

603
#define bfin_read_DMA7_CURR_Y_COUNT()		bfin_read16(DMA7_CURR_Y_COUNT)

604
#define bfin_write_DMA7_CURR_Y_COUNT(val)	bfin_write16(DMA7_CURR_Y_COUNT, val)

605
#define bfin_read_DMA7_IRQ_STATUS()		bfin_read16(DMA7_IRQ_STATUS)

606
#define bfin_write_DMA7_IRQ_STATUS(val)		bfin_write16(DMA7_IRQ_STATUS, val)

607
#define bfin_read_DMA7_PERIPHERAL_MAP()		bfin_read16(DMA7_PERIPHERAL_MAP)

608
#define bfin_write_DMA7_PERIPHERAL_MAP(val)	bfin_write16(DMA7_PERIPHERAL_MAP, val)

609


610
#define bfin_read_DMA8_CONFIG()			bfin_read16(DMA8_CONFIG)

611
#define bfin_write_DMA8_CONFIG(val)		bfin_write16(DMA8_CONFIG, val)

612
#define bfin_read_DMA8_NEXT_DESC_PTR()		bfin_read32(DMA8_NEXT_DESC_PTR)

613
#define bfin_write_DMA8_NEXT_DESC_PTR(val)	bfin_write32(DMA8_NEXT_DESC_PTR, val)

614
#define bfin_read_DMA8_START_ADDR()		bfin_read32(DMA8_START_ADDR)

615
#define bfin_write_DMA8_START_ADDR(val)		bfin_write32(DMA8_START_ADDR, val)

616
#define bfin_read_DMA8_X_COUNT()		bfin_read16(DMA8_X_COUNT)

617
#define bfin_write_DMA8_X_COUNT(val)		bfin_write16(DMA8_X_COUNT, val)

618
#define bfin_read_DMA8_Y_COUNT()		bfin_read16(DMA8_Y_COUNT)

619
#define bfin_write_DMA8_Y_COUNT(val)		bfin_write16(DMA8_Y_COUNT, val)

620
#define bfin_read_DMA8_X_MODIFY()		bfin_read16(DMA8_X_MODIFY)

621
#define bfin_write_DMA8_X_MODIFY(val)		bfin_write16(DMA8_X_MODIFY, val)

622
#define bfin_read_DMA8_Y_MODIFY()		bfin_read16(DMA8_Y_MODIFY)

623
#define bfin_write_DMA8_Y_MODIFY(val)		bfin_write16(DMA8_Y_MODIFY, val)

624
#define bfin_read_DMA8_CURR_DESC_PTR()		bfin_read32(DMA8_CURR_DESC_PTR)

625
#define bfin_write_DMA8_CURR_DESC_PTR(val)	bfin_write32(DMA8_CURR_DESC_PTR, val)

626
#define bfin_read_DMA8_CURR_ADDR()		bfin_read32(DMA8_CURR_ADDR)

627
#define bfin_write_DMA8_CURR_ADDR(val)		bfin_write32(DMA8_CURR_ADDR, val)

628
#define bfin_read_DMA8_CURR_X_COUNT()		bfin_read16(DMA8_CURR_X_COUNT)

629
#define bfin_write_DMA8_CURR_X_COUNT(val)	bfin_write16(DMA8_CURR_X_COUNT, val)

630
#define bfin_read_DMA8_CURR_Y_COUNT()		bfin_read16(DMA8_CURR_Y_COUNT)

631
#define bfin_write_DMA8_CURR_Y_COUNT(val)	bfin_write16(DMA8_CURR_Y_COUNT, val)

632
#define bfin_read_DMA8_IRQ_STATUS()		bfin_read16(DMA8_IRQ_STATUS)

633
#define bfin_write_DMA8_IRQ_STATUS(val)		bfin_write16(DMA8_IRQ_STATUS, val)

634
#define bfin_read_DMA8_PERIPHERAL_MAP()		bfin_read16(DMA8_PERIPHERAL_MAP)

635
#define bfin_write_DMA8_PERIPHERAL_MAP(val)	bfin_write16(DMA8_PERIPHERAL_MAP, val)

636


637
#define bfin_read_DMA9_CONFIG()			bfin_read16(DMA9_CONFIG)

638
#define bfin_write_DMA9_CONFIG(val)		bfin_write16(DMA9_CONFIG, val)

639
#define bfin_read_DMA9_NEXT_DESC_PTR()		bfin_read32(DMA9_NEXT_DESC_PTR)

640
#define bfin_write_DMA9_NEXT_DESC_PTR(val)	bfin_write32(DMA9_NEXT_DESC_PTR, val)

641
#define bfin_read_DMA9_START_ADDR()		bfin_read32(DMA9_START_ADDR)

642
#define bfin_write_DMA9_START_ADDR(val)		bfin_write32(DMA9_START_ADDR, val)

643
#define bfin_read_DMA9_X_COUNT()		bfin_read16(DMA9_X_COUNT)

644
#define bfin_write_DMA9_X_COUNT(val)		bfin_write16(DMA9_X_COUNT, val)

645
#define bfin_read_DMA9_Y_COUNT()		bfin_read16(DMA9_Y_COUNT)

646
#define bfin_write_DMA9_Y_COUNT(val)		bfin_write16(DMA9_Y_COUNT, val)

647
#define bfin_read_DMA9_X_MODIFY()		bfin_read16(DMA9_X_MODIFY)

648
#define bfin_write_DMA9_X_MODIFY(val)		bfin_write16(DMA9_X_MODIFY, val)

649
#define bfin_read_DMA9_Y_MODIFY()		bfin_read16(DMA9_Y_MODIFY)

650
#define bfin_write_DMA9_Y_MODIFY(val)		bfin_write16(DMA9_Y_MODIFY, val)

651
#define bfin_read_DMA9_CURR_DESC_PTR()		bfin_read32(DMA9_CURR_DESC_PTR)

652
#define bfin_write_DMA9_CURR_DESC_PTR(val)	bfin_write32(DMA9_CURR_DESC_PTR, val)

653
#define bfin_read_DMA9_CURR_ADDR()		bfin_read32(DMA9_CURR_ADDR)

654
#define bfin_write_DMA9_CURR_ADDR(val)		bfin_write32(DMA9_CURR_ADDR, val)

655
#define bfin_read_DMA9_CURR_X_COUNT()		bfin_read16(DMA9_CURR_X_COUNT)

656
#define bfin_write_DMA9_CURR_X_COUNT(val)	bfin_write16(DMA9_CURR_X_COUNT, val)

657
#define bfin_read_DMA9_CURR_Y_COUNT()		bfin_read16(DMA9_CURR_Y_COUNT)

658
#define bfin_write_DMA9_CURR_Y_COUNT(val)	bfin_write16(DMA9_CURR_Y_COUNT, val)

659
#define bfin_read_DMA9_IRQ_STATUS()		bfin_read16(DMA9_IRQ_STATUS)

660
#define bfin_write_DMA9_IRQ_STATUS(val)		bfin_write16(DMA9_IRQ_STATUS, val)

661
#define bfin_read_DMA9_PERIPHERAL_MAP()		bfin_read16(DMA9_PERIPHERAL_MAP)

662
#define bfin_write_DMA9_PERIPHERAL_MAP(val)	bfin_write16(DMA9_PERIPHERAL_MAP, val)

663


664
#define bfin_read_DMA10_CONFIG()		bfin_read16(DMA10_CONFIG)

665
#define bfin_write_DMA10_CONFIG(val)		bfin_write16(DMA10_CONFIG, val)

666
#define bfin_read_DMA10_NEXT_DESC_PTR()		bfin_read32(DMA10_NEXT_DESC_PTR)

667
#define bfin_write_DMA10_NEXT_DESC_PTR(val)	bfin_write32(DMA10_NEXT_DESC_PTR, val)

668
#define bfin_read_DMA10_START_ADDR()		bfin_read32(DMA10_START_ADDR)

669
#define bfin_write_DMA10_START_ADDR(val)	bfin_write32(DMA10_START_ADDR, val)

670
#define bfin_read_DMA10_X_COUNT()		bfin_read16(DMA10_X_COUNT)

671
#define bfin_write_DMA10_X_COUNT(val)		bfin_write16(DMA10_X_COUNT, val)

672
#define bfin_read_DMA10_Y_COUNT()		bfin_read16(DMA10_Y_COUNT)

673
#define bfin_write_DMA10_Y_COUNT(val)		bfin_write16(DMA10_Y_COUNT, val)

674
#define bfin_read_DMA10_X_MODIFY()		bfin_read16(DMA10_X_MODIFY)

675
#define bfin_write_DMA10_X_MODIFY(val)		bfin_write16(DMA10_X_MODIFY, val)

676
#define bfin_read_DMA10_Y_MODIFY()		bfin_read16(DMA10_Y_MODIFY)

677
#define bfin_write_DMA10_Y_MODIFY(val)		bfin_write16(DMA10_Y_MODIFY, val)

678
#define bfin_read_DMA10_CURR_DESC_PTR()		bfin_read32(DMA10_CURR_DESC_PTR)

679
#define bfin_write_DMA10_CURR_DESC_PTR(val)	bfin_write32(DMA10_CURR_DESC_PTR, val)

680
#define bfin_read_DMA10_CURR_ADDR()		bfin_read32(DMA10_CURR_ADDR)

681
#define bfin_write_DMA10_CURR_ADDR(val)		bfin_write32(DMA10_CURR_ADDR, val)

682
#define bfin_read_DMA10_CURR_X_COUNT()		bfin_read16(DMA10_CURR_X_COUNT)

683
#define bfin_write_DMA10_CURR_X_COUNT(val)	bfin_write16(DMA10_CURR_X_COUNT, val)

684
#define bfin_read_DMA10_CURR_Y_COUNT()		bfin_read16(DMA10_CURR_Y_COUNT)

685
#define bfin_write_DMA10_CURR_Y_COUNT(val)	bfin_write16(DMA10_CURR_Y_COUNT, val)

686
#define bfin_read_DMA10_IRQ_STATUS()		bfin_read16(DMA10_IRQ_STATUS)

687
#define bfin_write_DMA10_IRQ_STATUS(val)	bfin_write16(DMA10_IRQ_STATUS, val)

688
#define bfin_read_DMA10_PERIPHERAL_MAP()	bfin_read16(DMA10_PERIPHERAL_MAP)

689
#define bfin_write_DMA10_PERIPHERAL_MAP(val)	bfin_write16(DMA10_PERIPHERAL_MAP, val)

690


691
#define bfin_read_DMA11_CONFIG()		bfin_read16(DMA11_CONFIG)

692
#define bfin_write_DMA11_CONFIG(val)		bfin_write16(DMA11_CONFIG, val)

693
#define bfin_read_DMA11_NEXT_DESC_PTR()		bfin_read32(DMA11_NEXT_DESC_PTR)

694
#define bfin_write_DMA11_NEXT_DESC_PTR(val)	bfin_write32(DMA11_NEXT_DESC_PTR, val)

695
#define bfin_read_DMA11_START_ADDR()		bfin_read32(DMA11_START_ADDR)

696
#define bfin_write_DMA11_START_ADDR(val)	bfin_write32(DMA11_START_ADDR, val)

697
#define bfin_read_DMA11_X_COUNT()		bfin_read16(DMA11_X_COUNT)

698
#define bfin_write_DMA11_X_COUNT(val)		bfin_write16(DMA11_X_COUNT, val)

699
#define bfin_read_DMA11_Y_COUNT()		bfin_read16(DMA11_Y_COUNT)

700
#define bfin_write_DMA11_Y_COUNT(val)		bfin_write16(DMA11_Y_COUNT, val)

701
#define bfin_read_DMA11_X_MODIFY()		bfin_read16(DMA11_X_MODIFY)

702
#define bfin_write_DMA11_X_MODIFY(val)		bfin_write16(DMA11_X_MODIFY, val)

703
#define bfin_read_DMA11_Y_MODIFY()		bfin_read16(DMA11_Y_MODIFY)

704
#define bfin_write_DMA11_Y_MODIFY(val)		bfin_write16(DMA11_Y_MODIFY, val)

705
#define bfin_read_DMA11_CURR_DESC_PTR()		bfin_read32(DMA11_CURR_DESC_PTR)

706
#define bfin_write_DMA11_CURR_DESC_PTR(val)	bfin_write32(DMA11_CURR_DESC_PTR, val)

707
#define bfin_read_DMA11_CURR_ADDR()		bfin_read32(DMA11_CURR_ADDR)

708
#define bfin_write_DMA11_CURR_ADDR(val)		bfin_write32(DMA11_CURR_ADDR, val)

709
#define bfin_read_DMA11_CURR_X_COUNT()		bfin_read16(DMA11_CURR_X_COUNT)

710
#define bfin_write_DMA11_CURR_X_COUNT(val)	bfin_write16(DMA11_CURR_X_COUNT, val)

711
#define bfin_read_DMA11_CURR_Y_COUNT()		bfin_read16(DMA11_CURR_Y_COUNT)

712
#define bfin_write_DMA11_CURR_Y_COUNT(val)	bfin_write16(DMA11_CURR_Y_COUNT, val)

713
#define bfin_read_DMA11_IRQ_STATUS()		bfin_read16(DMA11_IRQ_STATUS)

714
#define bfin_write_DMA11_IRQ_STATUS(val)	bfin_write16(DMA11_IRQ_STATUS, val)

715
#define bfin_read_DMA11_PERIPHERAL_MAP()	bfin_read16(DMA11_PERIPHERAL_MAP)

716
#define bfin_write_DMA11_PERIPHERAL_MAP(val)	bfin_write16(DMA11_PERIPHERAL_MAP, val)

717


718
#define bfin_read_MDMA_D0_CONFIG()		bfin_read16(MDMA_D0_CONFIG)

719
#define bfin_write_MDMA_D0_CONFIG(val)		bfin_write16(MDMA_D0_CONFIG, val)

720
#define bfin_read_MDMA_D0_NEXT_DESC_PTR()	bfin_read32(MDMA_D0_NEXT_DESC_PTR)

721
#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val)	bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)

722
#define bfin_read_MDMA_D0_START_ADDR()		bfin_read32(MDMA_D0_START_ADDR)

723
#define bfin_write_MDMA_D0_START_ADDR(val)	bfin_write32(MDMA_D0_START_ADDR, val)

724
#define bfin_read_MDMA_D0_X_COUNT()		bfin_read16(MDMA_D0_X_COUNT)

725
#define bfin_write_MDMA_D0_X_COUNT(val)		bfin_write16(MDMA_D0_X_COUNT, val)

726
#define bfin_read_MDMA_D0_Y_COUNT()		bfin_read16(MDMA_D0_Y_COUNT)

727
#define bfin_write_MDMA_D0_Y_COUNT(val)		bfin_write16(MDMA_D0_Y_COUNT, val)

728
#define bfin_read_MDMA_D0_X_MODIFY()		bfin_read16(MDMA_D0_X_MODIFY)

729
#define bfin_write_MDMA_D0_X_MODIFY(val)	bfin_write16(MDMA_D0_X_MODIFY, val)

730
#define bfin_read_MDMA_D0_Y_MODIFY()		bfin_read16(MDMA_D0_Y_MODIFY)

731
#define bfin_write_MDMA_D0_Y_MODIFY(val)	bfin_write16(MDMA_D0_Y_MODIFY, val)

732
#define bfin_read_MDMA_D0_CURR_DESC_PTR()	bfin_read32(MDMA_D0_CURR_DESC_PTR)

733
#define bfin_write_MDMA_D0_CURR_DESC_PTR(val)	bfin_write32(MDMA_D0_CURR_DESC_PTR, val)

734
#define bfin_read_MDMA_D0_CURR_ADDR()		bfin_read32(MDMA_D0_CURR_ADDR)

735
#define bfin_write_MDMA_D0_CURR_ADDR(val)	bfin_write32(MDMA_D0_CURR_ADDR, val)

736
#define bfin_read_MDMA_D0_CURR_X_COUNT()	bfin_read16(MDMA_D0_CURR_X_COUNT)

737
#define bfin_write_MDMA_D0_CURR_X_COUNT(val)	bfin_write16(MDMA_D0_CURR_X_COUNT, val)

738
#define bfin_read_MDMA_D0_CURR_Y_COUNT()	bfin_read16(MDMA_D0_CURR_Y_COUNT)

739
#define bfin_write_MDMA_D0_CURR_Y_COUNT(val)	bfin_write16(MDMA_D0_CURR_Y_COUNT, val)

740
#define bfin_read_MDMA_D0_IRQ_STATUS()		bfin_read16(MDMA_D0_IRQ_STATUS)

741
#define bfin_write_MDMA_D0_IRQ_STATUS(val)	bfin_write16(MDMA_D0_IRQ_STATUS, val)

742
#define bfin_read_MDMA_D0_PERIPHERAL_MAP()	bfin_read16(MDMA_D0_PERIPHERAL_MAP)

743
#define bfin_write_MDMA_D0_PERIPHERAL_MAP(val)	bfin_write16(MDMA_D0_PERIPHERAL_MAP, val)

744


745
#define bfin_read_MDMA_S0_CONFIG()		bfin_read16(MDMA_S0_CONFIG)

746
#define bfin_write_MDMA_S0_CONFIG(val)		bfin_write16(MDMA_S0_CONFIG, val)

747
#define bfin_read_MDMA_S0_NEXT_DESC_PTR()	bfin_read32(MDMA_S0_NEXT_DESC_PTR)

748
#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val)	bfin_write32(MDMA_S0_NEXT_DESC_PTR, val)

749
#define bfin_read_MDMA_S0_START_ADDR()		bfin_read32(MDMA_S0_START_ADDR)

750
#define bfin_write_MDMA_S0_START_ADDR(val)	bfin_write32(MDMA_S0_START_ADDR, val)

751
#define bfin_read_MDMA_S0_X_COUNT()		bfin_read16(MDMA_S0_X_COUNT)

752
#define bfin_write_MDMA_S0_X_COUNT(val)		bfin_write16(MDMA_S0_X_COUNT, val)

753
#define bfin_read_MDMA_S0_Y_COUNT()		bfin_read16(MDMA_S0_Y_COUNT)

754
#define bfin_write_MDMA_S0_Y_COUNT(val)		bfin_write16(MDMA_S0_Y_COUNT, val)

755
#define bfin_read_MDMA_S0_X_MODIFY()		bfin_read16(MDMA_S0_X_MODIFY)

756
#define bfin_write_MDMA_S0_X_MODIFY(val)	bfin_write16(MDMA_S0_X_MODIFY, val)

757
#define bfin_read_MDMA_S0_Y_MODIFY()		bfin_read16(MDMA_S0_Y_MODIFY)

758
#define bfin_write_MDMA_S0_Y_MODIFY(val)	bfin_write16(MDMA_S0_Y_MODIFY, val)

759
#define bfin_read_MDMA_S0_CURR_DESC_PTR()	bfin_read32(MDMA_S0_CURR_DESC_PTR)

760
#define bfin_write_MDMA_S0_CURR_DESC_PTR(val)	bfin_write32(MDMA_S0_CURR_DESC_PTR, val)

761
#define bfin_read_MDMA_S0_CURR_ADDR()		bfin_read32(MDMA_S0_CURR_ADDR)

762
#define bfin_write_MDMA_S0_CURR_ADDR(val)	bfin_write32(MDMA_S0_CURR_ADDR, val)

763
#define bfin_read_MDMA_S0_CURR_X_COUNT()	bfin_read16(MDMA_S0_CURR_X_COUNT)

764
#define bfin_write_MDMA_S0_CURR_X_COUNT(val)	bfin_write16(MDMA_S0_CURR_X_COUNT, val)

765
#define bfin_read_MDMA_S0_CURR_Y_COUNT()	bfin_read16(MDMA_S0_CURR_Y_COUNT)

766
#define bfin_write_MDMA_S0_CURR_Y_COUNT(val)	bfin_write16(MDMA_S0_CURR_Y_COUNT, val)

767
#define bfin_read_MDMA_S0_IRQ_STATUS()		bfin_read16(MDMA_S0_IRQ_STATUS)

768
#define bfin_write_MDMA_S0_IRQ_STATUS(val)	bfin_write16(MDMA_S0_IRQ_STATUS, val)

769
#define bfin_read_MDMA_S0_PERIPHERAL_MAP()	bfin_read16(MDMA_S0_PERIPHERAL_MAP)

770
#define bfin_write_MDMA_S0_PERIPHERAL_MAP(val)	bfin_write16(MDMA_S0_PERIPHERAL_MAP, val)

771


772
#define bfin_read_MDMA_D1_CONFIG()		bfin_read16(MDMA_D1_CONFIG)

773
#define bfin_write_MDMA_D1_CONFIG(val)		bfin_write16(MDMA_D1_CONFIG, val)

774
#define bfin_read_MDMA_D1_NEXT_DESC_PTR()	bfin_read32(MDMA_D1_NEXT_DESC_PTR)

775
#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val)	bfin_write32(MDMA_D1_NEXT_DESC_PTR, val)

776
#define bfin_read_MDMA_D1_START_ADDR()		bfin_read32(MDMA_D1_START_ADDR)

777
#define bfin_write_MDMA_D1_START_ADDR(val)	bfin_write32(MDMA_D1_START_ADDR, val)

778
#define bfin_read_MDMA_D1_X_COUNT()		bfin_read16(MDMA_D1_X_COUNT)

779
#define bfin_write_MDMA_D1_X_COUNT(val)		bfin_write16(MDMA_D1_X_COUNT, val)

780
#define bfin_read_MDMA_D1_Y_COUNT()		bfin_read16(MDMA_D1_Y_COUNT)

781
#define bfin_write_MDMA_D1_Y_COUNT(val)		bfin_write16(MDMA_D1_Y_COUNT, val)

782
#define bfin_read_MDMA_D1_X_MODIFY()		bfin_read16(MDMA_D1_X_MODIFY)

783
#define bfin_write_MDMA_D1_X_MODIFY(val)	bfin_write16(MDMA_D1_X_MODIFY, val)

784
#define bfin_read_MDMA_D1_Y_MODIFY()		bfin_read16(MDMA_D1_Y_MODIFY)

785
#define bfin_write_MDMA_D1_Y_MODIFY(val)	bfin_write16(MDMA_D1_Y_MODIFY, val)

786
#define bfin_read_MDMA_D1_CURR_DESC_PTR()	bfin_read32(MDMA_D1_CURR_DESC_PTR)

787
#define bfin_write_MDMA_D1_CURR_DESC_PTR(val)	bfin_write32(MDMA_D1_CURR_DESC_PTR, val)

788
#define bfin_read_MDMA_D1_CURR_ADDR()		bfin_read32(MDMA_D1_CURR_ADDR)

789
#define bfin_write_MDMA_D1_CURR_ADDR(val)	bfin_write32(MDMA_D1_CURR_ADDR, val)

790
#define bfin_read_MDMA_D1_CURR_X_COUNT()	bfin_read16(MDMA_D1_CURR_X_COUNT)

791
#define bfin_write_MDMA_D1_CURR_X_COUNT(val)	bfin_write16(MDMA_D1_CURR_X_COUNT, val)

792
#define bfin_read_MDMA_D1_CURR_Y_COUNT()	bfin_read16(MDMA_D1_CURR_Y_COUNT)

793
#define bfin_write_MDMA_D1_CURR_Y_COUNT(val)	bfin_write16(MDMA_D1_CURR_Y_COUNT, val)

794
#define bfin_read_MDMA_D1_IRQ_STATUS()		bfin_read16(MDMA_D1_IRQ_STATUS)

795
#define bfin_write_MDMA_D1_IRQ_STATUS(val)	bfin_write16(MDMA_D1_IRQ_STATUS, val)

796
#define bfin_read_MDMA_D1_PERIPHERAL_MAP()	bfin_read16(MDMA_D1_PERIPHERAL_MAP)

797
#define bfin_write_MDMA_D1_PERIPHERAL_MAP(val)	bfin_write16(MDMA_D1_PERIPHERAL_MAP, val)

798


799
#define bfin_read_MDMA_S1_CONFIG()		bfin_read16(MDMA_S1_CONFIG)

800
#define bfin_write_MDMA_S1_CONFIG(val)		bfin_write16(MDMA_S1_CONFIG, val)

801
#define bfin_read_MDMA_S1_NEXT_DESC_PTR()	bfin_read32(MDMA_S1_NEXT_DESC_PTR)

802
#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val)	bfin_write32(MDMA_S1_NEXT_DESC_PTR, val)

803
#define bfin_read_MDMA_S1_START_ADDR()		bfin_read32(MDMA_S1_START_ADDR)

804
#define bfin_write_MDMA_S1_START_ADDR(val)	bfin_write32(MDMA_S1_START_ADDR, val)

805
#define bfin_read_MDMA_S1_X_COUNT()		bfin_read16(MDMA_S1_X_COUNT)

806
#define bfin_write_MDMA_S1_X_COUNT(val)		bfin_write16(MDMA_S1_X_COUNT, val)

807
#define bfin_read_MDMA_S1_Y_COUNT()		bfin_read16(MDMA_S1_Y_COUNT)

808
#define bfin_write_MDMA_S1_Y_COUNT(val)		bfin_write16(MDMA_S1_Y_COUNT, val)

809
#define bfin_read_MDMA_S1_X_MODIFY()		bfin_read16(MDMA_S1_X_MODIFY)

810
#define bfin_write_MDMA_S1_X_MODIFY(val)	bfin_write16(MDMA_S1_X_MODIFY, val)

811
#define bfin_read_MDMA_S1_Y_MODIFY()		bfin_read16(MDMA_S1_Y_MODIFY)

812
#define bfin_write_MDMA_S1_Y_MODIFY(val)	bfin_write16(MDMA_S1_Y_MODIFY, val)

813
#define bfin_read_MDMA_S1_CURR_DESC_PTR()	bfin_read32(MDMA_S1_CURR_DESC_PTR)

814
#define bfin_write_MDMA_S1_CURR_DESC_PTR(val)	bfin_write32(MDMA_S1_CURR_DESC_PTR, val)

815
#define bfin_read_MDMA_S1_CURR_ADDR()		bfin_read32(MDMA_S1_CURR_ADDR)

816
#define bfin_write_MDMA_S1_CURR_ADDR(val)	bfin_write32(MDMA_S1_CURR_ADDR, val)

817
#define bfin_read_MDMA_S1_CURR_X_COUNT()	bfin_read16(MDMA_S1_CURR_X_COUNT)

818
#define bfin_write_MDMA_S1_CURR_X_COUNT(val)	bfin_write16(MDMA_S1_CURR_X_COUNT, val)

819
#define bfin_read_MDMA_S1_CURR_Y_COUNT()	bfin_read16(MDMA_S1_CURR_Y_COUNT)

820
#define bfin_write_MDMA_S1_CURR_Y_COUNT(val)	bfin_write16(MDMA_S1_CURR_Y_COUNT, val)

821
#define bfin_read_MDMA_S1_IRQ_STATUS()		bfin_read16(MDMA_S1_IRQ_STATUS)

822
#define bfin_write_MDMA_S1_IRQ_STATUS(val)	bfin_write16(MDMA_S1_IRQ_STATUS, val)

823
#define bfin_read_MDMA_S1_PERIPHERAL_MAP()	bfin_read16(MDMA_S1_PERIPHERAL_MAP)

824
#define bfin_write_MDMA_S1_PERIPHERAL_MAP(val)	bfin_write16(MDMA_S1_PERIPHERAL_MAP, val)

825


826


827
/* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF)							*/

828
#define bfin_read_PPI_CONTROL()			bfin_read16(PPI_CONTROL)

829
#define bfin_write_PPI_CONTROL(val)		bfin_write16(PPI_CONTROL, val)

830
#define bfin_read_PPI_STATUS()			bfin_read16(PPI_STATUS)

831
#define bfin_write_PPI_STATUS(val)		bfin_write16(PPI_STATUS, val)

832
#define bfin_clear_PPI_STATUS()			bfin_write_PPI_STATUS(0xFFFF)

833
#define bfin_read_PPI_DELAY()			bfin_read16(PPI_DELAY)

834
#define bfin_write_PPI_DELAY(val)		bfin_write16(PPI_DELAY, val)

835
#define bfin_read_PPI_COUNT()			bfin_read16(PPI_COUNT)

836
#define bfin_write_PPI_COUNT(val)		bfin_write16(PPI_COUNT, val)

837
#define bfin_read_PPI_FRAME()			bfin_read16(PPI_FRAME)

838
#define bfin_write_PPI_FRAME(val)		bfin_write16(PPI_FRAME, val)

839


840


841
/* Two-Wire Interface		(0xFFC01400 - 0xFFC014FF)								*/

842


843
/* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF)								*/

844
#define bfin_read_PORTGIO()			bfin_read16(PORTGIO)

845
#define bfin_write_PORTGIO(val)			bfin_write16(PORTGIO, val)

846
#define bfin_read_PORTGIO_CLEAR()		bfin_read16(PORTGIO_CLEAR)

847
#define bfin_write_PORTGIO_CLEAR(val)		bfin_write16(PORTGIO_CLEAR, val)

848
#define bfin_read_PORTGIO_SET()			bfin_read16(PORTGIO_SET)

849
#define bfin_write_PORTGIO_SET(val)		bfin_write16(PORTGIO_SET, val)

850
#define bfin_read_PORTGIO_TOGGLE()		bfin_read16(PORTGIO_TOGGLE)

851
#define bfin_write_PORTGIO_TOGGLE(val)		bfin_write16(PORTGIO_TOGGLE, val)

852
#define bfin_read_PORTGIO_MASKA()		bfin_read16(PORTGIO_MASKA)

853
#define bfin_write_PORTGIO_MASKA(val)		bfin_write16(PORTGIO_MASKA, val)

854
#define bfin_read_PORTGIO_MASKA_CLEAR()		bfin_read16(PORTGIO_MASKA_CLEAR)

855
#define bfin_write_PORTGIO_MASKA_CLEAR(val)	bfin_write16(PORTGIO_MASKA_CLEAR, val)

856
#define bfin_read_PORTGIO_MASKA_SET()		bfin_read16(PORTGIO_MASKA_SET)

857
#define bfin_write_PORTGIO_MASKA_SET(val)	bfin_write16(PORTGIO_MASKA_SET, val)

858
#define bfin_read_PORTGIO_MASKA_TOGGLE()	bfin_read16(PORTGIO_MASKA_TOGGLE)

859
#define bfin_write_PORTGIO_MASKA_TOGGLE(val)	bfin_write16(PORTGIO_MASKA_TOGGLE, val)

860
#define bfin_read_PORTGIO_MASKB()		bfin_read16(PORTGIO_MASKB)

861
#define bfin_write_PORTGIO_MASKB(val)		bfin_write16(PORTGIO_MASKB, val)

862
#define bfin_read_PORTGIO_MASKB_CLEAR()		bfin_read16(PORTGIO_MASKB_CLEAR)

863
#define bfin_write_PORTGIO_MASKB_CLEAR(val)	bfin_write16(PORTGIO_MASKB_CLEAR, val)

864
#define bfin_read_PORTGIO_MASKB_SET()		bfin_read16(PORTGIO_MASKB_SET)

865
#define bfin_write_PORTGIO_MASKB_SET(val)	bfin_write16(PORTGIO_MASKB_SET, val)

866
#define bfin_read_PORTGIO_MASKB_TOGGLE()	bfin_read16(PORTGIO_MASKB_TOGGLE)

867
#define bfin_write_PORTGIO_MASKB_TOGGLE(val)	bfin_write16(PORTGIO_MASKB_TOGGLE, val)

868
#define bfin_read_PORTGIO_DIR()			bfin_read16(PORTGIO_DIR)

869
#define bfin_write_PORTGIO_DIR(val)		bfin_write16(PORTGIO_DIR, val)

870
#define bfin_read_PORTGIO_POLAR()		bfin_read16(PORTGIO_POLAR)

871
#define bfin_write_PORTGIO_POLAR(val)		bfin_write16(PORTGIO_POLAR, val)

872
#define bfin_read_PORTGIO_EDGE()		bfin_read16(PORTGIO_EDGE)

873
#define bfin_write_PORTGIO_EDGE(val)		bfin_write16(PORTGIO_EDGE, val)

874
#define bfin_read_PORTGIO_BOTH()		bfin_read16(PORTGIO_BOTH)

875
#define bfin_write_PORTGIO_BOTH(val)		bfin_write16(PORTGIO_BOTH, val)

876
#define bfin_read_PORTGIO_INEN()		bfin_read16(PORTGIO_INEN)

877
#define bfin_write_PORTGIO_INEN(val)		bfin_write16(PORTGIO_INEN, val)

878


879


880
/* General Purpose I/O Port H (0xFFC01700 - 0xFFC017FF)								*/

881
#define bfin_read_PORTHIO()			bfin_read16(PORTHIO)

882
#define bfin_write_PORTHIO(val)			bfin_write16(PORTHIO, val)

883
#define bfin_read_PORTHIO_CLEAR()		bfin_read16(PORTHIO_CLEAR)

884
#define bfin_write_PORTHIO_CLEAR(val)		bfin_write16(PORTHIO_CLEAR, val)

885
#define bfin_read_PORTHIO_SET()			bfin_read16(PORTHIO_SET)

886
#define bfin_write_PORTHIO_SET(val)		bfin_write16(PORTHIO_SET, val)

887
#define bfin_read_PORTHIO_TOGGLE()		bfin_read16(PORTHIO_TOGGLE)

888
#define bfin_write_PORTHIO_TOGGLE(val)		bfin_write16(PORTHIO_TOGGLE, val)

889
#define bfin_read_PORTHIO_MASKA()		bfin_read16(PORTHIO_MASKA)

890
#define bfin_write_PORTHIO_MASKA(val)		bfin_write16(PORTHIO_MASKA, val)

891
#define bfin_read_PORTHIO_MASKA_CLEAR()		bfin_read16(PORTHIO_MASKA_CLEAR)

892
#define bfin_write_PORTHIO_MASKA_CLEAR(val)	bfin_write16(PORTHIO_MASKA_CLEAR, val)

893
#define bfin_read_PORTHIO_MASKA_SET()		bfin_read16(PORTHIO_MASKA_SET)

894
#define bfin_write_PORTHIO_MASKA_SET(val)	bfin_write16(PORTHIO_MASKA_SET, val)

895
#define bfin_read_PORTHIO_MASKA_TOGGLE()	bfin_read16(PORTHIO_MASKA_TOGGLE)

896
#define bfin_write_PORTHIO_MASKA_TOGGLE(val)	bfin_write16(PORTHIO_MASKA_TOGGLE, val)

897
#define bfin_read_PORTHIO_MASKB()		bfin_read16(PORTHIO_MASKB)

898
#define bfin_write_PORTHIO_MASKB(val)		bfin_write16(PORTHIO_MASKB, val)

899
#define bfin_read_PORTHIO_MASKB_CLEAR()		bfin_read16(PORTHIO_MASKB_CLEAR)

900
#define bfin_write_PORTHIO_MASKB_CLEAR(val)	bfin_write16(PORTHIO_MASKB_CLEAR, val)

901
#define bfin_read_PORTHIO_MASKB_SET()		bfin_read16(PORTHIO_MASKB_SET)

902
#define bfin_write_PORTHIO_MASKB_SET(val)	bfin_write16(PORTHIO_MASKB_SET, val)

903
#define bfin_read_PORTHIO_MASKB_TOGGLE()	bfin_read16(PORTHIO_MASKB_TOGGLE)

904
#define bfin_write_PORTHIO_MASKB_TOGGLE(val)	bfin_write16(PORTHIO_MASKB_TOGGLE, val)

905
#define bfin_read_PORTHIO_DIR()			bfin_read16(PORTHIO_DIR)

906
#define bfin_write_PORTHIO_DIR(val)		bfin_write16(PORTHIO_DIR, val)

907
#define bfin_read_PORTHIO_POLAR()		bfin_read16(PORTHIO_POLAR)

908
#define bfin_write_PORTHIO_POLAR(val)		bfin_write16(PORTHIO_POLAR, val)

909
#define bfin_read_PORTHIO_EDGE()		bfin_read16(PORTHIO_EDGE)

910
#define bfin_write_PORTHIO_EDGE(val)		bfin_write16(PORTHIO_EDGE, val)

911
#define bfin_read_PORTHIO_BOTH()		bfin_read16(PORTHIO_BOTH)

912
#define bfin_write_PORTHIO_BOTH(val)		bfin_write16(PORTHIO_BOTH, val)

913
#define bfin_read_PORTHIO_INEN()		bfin_read16(PORTHIO_INEN)

914
#define bfin_write_PORTHIO_INEN(val)		bfin_write16(PORTHIO_INEN, val)

915


916


917
/* UART1 Controller		(0xFFC02000 - 0xFFC020FF)								*/

918
#define bfin_read_UART1_THR()			bfin_read16(UART1_THR)

919
#define bfin_write_UART1_THR(val)		bfin_write16(UART1_THR, val)

920
#define bfin_read_UART1_RBR()			bfin_read16(UART1_RBR)

921
#define bfin_write_UART1_RBR(val)		bfin_write16(UART1_RBR, val)

922
#define bfin_read_UART1_DLL()			bfin_read16(UART1_DLL)

923
#define bfin_write_UART1_DLL(val)		bfin_write16(UART1_DLL, val)

924
#define bfin_read_UART1_IER()			bfin_read16(UART1_IER)

925
#define bfin_write_UART1_IER(val)		bfin_write16(UART1_IER, val)

926
#define bfin_read_UART1_DLH()			bfin_read16(UART1_DLH)

927
#define bfin_write_UART1_DLH(val)		bfin_write16(UART1_DLH, val)

928
#define bfin_read_UART1_IIR()			bfin_read16(UART1_IIR)

929
#define bfin_write_UART1_IIR(val)		bfin_write16(UART1_IIR, val)

930
#define bfin_read_UART1_LCR()			bfin_read16(UART1_LCR)

931
#define bfin_write_UART1_LCR(val)		bfin_write16(UART1_LCR, val)

932
#define bfin_read_UART1_MCR()			bfin_read16(UART1_MCR)

933
#define bfin_write_UART1_MCR(val)		bfin_write16(UART1_MCR, val)

934
#define bfin_read_UART1_LSR()			bfin_read16(UART1_LSR)

935
#define bfin_write_UART1_LSR(val)		bfin_write16(UART1_LSR, val)

936
#define bfin_read_UART1_MSR()			bfin_read16(UART1_MSR)

937
#define bfin_write_UART1_MSR(val)		bfin_write16(UART1_MSR, val)

938
#define bfin_read_UART1_SCR()			bfin_read16(UART1_SCR)

939
#define bfin_write_UART1_SCR(val)		bfin_write16(UART1_SCR, val)

940
#define bfin_read_UART1_GCTL()			bfin_read16(UART1_GCTL)

941
#define bfin_write_UART1_GCTL(val)		bfin_write16(UART1_GCTL, val)

942


943
/* Omit CAN register sets from the cdefBF534.h (CAN is not in the ADSP-BF52x processor) */

944


945
/* Pin Control Registers	(0xFFC03200 - 0xFFC032FF)								*/

946
#define bfin_read_PORTF_FER()			bfin_read16(PORTF_FER)

947
#define bfin_write_PORTF_FER(val)		bfin_write16(PORTF_FER, val)

948
#define bfin_read_PORTG_FER()			bfin_read16(PORTG_FER)

949
#define bfin_write_PORTG_FER(val)		bfin_write16(PORTG_FER, val)

950
#define bfin_read_PORTH_FER()			bfin_read16(PORTH_FER)

951
#define bfin_write_PORTH_FER(val)		bfin_write16(PORTH_FER, val)

952
#define bfin_read_PORT_MUX()			bfin_read16(PORT_MUX)

953
#define bfin_write_PORT_MUX(val)		bfin_write16(PORT_MUX, val)

954


955


956
/* Handshake MDMA Registers	(0xFFC03300 - 0xFFC033FF)								*/

957
#define bfin_read_HMDMA0_CONTROL()		bfin_read16(HMDMA0_CONTROL)

958
#define bfin_write_HMDMA0_CONTROL(val)		bfin_write16(HMDMA0_CONTROL, val)

959
#define bfin_read_HMDMA0_ECINIT()		bfin_read16(HMDMA0_ECINIT)

960
#define bfin_write_HMDMA0_ECINIT(val)		bfin_write16(HMDMA0_ECINIT, val)

961
#define bfin_read_HMDMA0_BCINIT()		bfin_read16(HMDMA0_BCINIT)

962
#define bfin_write_HMDMA0_BCINIT(val)		bfin_write16(HMDMA0_BCINIT, val)

963
#define bfin_read_HMDMA0_ECURGENT()		bfin_read16(HMDMA0_ECURGENT)

964
#define bfin_write_HMDMA0_ECURGENT(val)		bfin_write16(HMDMA0_ECURGENT, val)

965
#define bfin_read_HMDMA0_ECOVERFLOW()		bfin_read16(HMDMA0_ECOVERFLOW)

966
#define bfin_write_HMDMA0_ECOVERFLOW(val)	bfin_write16(HMDMA0_ECOVERFLOW, val)

967
#define bfin_read_HMDMA0_ECOUNT()		bfin_read16(HMDMA0_ECOUNT)

968
#define bfin_write_HMDMA0_ECOUNT(val)		bfin_write16(HMDMA0_ECOUNT, val)

969
#define bfin_read_HMDMA0_BCOUNT()		bfin_read16(HMDMA0_BCOUNT)

970
#define bfin_write_HMDMA0_BCOUNT(val)		bfin_write16(HMDMA0_BCOUNT, val)

971


972
#define bfin_read_HMDMA1_CONTROL()		bfin_read16(HMDMA1_CONTROL)

973
#define bfin_write_HMDMA1_CONTROL(val)		bfin_write16(HMDMA1_CONTROL, val)

974
#define bfin_read_HMDMA1_ECINIT()		bfin_read16(HMDMA1_ECINIT)

975
#define bfin_write_HMDMA1_ECINIT(val)		bfin_write16(HMDMA1_ECINIT, val)

976
#define bfin_read_HMDMA1_BCINIT()		bfin_read16(HMDMA1_BCINIT)

977
#define bfin_write_HMDMA1_BCINIT(val)		bfin_write16(HMDMA1_BCINIT, val)

978
#define bfin_read_HMDMA1_ECURGENT()		bfin_read16(HMDMA1_ECURGENT)

979
#define bfin_write_HMDMA1_ECURGENT(val)		bfin_write16(HMDMA1_ECURGENT, val)

980
#define bfin_read_HMDMA1_ECOVERFLOW()		bfin_read16(HMDMA1_ECOVERFLOW)

981
#define bfin_write_HMDMA1_ECOVERFLOW(val)	bfin_write16(HMDMA1_ECOVERFLOW, val)

982
#define bfin_read_HMDMA1_ECOUNT()		bfin_read16(HMDMA1_ECOUNT)

983
#define bfin_write_HMDMA1_ECOUNT(val)		bfin_write16(HMDMA1_ECOUNT, val)

984
#define bfin_read_HMDMA1_BCOUNT()		bfin_read16(HMDMA1_BCOUNT)

985
#define bfin_write_HMDMA1_BCOUNT(val)		bfin_write16(HMDMA1_BCOUNT, val)

986


987
/* ==== end from cdefBF534.h ==== */

988


989
/* GPIO PIN mux (0xFFC03210 - OxFFC03288) */

990


991
#define bfin_read_PORTF_MUX()			bfin_read16(PORTF_MUX)

992
#define bfin_write_PORTF_MUX(val)		bfin_write16(PORTF_MUX, val)

993
#define bfin_read_PORTG_MUX()			bfin_read16(PORTG_MUX)

994
#define bfin_write_PORTG_MUX(val)		bfin_write16(PORTG_MUX, val)

995
#define bfin_read_PORTH_MUX()			bfin_read16(PORTH_MUX)

996
#define bfin_write_PORTH_MUX(val)		bfin_write16(PORTH_MUX, val)

997


998
#define bfin_read_PORTF_DRIVE()			bfin_read16(PORTF_DRIVE)

999
#define bfin_write_PORTF_DRIVE(val)		bfin_write16(PORTF_DRIVE, val)

1000
#define bfin_read_PORTG_DRIVE()			bfin_read16(PORTG_DRIVE)

1001
#define bfin_write_PORTG_DRIVE(val)		bfin_write16(PORTG_DRIVE, val)

1002
#define bfin_read_PORTH_DRIVE()			bfin_read16(PORTH_DRIVE)

1003
#define bfin_write_PORTH_DRIVE(val)		bfin_write16(PORTH_DRIVE, val)

1004
#define bfin_read_PORTF_SLEW()			bfin_read16(PORTF_SLEW)

1005
#define bfin_write_PORTF_SLEW(val)		bfin_write16(PORTF_SLEW, val)

1006
#define bfin_read_PORTG_SLEW()			bfin_read16(PORTG_SLEW)

1007
#define bfin_write_PORTG_SLEW(val)		bfin_write16(PORTG_SLEW, val)

1008
#define bfin_read_PORTH_SLEW()			bfin_read16(PORTH_SLEW)

1009
#define bfin_write_PORTH_SLEW(val)		bfin_write16(PORTH_SLEW, val)

1010
#define bfin_read_PORTF_HYSTERESIS()		bfin_read16(PORTF_HYSTERESIS)

1011
#define bfin_write_PORTF_HYSTERESIS(val)	bfin_write16(PORTF_HYSTERESIS, val)

1012
#define bfin_read_PORTG_HYSTERESIS()		bfin_read16(PORTG_HYSTERESIS)

1013
#define bfin_write_PORTG_HYSTERESIS(val)	bfin_write16(PORTG_HYSTERESIS, val)

1014
#define bfin_read_PORTH_HYSTERESIS()		bfin_read16(PORTH_HYSTERESIS)

1015
#define bfin_write_PORTH_HYSTERESIS(val)	bfin_write16(PORTH_HYSTERESIS, val)

1016
#define bfin_read_MISCPORT_DRIVE()		bfin_read16(MISCPORT_DRIVE)

1017
#define bfin_write_MISCPORT_DRIVE(val)		bfin_write16(MISCPORT_DRIVE, val)

1018
#define bfin_read_MISCPORT_SLEW()		bfin_read16(MISCPORT_SLEW)

1019
#define bfin_write_MISCPORT_SLEW(val)		bfin_write16(MISCPORT_SLEW, val)

1020
#define bfin_read_MISCPORT_HYSTERESIS()		bfin_read16(MISCPORT_HYSTERESIS)

1021
#define bfin_write_MISCPORT_HYSTERESIS(val)	bfin_write16(MISCPORT_HYSTERESIS, val)

1022


1023
/* HOST Port Registers */

1024


1025
#define bfin_read_HOST_CONTROL()		bfin_read16(HOST_CONTROL)

1026
#define bfin_write_HOST_CONTROL(val)		bfin_write16(HOST_CONTROL, val)

1027
#define bfin_read_HOST_STATUS()			bfin_read16(HOST_STATUS)

1028
#define bfin_write_HOST_STATUS(val)		bfin_write16(HOST_STATUS, val)

1029
#define bfin_read_HOST_TIMEOUT()		bfin_read16(HOST_TIMEOUT)

1030
#define bfin_write_HOST_TIMEOUT(val)		bfin_write16(HOST_TIMEOUT, val)

1031


1032
/* Counter Registers */

1033


1034
#define bfin_read_CNT_CONFIG()			bfin_read16(CNT_CONFIG)

1035
#define bfin_write_CNT_CONFIG(val)		bfin_write16(CNT_CONFIG, val)

1036
#define bfin_read_CNT_IMASK()			bfin_read16(CNT_IMASK)

1037
#define bfin_write_CNT_IMASK(val)		bfin_write16(CNT_IMASK, val)

1038
#define bfin_read_CNT_STATUS()			bfin_read16(CNT_STATUS)

1039
#define bfin_write_CNT_STATUS(val)		bfin_write16(CNT_STATUS, val)

1040
#define bfin_read_CNT_COMMAND()			bfin_read16(CNT_COMMAND)

1041
#define bfin_write_CNT_COMMAND(val)		bfin_write16(CNT_COMMAND, val)

1042
#define bfin_read_CNT_DEBOUNCE()		bfin_read16(CNT_DEBOUNCE)

1043
#define bfin_write_CNT_DEBOUNCE(val)		bfin_write16(CNT_DEBOUNCE, val)

1044
#define bfin_read_CNT_COUNTER()			bfin_read32(CNT_COUNTER)

1045
#define bfin_write_CNT_COUNTER(val)		bfin_write32(CNT_COUNTER, val)

1046
#define bfin_read_CNT_MAX()			bfin_read32(CNT_MAX)

1047
#define bfin_write_CNT_MAX(val)			bfin_write32(CNT_MAX, val)

1048
#define bfin_read_CNT_MIN()			bfin_read32(CNT_MIN)

1049
#define bfin_write_CNT_MIN(val)			bfin_write32(CNT_MIN, val)

1050


1051
/* Security Registers */

1052


1053
#define bfin_read_SECURE_SYSSWT()		bfin_read32(SECURE_SYSSWT)

1054
#define bfin_write_SECURE_SYSSWT(val)		bfin_write32(SECURE_SYSSWT, val)

1055
#define bfin_read_SECURE_CONTROL()		bfin_read16(SECURE_CONTROL)

1056
#define bfin_write_SECURE_CONTROL(val)		bfin_write16(SECURE_CONTROL, val)

1057
#define bfin_read_SECURE_STATUS()		bfin_read16(SECURE_STATUS)

1058
#define bfin_write_SECURE_STATUS(val)		bfin_write16(SECURE_STATUS, val)

1059


1060
/* NFC Registers */

1061


1062
#define bfin_read_NFC_CTL()			bfin_read16(NFC_CTL)

1063
#define bfin_write_NFC_CTL(val)			bfin_write16(NFC_CTL, val)

1064
#define bfin_read_NFC_STAT()			bfin_read16(NFC_STAT)

1065
#define bfin_write_NFC_STAT(val)		bfin_write16(NFC_STAT, val)

1066
#define bfin_read_NFC_IRQSTAT()			bfin_read16(NFC_IRQSTAT)

1067
#define bfin_write_NFC_IRQSTAT(val)		bfin_write16(NFC_IRQSTAT, val)

1068
#define bfin_read_NFC_IRQMASK()			bfin_read16(NFC_IRQMASK)

1069
#define bfin_write_NFC_IRQMASK(val)		bfin_write16(NFC_IRQMASK, val)

1070
#define bfin_read_NFC_ECC0()			bfin_read16(NFC_ECC0)

1071
#define bfin_write_NFC_ECC0(val)		bfin_write16(NFC_ECC0, val)

1072
#define bfin_read_NFC_ECC1()			bfin_read16(NFC_ECC1)

1073
#define bfin_write_NFC_ECC1(val)		bfin_write16(NFC_ECC1, val)

1074
#define bfin_read_NFC_ECC2()			bfin_read16(NFC_ECC2)

1075
#define bfin_write_NFC_ECC2(val)		bfin_write16(NFC_ECC2, val)

1076
#define bfin_read_NFC_ECC3()			bfin_read16(NFC_ECC3)

1077
#define bfin_write_NFC_ECC3(val)		bfin_write16(NFC_ECC3, val)

1078
#define bfin_read_NFC_COUNT()			bfin_read16(NFC_COUNT)

1079
#define bfin_write_NFC_COUNT(val)		bfin_write16(NFC_COUNT, val)

1080
#define bfin_read_NFC_RST()			bfin_read16(NFC_RST)

1081
#define bfin_write_NFC_RST(val)			bfin_write16(NFC_RST, val)

1082
#define bfin_read_NFC_PGCTL()			bfin_read16(NFC_PGCTL)

1083
#define bfin_write_NFC_PGCTL(val)		bfin_write16(NFC_PGCTL, val)

1084
#define bfin_read_NFC_READ()			bfin_read16(NFC_READ)

1085
#define bfin_write_NFC_READ(val)		bfin_write16(NFC_READ, val)

1086
#define bfin_read_NFC_ADDR()			bfin_read16(NFC_ADDR)

1087
#define bfin_write_NFC_ADDR(val)		bfin_write16(NFC_ADDR, val)

1088
#define bfin_read_NFC_CMD()			bfin_read16(NFC_CMD)

1089
#define bfin_write_NFC_CMD(val)			bfin_write16(NFC_CMD, val)

1090
#define bfin_read_NFC_DATA_WR()			bfin_read16(NFC_DATA_WR)

1091
#define bfin_write_NFC_DATA_WR(val)		bfin_write16(NFC_DATA_WR, val)

1092
#define bfin_read_NFC_DATA_RD()			bfin_read16(NFC_DATA_RD)

1093
#define bfin_write_NFC_DATA_RD(val)		bfin_write16(NFC_DATA_RD, val)

1094


1095
#endif /* _CDEF_BF522_H */

1096


1097