Path: blob/master/arch/blackfin/mach-bf527/include/mach/dma.h
10820 views
/* mach/dma.h - arch-specific DMA defines1*2* Copyright 2004-2008 Analog Devices Inc.3*4* Licensed under the GPL-2 or later.5*/67#ifndef _MACH_DMA_H_8#define _MACH_DMA_H_910#define MAX_DMA_CHANNELS 161112#define CH_PPI 0 /* PPI receive/transmit or NFC */13#define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */14#define CH_EMAC_HOSTDP 1 /* Ethernet MAC receive or HOSTDP */15#define CH_EMAC_TX 2 /* Ethernet MAC transmit or NFC */16#define CH_SPORT0_RX 3 /* SPORT0 receive */17#define CH_SPORT0_TX 4 /* SPORT0 transmit */18#define CH_SPORT1_RX 5 /* SPORT1 receive */19#define CH_SPORT1_TX 6 /* SPORT1 transmit */20#define CH_SPI 7 /* SPI transmit/receive */21#define CH_UART0_RX 8 /* UART0 receive */22#define CH_UART0_TX 9 /* UART0 transmit */23#define CH_UART1_RX 10 /* UART1 receive */24#define CH_UART1_TX 11 /* UART1 transmit */2526#define CH_MEM_STREAM0_DEST 12 /* TX */27#define CH_MEM_STREAM0_SRC 13 /* RX */28#define CH_MEM_STREAM1_DEST 14 /* TX */29#define CH_MEM_STREAM1_SRC 15 /* RX */3031#if defined(CONFIG_BF527_NAND_D_PORTF)32#define CH_NFC CH_PPI /* PPI receive/transmit or NFC */33#elif defined(CONFIG_BF527_NAND_D_PORTH)34#define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */35#endif3637#endif383940