Path: blob/master/arch/blackfin/mach-bf533/boards/H8606.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2007-2008 HV Sistemas S.L.3* Javier Herrero <[email protected]>4* 2005 National ICT Australia (NICTA)5* Aidan Williams <[email protected]>6*7* Licensed under the GPL-2 or later.8*/910#include <linux/device.h>11#include <linux/platform_device.h>12#include <linux/mtd/mtd.h>13#include <linux/mtd/partitions.h>14#include <linux/spi/spi.h>15#include <linux/spi/flash.h>16#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)17#include <linux/usb/isp1362.h>18#endif19#include <linux/irq.h>2021#include <asm/dma.h>22#include <asm/bfin5xx_spi.h>23#include <asm/reboot.h>24#include <asm/portmux.h>2526/*27* Name the Board for the /proc/cpuinfo28*/29const char bfin_board_name[] = "HV Sistemas H8606";3031#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)32static struct platform_device rtc_device = {33.name = "rtc-bfin",34.id = -1,35};36#endif3738/*39* Driver needs to know address, irq and flag pin.40*/41#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)42static struct resource dm9000_resources[] = {43[0] = {44.start = 0x20300000,45.end = 0x20300002,46.flags = IORESOURCE_MEM,47},48[1] = {49.start = 0x20300004,50.end = 0x20300006,51.flags = IORESOURCE_MEM,52},53[2] = {54.start = IRQ_PF10,55.end = IRQ_PF10,56.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),57},58};5960static struct platform_device dm9000_device = {61.id = 0,62.name = "dm9000",63.resource = dm9000_resources,64.num_resources = ARRAY_SIZE(dm9000_resources),65};66#endif6768#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)69#include <linux/smc91x.h>7071static struct smc91x_platdata smc91x_info = {72.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,73.leda = RPC_LED_100_10,74.ledb = RPC_LED_TX_RX,75};7677static struct resource smc91x_resources[] = {78{79.name = "smc91x-regs",80.start = 0x20300300,81.end = 0x20300300 + 16,82.flags = IORESOURCE_MEM,83}, {84.start = IRQ_PROG_INTB,85.end = IRQ_PROG_INTB,86.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,87}, {88.start = IRQ_PF7,89.end = IRQ_PF7,90.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,91},92};9394static struct platform_device smc91x_device = {95.name = "smc91x",96.id = 0,97.num_resources = ARRAY_SIZE(smc91x_resources),98.resource = smc91x_resources,99.dev = {100.platform_data = &smc91x_info,101},102};103#endif104105#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)106static struct resource net2272_bfin_resources[] = {107{108.start = 0x20300000,109.end = 0x20300000 + 0x100,110.flags = IORESOURCE_MEM,111}, {112.start = IRQ_PF10,113.end = IRQ_PF10,114.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,115},116};117118static struct platform_device net2272_bfin_device = {119.name = "net2272",120.id = -1,121.num_resources = ARRAY_SIZE(net2272_bfin_resources),122.resource = net2272_bfin_resources,123};124#endif125126#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)127/* all SPI peripherals info goes here */128129#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)130static struct mtd_partition bfin_spi_flash_partitions[] = {131{132.name = "bootloader (spi)",133.size = 0x40000,134.offset = 0,135.mask_flags = MTD_CAP_ROM136}, {137.name = "fpga (spi)",138.size = 0x30000,139.offset = 0x40000140}, {141.name = "linux kernel (spi)",142.size = 0x150000,143.offset = 0x70000144}, {145.name = "jffs2 root file system (spi)",146.size = 0x640000,147.offset = 0x1c0000,148}149};150151static struct flash_platform_data bfin_spi_flash_data = {152.name = "m25p80",153.parts = bfin_spi_flash_partitions,154.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),155.type = "m25p64",156};157158/* SPI flash chip (m25p64) */159static struct bfin5xx_spi_chip spi_flash_chip_info = {160.enable_dma = 0, /* use dma transfer with this chip*/161.bits_per_word = 8,162};163#endif164165#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)166/* SPI ADC chip */167static struct bfin5xx_spi_chip spi_adc_chip_info = {168.enable_dma = 1, /* use dma transfer with this chip*/169.bits_per_word = 16,170};171#endif172173#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)174static struct bfin5xx_spi_chip ad1836_spi_chip_info = {175.enable_dma = 0,176.bits_per_word = 16,177};178#endif179180/* Notice: for blackfin, the speed_hz is the value of register181* SPI_BAUD, not the real baudrate */182static struct spi_board_info bfin_spi_board_info[] __initdata = {183#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)184{185/* the modalias must be the same as spi device driver name */186.modalias = "m25p80", /* Name of spi_driver for this device */187/* this value is the baudrate divisor */188.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */189.bus_num = 0, /* Framework bus number */190.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/191.platform_data = &bfin_spi_flash_data,192.controller_data = &spi_flash_chip_info,193.mode = SPI_MODE_3,194},195#endif196197#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)198{199.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */200.max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */201.bus_num = 1, /* Framework bus number */202.chip_select = 1, /* Framework chip select. */203.platform_data = NULL, /* No spi_driver specific config */204.controller_data = &spi_adc_chip_info,205},206#endif207208#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)209{210.modalias = "ad183x",211.max_speed_hz = 16,212.bus_num = 1,213.chip_select = 4,214.controller_data = &ad1836_spi_chip_info,215},216#endif217218};219220/* SPI (0) */221static struct resource bfin_spi0_resource[] = {222[0] = {223.start = SPI0_REGBASE,224.end = SPI0_REGBASE + 0xFF,225.flags = IORESOURCE_MEM,226},227[1] = {228.start = CH_SPI,229.end = CH_SPI,230.flags = IORESOURCE_DMA,231},232[2] = {233.start = IRQ_SPI,234.end = IRQ_SPI,235.flags = IORESOURCE_IRQ,236}237};238239240/* SPI controller data */241static struct bfin5xx_spi_master bfin_spi0_info = {242.num_chipselect = 8,243.enable_dma = 1, /* master has the ability to do dma transfer */244.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},245};246247static struct platform_device bfin_spi0_device = {248.name = "bfin-spi",249.id = 0, /* Bus number */250.num_resources = ARRAY_SIZE(bfin_spi0_resource),251.resource = bfin_spi0_resource,252.dev = {253.platform_data = &bfin_spi0_info, /* Passed to driver */254},255};256#endif /* spi master and devices */257258#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)259#ifdef CONFIG_SERIAL_BFIN_UART0260static struct resource bfin_uart0_resources[] = {261{262.start = BFIN_UART_THR,263.end = BFIN_UART_GCTL+2,264.flags = IORESOURCE_MEM,265},266{267.start = IRQ_UART0_RX,268.end = IRQ_UART0_RX + 1,269.flags = IORESOURCE_IRQ,270},271{272.start = IRQ_UART0_ERROR,273.end = IRQ_UART0_ERROR,274.flags = IORESOURCE_IRQ,275},276{277.start = CH_UART0_TX,278.end = CH_UART0_TX,279.flags = IORESOURCE_DMA,280},281{282.start = CH_UART0_RX,283.end = CH_UART0_RX,284.flags = IORESOURCE_DMA,285},286};287288static unsigned short bfin_uart0_peripherals[] = {289P_UART0_TX, P_UART0_RX, 0290};291292static struct platform_device bfin_uart0_device = {293.name = "bfin-uart",294.id = 0,295.num_resources = ARRAY_SIZE(bfin_uart0_resources),296.resource = bfin_uart0_resources,297.dev = {298.platform_data = &bfin_uart0_peripherals, /* Passed to driver */299},300};301#endif302#endif303304#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)305#ifdef CONFIG_BFIN_SIR0306static struct resource bfin_sir0_resources[] = {307{308.start = 0xFFC00400,309.end = 0xFFC004FF,310.flags = IORESOURCE_MEM,311},312{313.start = IRQ_UART0_RX,314.end = IRQ_UART0_RX+1,315.flags = IORESOURCE_IRQ,316},317{318.start = CH_UART0_RX,319.end = CH_UART0_RX+1,320.flags = IORESOURCE_DMA,321},322};323324static struct platform_device bfin_sir0_device = {325.name = "bfin_sir",326.id = 0,327.num_resources = ARRAY_SIZE(bfin_sir0_resources),328.resource = bfin_sir0_resources,329};330#endif331#endif332333#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)334335#include <linux/serial_8250.h>336#include <linux/serial.h>337338/*339* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.340* running at half system clock, both with interrupt output or-ed to PF8. Change to341* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus342*/343344static struct plat_serial8250_port serial8250_platform_data [] = {345{346.membase = (void *)0x20200000,347.mapbase = 0x20200000,348.irq = IRQ_PF8,349.irqflags = IRQF_TRIGGER_HIGH,350.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,351.iotype = UPIO_MEM,352.regshift = 1,353.uartclk = 66666667,354}, {355.membase = (void *)0x20200010,356.mapbase = 0x20200010,357.irq = IRQ_PF8,358.irqflags = IRQF_TRIGGER_HIGH,359.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,360.iotype = UPIO_MEM,361.regshift = 1,362.uartclk = 66666667,363}, {364}365};366367static struct platform_device serial8250_device = {368.id = PLAT8250_DEV_PLATFORM,369.name = "serial8250",370.dev = {371.platform_data = serial8250_platform_data,372},373};374375#endif376377#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)378379/*380* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,381* interrupt output wired to PF9. Change to suit different FPGA configuration382*/383384static struct resource opencores_kbd_resources[] = {385[0] = {386.start = 0x20200030,387.end = 0x20300030 + 2,388.flags = IORESOURCE_MEM,389},390[1] = {391.start = IRQ_PF9,392.end = IRQ_PF9,393.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,394},395};396397static struct platform_device opencores_kbd_device = {398.id = -1,399.name = "opencores-kbd",400.resource = opencores_kbd_resources,401.num_resources = ARRAY_SIZE(opencores_kbd_resources),402};403#endif404405static struct platform_device *h8606_devices[] __initdata = {406#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)407&rtc_device,408#endif409410#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)411&dm9000_device,412#endif413414#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)415&smc91x_device,416#endif417418#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)419&net2272_bfin_device,420#endif421422#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)423&bfin_spi0_device,424#endif425426#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)427#ifdef CONFIG_SERIAL_BFIN_UART0428&bfin_uart0_device,429#endif430#endif431432#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)433&serial8250_device,434#endif435436#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)437#ifdef CONFIG_BFIN_SIR0438&bfin_sir0_device,439#endif440#endif441442#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)443&opencores_kbd_device,444#endif445};446447static int __init H8606_init(void)448{449printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");450printk(KERN_INFO "%s(): registering device resources\n", __func__);451platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));452#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)453spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));454#endif455return 0;456}457458arch_initcall(H8606_init);459460static struct platform_device *H8606_early_devices[] __initdata = {461#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)462#ifdef CONFIG_SERIAL_BFIN_UART0463&bfin_uart0_device,464#endif465#endif466};467468void __init native_machine_early_platform_add_devices(void)469{470printk(KERN_INFO "register early platform devices\n");471early_platform_add_devices(H8606_early_devices,472ARRAY_SIZE(H8606_early_devices));473}474475476