Path: blob/master/arch/blackfin/mach-bf533/boards/cm_bf533.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2008-2009 Bluetechnix3* 2005 National ICT Australia (NICTA)4* Aidan Williams <[email protected]>5*6* Licensed under the GPL-2 or later.7*/89#include <linux/device.h>10#include <linux/platform_device.h>11#include <linux/mtd/mtd.h>12#include <linux/mtd/partitions.h>13#include <linux/mtd/physmap.h>14#include <linux/spi/spi.h>15#include <linux/spi/flash.h>16#include <linux/spi/mmc_spi.h>17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)18#include <linux/usb/isp1362.h>19#endif20#include <linux/irq.h>21#include <asm/dma.h>22#include <asm/bfin5xx_spi.h>23#include <asm/portmux.h>24#include <asm/dpmc.h>2526/*27* Name the Board for the /proc/cpuinfo28*/29const char bfin_board_name[] = "Bluetechnix CM BF533";3031#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)32/* all SPI peripherals info goes here */33#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)34static struct mtd_partition bfin_spi_flash_partitions[] = {35{36.name = "bootloader(spi)",37.size = 0x00020000,38.offset = 0,39.mask_flags = MTD_CAP_ROM40}, {41.name = "linux kernel(spi)",42.size = 0xe0000,43.offset = 0x2000044}, {45.name = "file system(spi)",46.size = 0x700000,47.offset = 0x00100000,48}49};5051static struct flash_platform_data bfin_spi_flash_data = {52.name = "m25p80",53.parts = bfin_spi_flash_partitions,54.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),55.type = "m25p64",56};5758/* SPI flash chip (m25p64) */59static struct bfin5xx_spi_chip spi_flash_chip_info = {60.enable_dma = 0, /* use dma transfer with this chip*/61.bits_per_word = 8,62};63#endif6465/* SPI ADC chip */66#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)67static struct bfin5xx_spi_chip spi_adc_chip_info = {68.enable_dma = 1, /* use dma transfer with this chip*/69.bits_per_word = 16,70};71#endif7273#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)74static struct bfin5xx_spi_chip ad1836_spi_chip_info = {75.enable_dma = 0,76.bits_per_word = 16,77};78#endif7980#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)81static struct bfin5xx_spi_chip mmc_spi_chip_info = {82.enable_dma = 0,83.bits_per_word = 8,84};85#endif8687static struct spi_board_info bfin_spi_board_info[] __initdata = {88#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)89{90/* the modalias must be the same as spi device driver name */91.modalias = "m25p80", /* Name of spi_driver for this device */92.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */93.bus_num = 0, /* Framework bus number */94.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/95.platform_data = &bfin_spi_flash_data,96.controller_data = &spi_flash_chip_info,97.mode = SPI_MODE_3,98},99#endif100101#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)102{103.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */104.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */105.bus_num = 0, /* Framework bus number */106.chip_select = 2, /* Framework chip select. */107.platform_data = NULL, /* No spi_driver specific config */108.controller_data = &spi_adc_chip_info,109},110#endif111112#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)113{114.modalias = "ad183x",115.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */116.bus_num = 0,117.chip_select = 4,118.controller_data = &ad1836_spi_chip_info,119},120#endif121122#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)123{124.modalias = "mmc_spi",125.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */126.bus_num = 0,127.chip_select = 1,128.controller_data = &mmc_spi_chip_info,129.mode = SPI_MODE_3,130},131#endif132};133134/* SPI (0) */135static struct resource bfin_spi0_resource[] = {136[0] = {137.start = SPI0_REGBASE,138.end = SPI0_REGBASE + 0xFF,139.flags = IORESOURCE_MEM,140},141[1] = {142.start = CH_SPI,143.end = CH_SPI,144.flags = IORESOURCE_DMA,145},146[2] = {147.start = IRQ_SPI,148.end = IRQ_SPI,149.flags = IORESOURCE_IRQ,150}151};152153/* SPI controller data */154static struct bfin5xx_spi_master bfin_spi0_info = {155.num_chipselect = 8,156.enable_dma = 1, /* master has the ability to do dma transfer */157.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},158};159160static struct platform_device bfin_spi0_device = {161.name = "bfin-spi",162.id = 0, /* Bus number */163.num_resources = ARRAY_SIZE(bfin_spi0_resource),164.resource = bfin_spi0_resource,165.dev = {166.platform_data = &bfin_spi0_info, /* Passed to driver */167},168};169#endif /* spi master and devices */170171#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)172static struct platform_device rtc_device = {173.name = "rtc-bfin",174.id = -1,175};176#endif177178#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)179#include <linux/smc91x.h>180181static struct smc91x_platdata smc91x_info = {182.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,183.leda = RPC_LED_100_10,184.ledb = RPC_LED_TX_RX,185};186187static struct resource smc91x_resources[] = {188{189.start = 0x20200300,190.end = 0x20200300 + 16,191.flags = IORESOURCE_MEM,192}, {193.start = IRQ_PF0,194.end = IRQ_PF0,195.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,196},197};198static struct platform_device smc91x_device = {199.name = "smc91x",200.id = 0,201.num_resources = ARRAY_SIZE(smc91x_resources),202.resource = smc91x_resources,203.dev = {204.platform_data = &smc91x_info,205},206};207#endif208209#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)210#include <linux/smsc911x.h>211212static struct resource smsc911x_resources[] = {213{214.name = "smsc911x-memory",215.start = 0x20308000,216.end = 0x20308000 + 0xFF,217.flags = IORESOURCE_MEM,218}, {219.start = IRQ_PF8,220.end = IRQ_PF8,221.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,222},223};224225static struct smsc911x_platform_config smsc911x_config = {226.flags = SMSC911X_USE_16BIT,227.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,228.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,229.phy_interface = PHY_INTERFACE_MODE_MII,230};231232static struct platform_device smsc911x_device = {233.name = "smsc911x",234.id = 0,235.num_resources = ARRAY_SIZE(smsc911x_resources),236.resource = smsc911x_resources,237.dev = {238.platform_data = &smsc911x_config,239},240};241#endif242243#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)244#ifdef CONFIG_SERIAL_BFIN_UART0245static struct resource bfin_uart0_resources[] = {246{247.start = BFIN_UART_THR,248.end = BFIN_UART_GCTL+2,249.flags = IORESOURCE_MEM,250},251{252.start = IRQ_UART0_RX,253.end = IRQ_UART0_RX + 1,254.flags = IORESOURCE_IRQ,255},256{257.start = IRQ_UART0_ERROR,258.end = IRQ_UART0_ERROR,259.flags = IORESOURCE_IRQ,260},261{262.start = CH_UART0_TX,263.end = CH_UART0_TX,264.flags = IORESOURCE_DMA,265},266{267.start = CH_UART0_RX,268.end = CH_UART0_RX,269.flags = IORESOURCE_DMA,270},271};272273static unsigned short bfin_uart0_peripherals[] = {274P_UART0_TX, P_UART0_RX, 0275};276277static struct platform_device bfin_uart0_device = {278.name = "bfin-uart",279.id = 0,280.num_resources = ARRAY_SIZE(bfin_uart0_resources),281.resource = bfin_uart0_resources,282.dev = {283.platform_data = &bfin_uart0_peripherals, /* Passed to driver */284},285};286#endif287#endif288289#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)290#ifdef CONFIG_BFIN_SIR0291static struct resource bfin_sir0_resources[] = {292{293.start = 0xFFC00400,294.end = 0xFFC004FF,295.flags = IORESOURCE_MEM,296},297{298.start = IRQ_UART0_RX,299.end = IRQ_UART0_RX+1,300.flags = IORESOURCE_IRQ,301},302{303.start = CH_UART0_RX,304.end = CH_UART0_RX+1,305.flags = IORESOURCE_DMA,306},307};308309static struct platform_device bfin_sir0_device = {310.name = "bfin_sir",311.id = 0,312.num_resources = ARRAY_SIZE(bfin_sir0_resources),313.resource = bfin_sir0_resources,314};315#endif316#endif317318#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)319#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART320static struct resource bfin_sport0_uart_resources[] = {321{322.start = SPORT0_TCR1,323.end = SPORT0_MRCS3+4,324.flags = IORESOURCE_MEM,325},326{327.start = IRQ_SPORT0_RX,328.end = IRQ_SPORT0_RX+1,329.flags = IORESOURCE_IRQ,330},331{332.start = IRQ_SPORT0_ERROR,333.end = IRQ_SPORT0_ERROR,334.flags = IORESOURCE_IRQ,335},336};337338static unsigned short bfin_sport0_peripherals[] = {339P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,340P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0341};342343static struct platform_device bfin_sport0_uart_device = {344.name = "bfin-sport-uart",345.id = 0,346.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),347.resource = bfin_sport0_uart_resources,348.dev = {349.platform_data = &bfin_sport0_peripherals, /* Passed to driver */350},351};352#endif353#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART354static struct resource bfin_sport1_uart_resources[] = {355{356.start = SPORT1_TCR1,357.end = SPORT1_MRCS3+4,358.flags = IORESOURCE_MEM,359},360{361.start = IRQ_SPORT1_RX,362.end = IRQ_SPORT1_RX+1,363.flags = IORESOURCE_IRQ,364},365{366.start = IRQ_SPORT1_ERROR,367.end = IRQ_SPORT1_ERROR,368.flags = IORESOURCE_IRQ,369},370};371372static unsigned short bfin_sport1_peripherals[] = {373P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,374P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0375};376377static struct platform_device bfin_sport1_uart_device = {378.name = "bfin-sport-uart",379.id = 1,380.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),381.resource = bfin_sport1_uart_resources,382.dev = {383.platform_data = &bfin_sport1_peripherals, /* Passed to driver */384},385};386#endif387#endif388389#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)390static struct resource isp1362_hcd_resources[] = {391{392.start = 0x20308000,393.end = 0x20308000,394.flags = IORESOURCE_MEM,395}, {396.start = 0x20308004,397.end = 0x20308004,398.flags = IORESOURCE_MEM,399}, {400.start = IRQ_PF4,401.end = IRQ_PF4,402.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,403},404};405406static struct isp1362_platform_data isp1362_priv = {407.sel15Kres = 1,408.clknotstop = 0,409.oc_enable = 0,410.int_act_high = 0,411.int_edge_triggered = 0,412.remote_wakeup_connected = 0,413.no_power_switching = 1,414.power_switching_mode = 0,415};416417static struct platform_device isp1362_hcd_device = {418.name = "isp1362-hcd",419.id = 0,420.dev = {421.platform_data = &isp1362_priv,422},423.num_resources = ARRAY_SIZE(isp1362_hcd_resources),424.resource = isp1362_hcd_resources,425};426#endif427428429#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)430static struct resource net2272_bfin_resources[] = {431{432.start = 0x20300000,433.end = 0x20300000 + 0x100,434.flags = IORESOURCE_MEM,435}, {436.start = IRQ_PF6,437.end = IRQ_PF6,438.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,439},440};441442static struct platform_device net2272_bfin_device = {443.name = "net2272",444.id = -1,445.num_resources = ARRAY_SIZE(net2272_bfin_resources),446.resource = net2272_bfin_resources,447};448#endif449450451452#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)453static struct mtd_partition para_partitions[] = {454{455.name = "bootloader(nor)",456.size = 0x40000,457.offset = 0,458}, {459.name = "linux+rootfs(nor)",460.size = MTDPART_SIZ_FULL,461.offset = MTDPART_OFS_APPEND,462},463};464465static struct physmap_flash_data para_flash_data = {466.width = 2,467.parts = para_partitions,468.nr_parts = ARRAY_SIZE(para_partitions),469};470471static struct resource para_flash_resource = {472.start = 0x20000000,473.end = 0x201fffff,474.flags = IORESOURCE_MEM,475};476477static struct platform_device para_flash_device = {478.name = "physmap-flash",479.id = 0,480.dev = {481.platform_data = ¶_flash_data,482},483.num_resources = 1,484.resource = ¶_flash_resource,485};486#endif487488489490static const unsigned int cclk_vlev_datasheet[] =491{492VRPAIR(VLEV_085, 250000000),493VRPAIR(VLEV_090, 376000000),494VRPAIR(VLEV_095, 426000000),495VRPAIR(VLEV_100, 426000000),496VRPAIR(VLEV_105, 476000000),497VRPAIR(VLEV_110, 476000000),498VRPAIR(VLEV_115, 476000000),499VRPAIR(VLEV_120, 600000000),500VRPAIR(VLEV_125, 600000000),501VRPAIR(VLEV_130, 600000000),502};503504static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {505.tuple_tab = cclk_vlev_datasheet,506.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),507.vr_settling_time = 25 /* us */,508};509510static struct platform_device bfin_dpmc = {511.name = "bfin dpmc",512.dev = {513.platform_data = &bfin_dmpc_vreg_data,514},515};516517static struct platform_device *cm_bf533_devices[] __initdata = {518519&bfin_dpmc,520521#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)522#ifdef CONFIG_SERIAL_BFIN_UART0523&bfin_uart0_device,524#endif525#endif526527#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)528#ifdef CONFIG_BFIN_SIR0529&bfin_sir0_device,530#endif531#endif532533#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)534#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART535&bfin_sport0_uart_device,536#endif537#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART538&bfin_sport1_uart_device,539#endif540#endif541542#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)543&rtc_device,544#endif545546#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)547&isp1362_hcd_device,548#endif549550#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)551&smc91x_device,552#endif553554#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)555&smsc911x_device,556#endif557558#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)559&net2272_bfin_device,560#endif561562#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)563&bfin_spi0_device,564#endif565566#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)567¶_flash_device,568#endif569};570571static int __init cm_bf533_init(void)572{573printk(KERN_INFO "%s(): registering device resources\n", __func__);574platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));575#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)576spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));577#endif578return 0;579}580581arch_initcall(cm_bf533_init);582583static struct platform_device *cm_bf533_early_devices[] __initdata = {584#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)585#ifdef CONFIG_SERIAL_BFIN_UART0586&bfin_uart0_device,587#endif588#endif589590#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)591#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART592&bfin_sport0_uart_device,593#endif594#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART595&bfin_sport1_uart_device,596#endif597#endif598};599600void __init native_machine_early_platform_add_devices(void)601{602printk(KERN_INFO "register early platform devices\n");603early_platform_add_devices(cm_bf533_early_devices,604ARRAY_SIZE(cm_bf533_early_devices));605}606607608