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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/blackfin/mach-bf533/include/mach/bf533.h
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/*

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 * SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561

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 *

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 * Copyright 2005-2008 Analog Devices Inc.

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 *

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 * Licensed under the GPL-2 or later.

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 */

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#ifndef __MACH_BF533_H__

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#define __MACH_BF533_H__

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#define OFFSET_(x) ((x) & 0x0000FFFF)

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/*some misc defines*/

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#define IMASK_IVG15		0x8000

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#define IMASK_IVG14		0x4000

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#define IMASK_IVG13		0x2000

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#define IMASK_IVG12		0x1000

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#define IMASK_IVG11		0x0800

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#define IMASK_IVG10		0x0400

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#define IMASK_IVG9		0x0200

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#define IMASK_IVG8		0x0100

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#define IMASK_IVG7		0x0080

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#define IMASK_IVGTMR		0x0040

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#define IMASK_IVGHW		0x0020

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/***************************/

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#define BFIN_DSUBBANKS	4

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#define BFIN_DWAYS		2

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#define BFIN_DLINES		64

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#define BFIN_ISUBBANKS	4

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#define BFIN_IWAYS		4

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#define BFIN_ILINES		32

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#define WAY0_L			0x1

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#define WAY1_L			0x2

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#define WAY01_L			0x3

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#define WAY2_L			0x4

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#define WAY02_L			0x5

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#define	WAY12_L			0x6

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#define	WAY012_L		0x7

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#define	WAY3_L			0x8

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#define	WAY03_L			0x9

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#define	WAY13_L			0xA

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#define	WAY013_L		0xB

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#define	WAY32_L			0xC

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#define	WAY320_L		0xD

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#define	WAY321_L		0xE

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#define	WAYALL_L		0xF

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#define DMC_ENABLE (2<<2)	/*yes, 2, not 1 */

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/* IAR0 BIT FIELDS*/

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#define RTC_ERROR_BIT			0x0FFFFFFF

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#define UART_ERROR_BIT			0xF0FFFFFF

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#define SPORT1_ERROR_BIT		0xFF0FFFFF

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#define SPI_ERROR_BIT			0xFFF0FFFF

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#define SPORT0_ERROR_BIT		0xFFFF0FFF

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#define PPI_ERROR_BIT			0xFFFFF0FF

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#define DMA_ERROR_BIT			0xFFFFFF0F

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#define PLLWAKE_ERROR_BIT		0xFFFFFFFF

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/* IAR1 BIT FIELDS*/

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#define DMA7_UARTTX_BIT			0x0FFFFFFF

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#define DMA6_UARTRX_BIT			0xF0FFFFFF

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#define DMA5_SPI_BIT			0xFF0FFFFF

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#define DMA4_SPORT1TX_BIT		0xFFF0FFFF

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#define DMA3_SPORT1RX_BIT		0xFFFF0FFF

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#define DMA2_SPORT0TX_BIT		0xFFFFF0FF

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#define DMA1_SPORT0RX_BIT		0xFFFFFF0F

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#define DMA0_PPI_BIT			0xFFFFFFFF

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/* IAR2 BIT FIELDS*/

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#define WDTIMER_BIT			0x0FFFFFFF

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#define MEMDMA1_BIT			0xF0FFFFFF

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#define MEMDMA0_BIT			0xFF0FFFFF

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#define PFB_BIT				0xFFF0FFFF

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#define PFA_BIT				0xFFFF0FFF

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#define TIMER2_BIT			0xFFFFF0FF

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#define TIMER1_BIT			0xFFFFFF0F

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#define TIMER0_BIT		        0xFFFFFFFF

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/********************************* EBIU Settings ************************************/

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#define AMBCTL0VAL	((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)

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#define AMBCTL1VAL	((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)

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#ifdef CONFIG_C_AMBEN_ALL

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#define V_AMBEN AMBEN_ALL

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#endif

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#ifdef CONFIG_C_AMBEN

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#define V_AMBEN 0x0

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#endif

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#ifdef CONFIG_C_AMBEN_B0

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#define V_AMBEN AMBEN_B0

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#endif

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#ifdef CONFIG_C_AMBEN_B0_B1

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#define V_AMBEN AMBEN_B0_B1

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#endif

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#ifdef CONFIG_C_AMBEN_B0_B1_B2

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#define V_AMBEN AMBEN_B0_B1_B2

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#endif

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#ifdef CONFIG_C_AMCKEN

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#define V_AMCKEN AMCKEN

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#else

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#define V_AMCKEN 0x0

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#endif

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#ifdef CONFIG_C_CDPRIO

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#define V_CDPRIO 0x100

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#else

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#define V_CDPRIO 0x0

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#endif

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#define AMGCTLVAL	(V_AMBEN | V_AMCKEN | V_CDPRIO)

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#ifdef CONFIG_BF533

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#define CPU "BF533"

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#define CPUID 0x27a5

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#endif

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#ifdef CONFIG_BF532

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#define CPU "BF532"

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#define CPUID 0x27a5

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#endif

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#ifdef CONFIG_BF531

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#define CPU "BF531"

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#define CPUID 0x27a5

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#endif

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#ifndef CPU

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#error "Unknown CPU type - This kernel doesn't seem to be configured properly"

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#endif

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#endif				/* __MACH_BF533_H__  */

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