Path: blob/master/arch/blackfin/mach-bf537/boards/cm_bf537e.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2008-2009 Bluetechnix3* 2005 National ICT Australia (NICTA)4* Aidan Williams <[email protected]>5*6* Licensed under the GPL-2 or later.7*/89#include <linux/device.h>10#include <linux/etherdevice.h>11#include <linux/platform_device.h>12#include <linux/mtd/mtd.h>13#include <linux/mtd/partitions.h>14#include <linux/mtd/physmap.h>15#include <linux/spi/spi.h>16#include <linux/spi/flash.h>17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)18#include <linux/usb/isp1362.h>19#endif20#include <linux/ata_platform.h>21#include <linux/irq.h>22#include <asm/dma.h>23#include <asm/bfin5xx_spi.h>24#include <asm/portmux.h>25#include <asm/dpmc.h>2627/*28* Name the Board for the /proc/cpuinfo29*/30const char bfin_board_name[] = "Bluetechnix CM BF537E";3132#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)33/* all SPI peripherals info goes here */3435#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)36static struct mtd_partition bfin_spi_flash_partitions[] = {37{38.name = "bootloader(spi)",39.size = 0x00020000,40.offset = 0,41.mask_flags = MTD_CAP_ROM42}, {43.name = "linux kernel(spi)",44.size = 0xe0000,45.offset = 0x2000046}, {47.name = "file system(spi)",48.size = 0x700000,49.offset = 0x00100000,50}51};5253static struct flash_platform_data bfin_spi_flash_data = {54.name = "m25p80",55.parts = bfin_spi_flash_partitions,56.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),57.type = "m25p64",58};5960/* SPI flash chip (m25p64) */61static struct bfin5xx_spi_chip spi_flash_chip_info = {62.enable_dma = 0, /* use dma transfer with this chip*/63.bits_per_word = 8,64};65#endif6667#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)68/* SPI ADC chip */69static struct bfin5xx_spi_chip spi_adc_chip_info = {70.enable_dma = 1, /* use dma transfer with this chip*/71.bits_per_word = 16,72};73#endif7475#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)76static struct bfin5xx_spi_chip ad1836_spi_chip_info = {77.enable_dma = 0,78.bits_per_word = 16,79};80#endif8182#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)83static struct bfin5xx_spi_chip mmc_spi_chip_info = {84.enable_dma = 0,85.bits_per_word = 8,86};87#endif8889static struct spi_board_info bfin_spi_board_info[] __initdata = {90#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)91{92/* the modalias must be the same as spi device driver name */93.modalias = "m25p80", /* Name of spi_driver for this device */94.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */95.bus_num = 0, /* Framework bus number */96.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/97.platform_data = &bfin_spi_flash_data,98.controller_data = &spi_flash_chip_info,99.mode = SPI_MODE_3,100},101#endif102103#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)104{105.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */106.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */107.bus_num = 0, /* Framework bus number */108.chip_select = 1, /* Framework chip select. */109.platform_data = NULL, /* No spi_driver specific config */110.controller_data = &spi_adc_chip_info,111},112#endif113114#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)115{116.modalias = "ad183x",117.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */118.bus_num = 0,119.chip_select = 4,120.controller_data = &ad1836_spi_chip_info,121},122#endif123124#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)125{126.modalias = "mmc_spi",127.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */128.bus_num = 0,129.chip_select = 1,130.controller_data = &mmc_spi_chip_info,131.mode = SPI_MODE_3,132},133#endif134};135136/* SPI (0) */137static struct resource bfin_spi0_resource[] = {138[0] = {139.start = SPI0_REGBASE,140.end = SPI0_REGBASE + 0xFF,141.flags = IORESOURCE_MEM,142},143[1] = {144.start = CH_SPI,145.end = CH_SPI,146.flags = IORESOURCE_DMA,147},148[2] = {149.start = IRQ_SPI,150.end = IRQ_SPI,151.flags = IORESOURCE_IRQ,152},153};154155/* SPI controller data */156static struct bfin5xx_spi_master bfin_spi0_info = {157.num_chipselect = 8,158.enable_dma = 1, /* master has the ability to do dma transfer */159.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},160};161162static struct platform_device bfin_spi0_device = {163.name = "bfin-spi",164.id = 0, /* Bus number */165.num_resources = ARRAY_SIZE(bfin_spi0_resource),166.resource = bfin_spi0_resource,167.dev = {168.platform_data = &bfin_spi0_info, /* Passed to driver */169},170};171#endif /* spi master and devices */172173#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)174static struct platform_device rtc_device = {175.name = "rtc-bfin",176.id = -1,177};178#endif179180#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)181static struct platform_device hitachi_fb_device = {182.name = "hitachi-tx09",183};184#endif185186#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)187#include <linux/smc91x.h>188189static struct smc91x_platdata smc91x_info = {190.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,191.leda = RPC_LED_100_10,192.ledb = RPC_LED_TX_RX,193};194195static struct resource smc91x_resources[] = {196{197.start = 0x20200300,198.end = 0x20200300 + 16,199.flags = IORESOURCE_MEM,200}, {201.start = IRQ_PF14,202.end = IRQ_PF14,203.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,204},205};206207static struct platform_device smc91x_device = {208.name = "smc91x",209.id = 0,210.num_resources = ARRAY_SIZE(smc91x_resources),211.resource = smc91x_resources,212.dev = {213.platform_data = &smc91x_info,214},215};216#endif217218#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)219static struct resource isp1362_hcd_resources[] = {220{221.start = 0x20308000,222.end = 0x20308000,223.flags = IORESOURCE_MEM,224}, {225.start = 0x20308004,226.end = 0x20308004,227.flags = IORESOURCE_MEM,228}, {229.start = IRQ_PG15,230.end = IRQ_PG15,231.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,232},233};234235static struct isp1362_platform_data isp1362_priv = {236.sel15Kres = 1,237.clknotstop = 0,238.oc_enable = 0,239.int_act_high = 0,240.int_edge_triggered = 0,241.remote_wakeup_connected = 0,242.no_power_switching = 1,243.power_switching_mode = 0,244};245246static struct platform_device isp1362_hcd_device = {247.name = "isp1362-hcd",248.id = 0,249.dev = {250.platform_data = &isp1362_priv,251},252.num_resources = ARRAY_SIZE(isp1362_hcd_resources),253.resource = isp1362_hcd_resources,254};255#endif256257#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)258static struct resource net2272_bfin_resources[] = {259{260.start = 0x20300000,261.end = 0x20300000 + 0x100,262.flags = IORESOURCE_MEM,263}, {264.start = IRQ_PG13,265.end = IRQ_PG13,266.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,267},268};269270static struct platform_device net2272_bfin_device = {271.name = "net2272",272.id = -1,273.num_resources = ARRAY_SIZE(net2272_bfin_resources),274.resource = net2272_bfin_resources,275};276#endif277278#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)279static struct mtd_partition cm_partitions[] = {280{281.name = "bootloader(nor)",282.size = 0x40000,283.offset = 0,284}, {285.name = "linux kernel(nor)",286.size = 0x100000,287.offset = MTDPART_OFS_APPEND,288}, {289.name = "file system(nor)",290.size = MTDPART_SIZ_FULL,291.offset = MTDPART_OFS_APPEND,292}293};294295static struct physmap_flash_data cm_flash_data = {296.width = 2,297.parts = cm_partitions,298.nr_parts = ARRAY_SIZE(cm_partitions),299};300301static unsigned cm_flash_gpios[] = { GPIO_PF4 };302303static struct resource cm_flash_resource[] = {304{305.name = "cfi_probe",306.start = 0x20000000,307.end = 0x201fffff,308.flags = IORESOURCE_MEM,309}, {310.start = (unsigned long)cm_flash_gpios,311.end = ARRAY_SIZE(cm_flash_gpios),312.flags = IORESOURCE_IRQ,313}314};315316static struct platform_device cm_flash_device = {317.name = "gpio-addr-flash",318.id = 0,319.dev = {320.platform_data = &cm_flash_data,321},322.num_resources = ARRAY_SIZE(cm_flash_resource),323.resource = cm_flash_resource,324};325#endif326327#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)328#ifdef CONFIG_SERIAL_BFIN_UART0329static struct resource bfin_uart0_resources[] = {330{331.start = UART0_THR,332.end = UART0_GCTL+2,333.flags = IORESOURCE_MEM,334},335{336.start = IRQ_UART0_RX,337.end = IRQ_UART0_RX+1,338.flags = IORESOURCE_IRQ,339},340{341.start = IRQ_UART0_ERROR,342.end = IRQ_UART0_ERROR,343.flags = IORESOURCE_IRQ,344},345{346.start = CH_UART0_TX,347.end = CH_UART0_TX,348.flags = IORESOURCE_DMA,349},350{351.start = CH_UART0_RX,352.end = CH_UART0_RX,353.flags = IORESOURCE_DMA,354},355#ifdef CONFIG_BFIN_UART0_CTSRTS356{357/*358* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.359*/360.start = -1,361.end = -1,362.flags = IORESOURCE_IO,363},364{365/*366* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.367*/368.start = -1,369.end = -1,370.flags = IORESOURCE_IO,371},372#endif373};374375static unsigned short bfin_uart0_peripherals[] = {376P_UART0_TX, P_UART0_RX, 0377};378379static struct platform_device bfin_uart0_device = {380.name = "bfin-uart",381.id = 0,382.num_resources = ARRAY_SIZE(bfin_uart0_resources),383.resource = bfin_uart0_resources,384.dev = {385.platform_data = &bfin_uart0_peripherals, /* Passed to driver */386},387};388#endif389#ifdef CONFIG_SERIAL_BFIN_UART1390static struct resource bfin_uart1_resources[] = {391{392.start = UART1_THR,393.end = UART1_GCTL+2,394.flags = IORESOURCE_MEM,395},396{397.start = IRQ_UART1_RX,398.end = IRQ_UART1_RX+1,399.flags = IORESOURCE_IRQ,400},401{402.start = IRQ_UART1_ERROR,403.end = IRQ_UART1_ERROR,404.flags = IORESOURCE_IRQ,405},406{407.start = CH_UART1_TX,408.end = CH_UART1_TX,409.flags = IORESOURCE_DMA,410},411{412.start = CH_UART1_RX,413.end = CH_UART1_RX,414.flags = IORESOURCE_DMA,415},416#ifdef CONFIG_BFIN_UART1_CTSRTS417{418/*419* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.420*/421.start = -1,422.end = -1,423.flags = IORESOURCE_IO,424},425{426/*427* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.428*/429.start = -1,430.end = -1,431.flags = IORESOURCE_IO,432},433#endif434};435436static unsigned short bfin_uart1_peripherals[] = {437P_UART1_TX, P_UART1_RX, 0438};439440static struct platform_device bfin_uart1_device = {441.name = "bfin-uart",442.id = 1,443.num_resources = ARRAY_SIZE(bfin_uart1_resources),444.resource = bfin_uart1_resources,445.dev = {446.platform_data = &bfin_uart1_peripherals, /* Passed to driver */447},448};449#endif450#endif451452#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)453#ifdef CONFIG_BFIN_SIR0454static struct resource bfin_sir0_resources[] = {455{456.start = 0xFFC00400,457.end = 0xFFC004FF,458.flags = IORESOURCE_MEM,459},460{461.start = IRQ_UART0_RX,462.end = IRQ_UART0_RX+1,463.flags = IORESOURCE_IRQ,464},465{466.start = CH_UART0_RX,467.end = CH_UART0_RX+1,468.flags = IORESOURCE_DMA,469},470};471static struct platform_device bfin_sir0_device = {472.name = "bfin_sir",473.id = 0,474.num_resources = ARRAY_SIZE(bfin_sir0_resources),475.resource = bfin_sir0_resources,476};477#endif478#ifdef CONFIG_BFIN_SIR1479static struct resource bfin_sir1_resources[] = {480{481.start = 0xFFC02000,482.end = 0xFFC020FF,483.flags = IORESOURCE_MEM,484},485{486.start = IRQ_UART1_RX,487.end = IRQ_UART1_RX+1,488.flags = IORESOURCE_IRQ,489},490{491.start = CH_UART1_RX,492.end = CH_UART1_RX+1,493.flags = IORESOURCE_DMA,494},495};496static struct platform_device bfin_sir1_device = {497.name = "bfin_sir",498.id = 1,499.num_resources = ARRAY_SIZE(bfin_sir1_resources),500.resource = bfin_sir1_resources,501};502#endif503#endif504505#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)506static struct resource bfin_twi0_resource[] = {507[0] = {508.start = TWI0_REGBASE,509.end = TWI0_REGBASE,510.flags = IORESOURCE_MEM,511},512[1] = {513.start = IRQ_TWI,514.end = IRQ_TWI,515.flags = IORESOURCE_IRQ,516},517};518519static struct platform_device i2c_bfin_twi_device = {520.name = "i2c-bfin-twi",521.id = 0,522.num_resources = ARRAY_SIZE(bfin_twi0_resource),523.resource = bfin_twi0_resource,524};525#endif526527#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)528#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART529static struct resource bfin_sport0_uart_resources[] = {530{531.start = SPORT0_TCR1,532.end = SPORT0_MRCS3+4,533.flags = IORESOURCE_MEM,534},535{536.start = IRQ_SPORT0_RX,537.end = IRQ_SPORT0_RX+1,538.flags = IORESOURCE_IRQ,539},540{541.start = IRQ_SPORT0_ERROR,542.end = IRQ_SPORT0_ERROR,543.flags = IORESOURCE_IRQ,544},545};546547static unsigned short bfin_sport0_peripherals[] = {548P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,549P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0550};551552static struct platform_device bfin_sport0_uart_device = {553.name = "bfin-sport-uart",554.id = 0,555.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),556.resource = bfin_sport0_uart_resources,557.dev = {558.platform_data = &bfin_sport0_peripherals, /* Passed to driver */559},560};561#endif562#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART563static struct resource bfin_sport1_uart_resources[] = {564{565.start = SPORT1_TCR1,566.end = SPORT1_MRCS3+4,567.flags = IORESOURCE_MEM,568},569{570.start = IRQ_SPORT1_RX,571.end = IRQ_SPORT1_RX+1,572.flags = IORESOURCE_IRQ,573},574{575.start = IRQ_SPORT1_ERROR,576.end = IRQ_SPORT1_ERROR,577.flags = IORESOURCE_IRQ,578},579};580581static unsigned short bfin_sport1_peripherals[] = {582P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,583P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0584};585586static struct platform_device bfin_sport1_uart_device = {587.name = "bfin-sport-uart",588.id = 1,589.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),590.resource = bfin_sport1_uart_resources,591.dev = {592.platform_data = &bfin_sport1_peripherals, /* Passed to driver */593},594};595#endif596#endif597598#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)599#include <linux/bfin_mac.h>600static const unsigned short bfin_mac_peripherals[] = P_MII0;601602static struct bfin_phydev_platform_data bfin_phydev_data[] = {603{604.addr = 1,605.irq = IRQ_MAC_PHYINT,606},607};608609static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {610.phydev_number = 1,611.phydev_data = bfin_phydev_data,612.phy_mode = PHY_INTERFACE_MODE_MII,613.mac_peripherals = bfin_mac_peripherals,614};615616static struct platform_device bfin_mii_bus = {617.name = "bfin_mii_bus",618.dev = {619.platform_data = &bfin_mii_bus_data,620}621};622623static struct platform_device bfin_mac_device = {624.name = "bfin_mac",625.dev = {626.platform_data = &bfin_mii_bus,627}628};629#endif630631#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)632#define PATA_INT IRQ_PF14633634static struct pata_platform_info bfin_pata_platform_data = {635.ioport_shift = 2,636.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,637};638639static struct resource bfin_pata_resources[] = {640{641.start = 0x2030C000,642.end = 0x2030C01F,643.flags = IORESOURCE_MEM,644},645{646.start = 0x2030D018,647.end = 0x2030D01B,648.flags = IORESOURCE_MEM,649},650{651.start = PATA_INT,652.end = PATA_INT,653.flags = IORESOURCE_IRQ,654},655};656657static struct platform_device bfin_pata_device = {658.name = "pata_platform",659.id = -1,660.num_resources = ARRAY_SIZE(bfin_pata_resources),661.resource = bfin_pata_resources,662.dev = {663.platform_data = &bfin_pata_platform_data,664}665};666#endif667668static const unsigned int cclk_vlev_datasheet[] =669{670VRPAIR(VLEV_085, 250000000),671VRPAIR(VLEV_090, 376000000),672VRPAIR(VLEV_095, 426000000),673VRPAIR(VLEV_100, 426000000),674VRPAIR(VLEV_105, 476000000),675VRPAIR(VLEV_110, 476000000),676VRPAIR(VLEV_115, 476000000),677VRPAIR(VLEV_120, 500000000),678VRPAIR(VLEV_125, 533000000),679VRPAIR(VLEV_130, 600000000),680};681682static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {683.tuple_tab = cclk_vlev_datasheet,684.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),685.vr_settling_time = 25 /* us */,686};687688static struct platform_device bfin_dpmc = {689.name = "bfin dpmc",690.dev = {691.platform_data = &bfin_dmpc_vreg_data,692},693};694695static struct platform_device *cm_bf537e_devices[] __initdata = {696697&bfin_dpmc,698699#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)700&hitachi_fb_device,701#endif702703#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)704&rtc_device,705#endif706707#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)708#ifdef CONFIG_SERIAL_BFIN_UART0709&bfin_uart0_device,710#endif711#ifdef CONFIG_SERIAL_BFIN_UART1712&bfin_uart1_device,713#endif714#endif715716#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)717#ifdef CONFIG_BFIN_SIR0718&bfin_sir0_device,719#endif720#ifdef CONFIG_BFIN_SIR1721&bfin_sir1_device,722#endif723#endif724725#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)726&i2c_bfin_twi_device,727#endif728729#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)730#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART731&bfin_sport0_uart_device,732#endif733#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART734&bfin_sport1_uart_device,735#endif736#endif737738#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)739&isp1362_hcd_device,740#endif741742#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)743&smc91x_device,744#endif745746#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)747&bfin_mii_bus,748&bfin_mac_device,749#endif750751#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)752&net2272_bfin_device,753#endif754755#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)756&bfin_spi0_device,757#endif758759#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)760&bfin_pata_device,761#endif762763#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)764&cm_flash_device,765#endif766};767768static int __init cm_bf537e_init(void)769{770printk(KERN_INFO "%s(): registering device resources\n", __func__);771platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));772#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)773spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));774#endif775776#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)777irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);778#endif779return 0;780}781782arch_initcall(cm_bf537e_init);783784static struct platform_device *cm_bf537e_early_devices[] __initdata = {785#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)786#ifdef CONFIG_SERIAL_BFIN_UART0787&bfin_uart0_device,788#endif789#ifdef CONFIG_SERIAL_BFIN_UART1790&bfin_uart1_device,791#endif792#endif793794#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)795#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART796&bfin_sport0_uart_device,797#endif798#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART799&bfin_sport1_uart_device,800#endif801#endif802};803804void __init native_machine_early_platform_add_devices(void)805{806printk(KERN_INFO "register early platform devices\n");807early_platform_add_devices(cm_bf537e_early_devices,808ARRAY_SIZE(cm_bf537e_early_devices));809}810811void bfin_get_ether_addr(char *addr)812{813random_ether_addr(addr);814printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);815}816EXPORT_SYMBOL(bfin_get_ether_addr);817818819