Path: blob/master/arch/blackfin/mach-bf537/boards/stamp.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2005 National ICT Australia (NICTA)3* Aidan Williams <[email protected]>4*5* Licensed under the GPL-2 or later.6*/78#include <linux/device.h>9#include <linux/kernel.h>10#include <linux/platform_device.h>11#include <linux/io.h>12#include <linux/mtd/mtd.h>13#include <linux/mtd/nand.h>14#include <linux/mtd/partitions.h>15#include <linux/mtd/plat-ram.h>16#include <linux/mtd/physmap.h>17#include <linux/spi/spi.h>18#include <linux/spi/flash.h>19#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)20#include <linux/usb/isp1362.h>21#endif22#include <linux/i2c.h>23#include <linux/i2c/adp5588.h>24#include <linux/etherdevice.h>25#include <linux/ata_platform.h>26#include <linux/irq.h>27#include <linux/interrupt.h>28#include <linux/usb/sl811.h>29#include <linux/spi/mmc_spi.h>30#include <linux/leds.h>31#include <linux/input.h>32#include <asm/dma.h>33#include <asm/bfin5xx_spi.h>34#include <asm/reboot.h>35#include <asm/portmux.h>36#include <asm/dpmc.h>37#include <asm/bfin_sport.h>38#ifdef CONFIG_REGULATOR_FIXED_VOLTAGE39#include <linux/regulator/fixed.h>40#endif41#include <linux/regulator/machine.h>42#include <linux/regulator/consumer.h>43#include <linux/regulator/userspace-consumer.h>4445/*46* Name the Board for the /proc/cpuinfo47*/48const char bfin_board_name[] = "ADI BF537-STAMP";4950/*51* Driver needs to know address, irq and flag pin.52*/5354#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)55#include <linux/usb/isp1760.h>56static struct resource bfin_isp1760_resources[] = {57[0] = {58.start = 0x203C0000,59.end = 0x203C0000 + 0x000fffff,60.flags = IORESOURCE_MEM,61},62[1] = {63.start = IRQ_PF7,64.end = IRQ_PF7,65.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,66},67};6869static struct isp1760_platform_data isp1760_priv = {70.is_isp1761 = 0,71.bus_width_16 = 1,72.port1_otg = 0,73.analog_oc = 0,74.dack_polarity_high = 0,75.dreq_polarity_high = 0,76};7778static struct platform_device bfin_isp1760_device = {79.name = "isp1760",80.id = 0,81.dev = {82.platform_data = &isp1760_priv,83},84.num_resources = ARRAY_SIZE(bfin_isp1760_resources),85.resource = bfin_isp1760_resources,86};87#endif8889#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)90#include <linux/gpio_keys.h>9192static struct gpio_keys_button bfin_gpio_keys_table[] = {93{BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},94{BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},95{BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},96{BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},97};9899static struct gpio_keys_platform_data bfin_gpio_keys_data = {100.buttons = bfin_gpio_keys_table,101.nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),102};103104static struct platform_device bfin_device_gpiokeys = {105.name = "gpio-keys",106.dev = {107.platform_data = &bfin_gpio_keys_data,108},109};110#endif111112#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)113static struct resource bfin_pcmcia_cf_resources[] = {114{115.start = 0x20310000, /* IO PORT */116.end = 0x20312000,117.flags = IORESOURCE_MEM,118}, {119.start = 0x20311000, /* Attribute Memory */120.end = 0x20311FFF,121.flags = IORESOURCE_MEM,122}, {123.start = IRQ_PF4,124.end = IRQ_PF4,125.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,126}, {127.start = 6, /* Card Detect PF6 */128.end = 6,129.flags = IORESOURCE_IRQ,130},131};132133static struct platform_device bfin_pcmcia_cf_device = {134.name = "bfin_cf_pcmcia",135.id = -1,136.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),137.resource = bfin_pcmcia_cf_resources,138};139#endif140141#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)142static struct platform_device rtc_device = {143.name = "rtc-bfin",144.id = -1,145};146#endif147148#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)149#include <linux/smc91x.h>150151static struct smc91x_platdata smc91x_info = {152.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,153.leda = RPC_LED_100_10,154.ledb = RPC_LED_TX_RX,155};156157static struct resource smc91x_resources[] = {158{159.name = "smc91x-regs",160.start = 0x20300300,161.end = 0x20300300 + 16,162.flags = IORESOURCE_MEM,163}, {164165.start = IRQ_PF7,166.end = IRQ_PF7,167.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,168},169};170static struct platform_device smc91x_device = {171.name = "smc91x",172.id = 0,173.num_resources = ARRAY_SIZE(smc91x_resources),174.resource = smc91x_resources,175.dev = {176.platform_data = &smc91x_info,177},178};179#endif180181#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)182static struct resource dm9000_resources[] = {183[0] = {184.start = 0x203FB800,185.end = 0x203FB800 + 1,186.flags = IORESOURCE_MEM,187},188[1] = {189.start = 0x203FB804,190.end = 0x203FB804 + 1,191.flags = IORESOURCE_MEM,192},193[2] = {194.start = IRQ_PF9,195.end = IRQ_PF9,196.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),197},198};199200static struct platform_device dm9000_device = {201.name = "dm9000",202.id = -1,203.num_resources = ARRAY_SIZE(dm9000_resources),204.resource = dm9000_resources,205};206#endif207208#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)209static struct resource sl811_hcd_resources[] = {210{211.start = 0x20340000,212.end = 0x20340000,213.flags = IORESOURCE_MEM,214}, {215.start = 0x20340004,216.end = 0x20340004,217.flags = IORESOURCE_MEM,218}, {219.start = IRQ_PF4,220.end = IRQ_PF4,221.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,222},223};224225#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)226void sl811_port_power(struct device *dev, int is_on)227{228gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");229gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);230}231#endif232233static struct sl811_platform_data sl811_priv = {234.potpg = 10,235.power = 250, /* == 500mA */236#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)237.port_power = &sl811_port_power,238#endif239};240241static struct platform_device sl811_hcd_device = {242.name = "sl811-hcd",243.id = 0,244.dev = {245.platform_data = &sl811_priv,246},247.num_resources = ARRAY_SIZE(sl811_hcd_resources),248.resource = sl811_hcd_resources,249};250#endif251252#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)253static struct resource isp1362_hcd_resources[] = {254{255.start = 0x20360000,256.end = 0x20360000,257.flags = IORESOURCE_MEM,258}, {259.start = 0x20360004,260.end = 0x20360004,261.flags = IORESOURCE_MEM,262}, {263.start = IRQ_PF3,264.end = IRQ_PF3,265.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,266},267};268269static struct isp1362_platform_data isp1362_priv = {270.sel15Kres = 1,271.clknotstop = 0,272.oc_enable = 0,273.int_act_high = 0,274.int_edge_triggered = 0,275.remote_wakeup_connected = 0,276.no_power_switching = 1,277.power_switching_mode = 0,278};279280static struct platform_device isp1362_hcd_device = {281.name = "isp1362-hcd",282.id = 0,283.dev = {284.platform_data = &isp1362_priv,285},286.num_resources = ARRAY_SIZE(isp1362_hcd_resources),287.resource = isp1362_hcd_resources,288};289#endif290291#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)292static unsigned short bfin_can_peripherals[] = {293P_CAN0_RX, P_CAN0_TX, 0294};295296static struct resource bfin_can_resources[] = {297{298.start = 0xFFC02A00,299.end = 0xFFC02FFF,300.flags = IORESOURCE_MEM,301},302{303.start = IRQ_CAN_RX,304.end = IRQ_CAN_RX,305.flags = IORESOURCE_IRQ,306},307{308.start = IRQ_CAN_TX,309.end = IRQ_CAN_TX,310.flags = IORESOURCE_IRQ,311},312{313.start = IRQ_CAN_ERROR,314.end = IRQ_CAN_ERROR,315.flags = IORESOURCE_IRQ,316},317};318319static struct platform_device bfin_can_device = {320.name = "bfin_can",321.num_resources = ARRAY_SIZE(bfin_can_resources),322.resource = bfin_can_resources,323.dev = {324.platform_data = &bfin_can_peripherals, /* Passed to driver */325},326};327#endif328329#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)330#include <linux/bfin_mac.h>331static const unsigned short bfin_mac_peripherals[] = P_MII0;332333static struct bfin_phydev_platform_data bfin_phydev_data[] = {334{335.addr = 1,336.irq = PHY_POLL, /* IRQ_MAC_PHYINT */337},338};339340static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {341.phydev_number = 1,342.phydev_data = bfin_phydev_data,343.phy_mode = PHY_INTERFACE_MODE_MII,344.mac_peripherals = bfin_mac_peripherals,345};346347static struct platform_device bfin_mii_bus = {348.name = "bfin_mii_bus",349.dev = {350.platform_data = &bfin_mii_bus_data,351}352};353354static struct platform_device bfin_mac_device = {355.name = "bfin_mac",356.dev = {357.platform_data = &bfin_mii_bus,358}359};360#endif361362#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)363static struct resource net2272_bfin_resources[] = {364{365.start = 0x20300000,366.end = 0x20300000 + 0x100,367.flags = IORESOURCE_MEM,368}, {369.start = IRQ_PF7,370.end = IRQ_PF7,371.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,372},373};374375static struct platform_device net2272_bfin_device = {376.name = "net2272",377.id = -1,378.num_resources = ARRAY_SIZE(net2272_bfin_resources),379.resource = net2272_bfin_resources,380};381#endif382383#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)384const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };385386static struct mtd_partition bfin_plat_nand_partitions[] = {387{388.name = "linux kernel(nand)",389.size = 0x400000,390.offset = 0,391}, {392.name = "file system(nand)",393.size = MTDPART_SIZ_FULL,394.offset = MTDPART_OFS_APPEND,395},396};397398#define BFIN_NAND_PLAT_CLE 2399#define BFIN_NAND_PLAT_ALE 1400static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)401{402struct nand_chip *this = mtd->priv;403404if (cmd == NAND_CMD_NONE)405return;406407if (ctrl & NAND_CLE)408writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));409else410writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));411}412413#define BFIN_NAND_PLAT_READY GPIO_PF3414static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)415{416return gpio_get_value(BFIN_NAND_PLAT_READY);417}418419static struct platform_nand_data bfin_plat_nand_data = {420.chip = {421.nr_chips = 1,422.chip_delay = 30,423.part_probe_types = part_probes,424.partitions = bfin_plat_nand_partitions,425.nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),426},427.ctrl = {428.cmd_ctrl = bfin_plat_nand_cmd_ctrl,429.dev_ready = bfin_plat_nand_dev_ready,430},431};432433#define MAX(x, y) (x > y ? x : y)434static struct resource bfin_plat_nand_resources = {435.start = 0x20212000,436.end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),437.flags = IORESOURCE_MEM,438};439440static struct platform_device bfin_async_nand_device = {441.name = "gen_nand",442.id = -1,443.num_resources = 1,444.resource = &bfin_plat_nand_resources,445.dev = {446.platform_data = &bfin_plat_nand_data,447},448};449450static void bfin_plat_nand_init(void)451{452gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");453}454#else455static void bfin_plat_nand_init(void) {}456#endif457458#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)459static struct mtd_partition stamp_partitions[] = {460{461.name = "bootloader(nor)",462.size = 0x40000,463.offset = 0,464}, {465.name = "linux kernel(nor)",466.size = 0x180000,467.offset = MTDPART_OFS_APPEND,468}, {469.name = "file system(nor)",470.size = 0x400000 - 0x40000 - 0x180000 - 0x10000,471.offset = MTDPART_OFS_APPEND,472}, {473.name = "MAC Address(nor)",474.size = MTDPART_SIZ_FULL,475.offset = 0x3F0000,476.mask_flags = MTD_WRITEABLE,477}478};479480static struct physmap_flash_data stamp_flash_data = {481.width = 2,482.parts = stamp_partitions,483.nr_parts = ARRAY_SIZE(stamp_partitions),484#ifdef CONFIG_ROMKERNEL485.probe_type = "map_rom",486#endif487};488489static struct resource stamp_flash_resource = {490.start = 0x20000000,491.end = 0x203fffff,492.flags = IORESOURCE_MEM,493};494495static struct platform_device stamp_flash_device = {496.name = "physmap-flash",497.id = 0,498.dev = {499.platform_data = &stamp_flash_data,500},501.num_resources = 1,502.resource = &stamp_flash_resource,503};504#endif505506#if defined(CONFIG_MTD_M25P80) \507|| defined(CONFIG_MTD_M25P80_MODULE)508static struct mtd_partition bfin_spi_flash_partitions[] = {509{510.name = "bootloader(spi)",511.size = 0x00040000,512.offset = 0,513.mask_flags = MTD_CAP_ROM514}, {515.name = "linux kernel(spi)",516.size = 0x180000,517.offset = MTDPART_OFS_APPEND,518}, {519.name = "file system(spi)",520.size = MTDPART_SIZ_FULL,521.offset = MTDPART_OFS_APPEND,522}523};524525static struct flash_platform_data bfin_spi_flash_data = {526.name = "m25p80",527.parts = bfin_spi_flash_partitions,528.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),529/* .type = "m25p64", */530};531532/* SPI flash chip (m25p64) */533static struct bfin5xx_spi_chip spi_flash_chip_info = {534.enable_dma = 0, /* use dma transfer with this chip*/535.bits_per_word = 8,536};537#endif538539#if defined(CONFIG_BFIN_SPI_ADC) \540|| defined(CONFIG_BFIN_SPI_ADC_MODULE)541/* SPI ADC chip */542static struct bfin5xx_spi_chip spi_adc_chip_info = {543.enable_dma = 1, /* use dma transfer with this chip*/544.bits_per_word = 16,545};546#endif547548#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \549|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)550static struct bfin5xx_spi_chip ad1836_spi_chip_info = {551.enable_dma = 0,552.bits_per_word = 16,553};554#endif555556#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \557|| defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)558static struct bfin5xx_spi_chip ad1938_spi_chip_info = {559.enable_dma = 0,560.bits_per_word = 8,561};562#endif563564#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \565|| defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)566static struct bfin5xx_spi_chip adav801_spi_chip_info = {567.enable_dma = 0,568.bits_per_word = 8,569};570#endif571572#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)573#include <linux/input/ad714x.h>574static struct bfin5xx_spi_chip ad7147_spi_chip_info = {575.enable_dma = 0,576.bits_per_word = 16,577};578579static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {580{581.start_stage = 0,582.end_stage = 7,583.max_coord = 128,584},585};586587static struct ad714x_button_plat ad7147_spi_button_plat[] = {588{589.keycode = BTN_FORWARD,590.l_mask = 0,591.h_mask = 0x600,592},593{594.keycode = BTN_LEFT,595.l_mask = 0,596.h_mask = 0x500,597},598{599.keycode = BTN_MIDDLE,600.l_mask = 0,601.h_mask = 0x800,602},603{604.keycode = BTN_RIGHT,605.l_mask = 0x100,606.h_mask = 0x400,607},608{609.keycode = BTN_BACK,610.l_mask = 0x200,611.h_mask = 0x400,612},613};614static struct ad714x_platform_data ad7147_spi_platform_data = {615.slider_num = 1,616.button_num = 5,617.slider = ad7147_spi_slider_plat,618.button = ad7147_spi_button_plat,619.stage_cfg_reg = {620{0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},621{0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},622{0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},623{0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},624{0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},625{0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},626{0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},627{0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},628{0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},629{0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},630{0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},631{0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},632},633.sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},634};635#endif636637#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)638#include <linux/input/ad714x.h>639static struct ad714x_button_plat ad7142_i2c_button_plat[] = {640{641.keycode = BTN_1,642.l_mask = 0,643.h_mask = 0x1,644},645{646.keycode = BTN_2,647.l_mask = 0,648.h_mask = 0x2,649},650{651.keycode = BTN_3,652.l_mask = 0,653.h_mask = 0x4,654},655{656.keycode = BTN_4,657.l_mask = 0x0,658.h_mask = 0x8,659},660};661static struct ad714x_platform_data ad7142_i2c_platform_data = {662.button_num = 4,663.button = ad7142_i2c_button_plat,664.stage_cfg_reg = {665/* fixme: figure out right setting for all comoponent according666* to hardware feature of EVAL-AD7142EB board */667{0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},668{0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},669{0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},670{0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},671{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},672{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},673{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},674{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},675{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},676{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},677{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},678{0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},679},680.sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},681};682#endif683684#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)685static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {686.enable_dma = 0,687.bits_per_word = 16,688};689#endif690691#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)692static unsigned short ad2s120x_platform_data[] = {693/* used as SAMPLE and RDVEL */694GPIO_PF5, GPIO_PF6, 0695};696697static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {698.enable_dma = 0,699.bits_per_word = 16,700};701#endif702703#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)704static unsigned short ad2s1210_platform_data[] = {705/* use as SAMPLE, A0, A1 */706GPIO_PF7, GPIO_PF8, GPIO_PF9,707# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)708/* the RES0 and RES1 pins */709GPIO_PF4, GPIO_PF5,710# endif7110,712};713714static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {715.enable_dma = 0,716.bits_per_word = 8,717};718#endif719720#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)721static struct bfin5xx_spi_chip ad7314_spi_chip_info = {722.enable_dma = 0,723.bits_per_word = 16,724};725#endif726727#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)728static unsigned short ad7816_platform_data[] = {729GPIO_PF4, /* rdwr_pin */730GPIO_PF5, /* convert_pin */731GPIO_PF7, /* busy_pin */7320,733};734735static struct bfin5xx_spi_chip ad7816_spi_chip_info = {736.enable_dma = 0,737.bits_per_word = 8,738};739#endif740741#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)742static unsigned long adt7310_platform_data[3] = {743/* INT bound temperature alarm event. line 1 */744IRQ_PG4, IRQF_TRIGGER_LOW,745/* CT bound temperature alarm event irq_flags. line 0 */746IRQF_TRIGGER_LOW,747};748749static struct bfin5xx_spi_chip adt7310_spi_chip_info = {750.enable_dma = 0,751.bits_per_word = 8,752};753#endif754755#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)756static unsigned short ad7298_platform_data[] = {757GPIO_PF7, /* busy_pin */7580,759};760761static struct bfin5xx_spi_chip ad7298_spi_chip_info = {762.enable_dma = 0,763.bits_per_word = 16,764};765#endif766767#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)768static unsigned long adt7316_spi_data[2] = {769IRQF_TRIGGER_LOW, /* interrupt flags */770GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */771};772773static struct bfin5xx_spi_chip adt7316_spi_chip_info = {774.enable_dma = 0,775.bits_per_word = 8,776};777#endif778779#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)780#define MMC_SPI_CARD_DETECT_INT IRQ_PF5781782static int bfin_mmc_spi_init(struct device *dev,783irqreturn_t (*detect_int)(int, void *), void *data)784{785return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,786IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);787}788789static void bfin_mmc_spi_exit(struct device *dev, void *data)790{791free_irq(MMC_SPI_CARD_DETECT_INT, data);792}793794static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {795.init = bfin_mmc_spi_init,796.exit = bfin_mmc_spi_exit,797.detect_delay = 100, /* msecs */798};799800static struct bfin5xx_spi_chip mmc_spi_chip_info = {801.enable_dma = 0,802.bits_per_word = 8,803.pio_interrupt = 0,804};805#endif806807#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)808#include <linux/spi/ad7877.h>809static struct bfin5xx_spi_chip spi_ad7877_chip_info = {810.enable_dma = 0,811.bits_per_word = 16,812};813814static const struct ad7877_platform_data bfin_ad7877_ts_info = {815.model = 7877,816.vref_delay_usecs = 50, /* internal, no capacitor */817.x_plate_ohms = 419,818.y_plate_ohms = 486,819.pressure_max = 1000,820.pressure_min = 0,821.stopacq_polarity = 1,822.first_conversion_delay = 3,823.acquisition_time = 1,824.averaging = 1,825.pen_down_acc_interval = 1,826};827#endif828829#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)830#include <linux/spi/ad7879.h>831static const struct ad7879_platform_data bfin_ad7879_ts_info = {832.model = 7879, /* Model = AD7879 */833.x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */834.pressure_max = 10000,835.pressure_min = 0,836.first_conversion_delay = 3, /* wait 512us before do a first conversion */837.acquisition_time = 1, /* 4us acquisition time per sample */838.median = 2, /* do 8 measurements */839.averaging = 1, /* take the average of 4 middle samples */840.pen_down_acc_interval = 255, /* 9.4 ms */841.gpio_export = 1, /* Export GPIO to gpiolib */842.gpio_base = -1, /* Dynamic allocation */843};844#endif845846#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)847#include <linux/input/adxl34x.h>848static const struct adxl34x_platform_data adxl34x_info = {849.x_axis_offset = 0,850.y_axis_offset = 0,851.z_axis_offset = 0,852.tap_threshold = 0x31,853.tap_duration = 0x10,854.tap_latency = 0x60,855.tap_window = 0xF0,856.tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,857.act_axis_control = 0xFF,858.activity_threshold = 5,859.inactivity_threshold = 3,860.inactivity_time = 4,861.free_fall_threshold = 0x7,862.free_fall_time = 0x20,863.data_rate = 0x8,864.data_range = ADXL_FULL_RES,865866.ev_type = EV_ABS,867.ev_code_x = ABS_X, /* EV_REL */868.ev_code_y = ABS_Y, /* EV_REL */869.ev_code_z = ABS_Z, /* EV_REL */870871.ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */872873/* .ev_code_ff = KEY_F,*/ /* EV_KEY */874/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */875.power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,876.fifo_mode = ADXL_FIFO_STREAM,877.orientation_enable = ADXL_EN_ORIENTATION_3D,878.deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,879.divisor_length = ADXL_LP_FILTER_DIVISOR_16,880/* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */881.ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},882};883#endif884885#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)886static struct bfin5xx_spi_chip spi_ad7879_chip_info = {887.enable_dma = 0,888.bits_per_word = 16,889};890#endif891892#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)893static struct bfin5xx_spi_chip spidev_chip_info = {894.enable_dma = 0,895.bits_per_word = 8,896};897#endif898899#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)900static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {901.enable_dma = 0,902.bits_per_word = 8,903};904#endif905906#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)907static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {908.enable_dma = 1,909.bits_per_word = 8,910};911#endif912913#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)914static struct bfin5xx_spi_chip adf7021_spi_chip_info = {915.bits_per_word = 16,916};917918#include <linux/spi/adf702x.h>919#define TXREG 0x0160A470920static const u32 adf7021_regs[] = {9210x09608FA0,9220x00575011,9230x00A7F092,9240x2B141563,9250x81F29E94,9260x00003155,9270x050A4F66,9280x00000007,9290x00000008,9300x000231E9,9310x3296354A,9320x891A2B3B,9330x00000D9C,9340x0000000D,9350x0000000E,9360x0000000F,937};938939static struct adf702x_platform_data adf7021_platform_data = {940.regs_base = (void *)SPORT1_TCR1,941.dma_ch_rx = CH_SPORT1_RX,942.dma_ch_tx = CH_SPORT1_TX,943.irq_sport_err = IRQ_SPORT1_ERROR,944.gpio_int_rfs = GPIO_PF8,945.pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,946P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},947.adf702x_model = MODEL_ADF7021,948.adf702x_regs = adf7021_regs,949.tx_reg = TXREG,950};951static inline void adf702x_mac_init(void)952{953random_ether_addr(adf7021_platform_data.mac_addr);954}955#else956static inline void adf702x_mac_init(void) {}957#endif958959#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)960#include <linux/spi/ads7846.h>961static struct bfin5xx_spi_chip ad7873_spi_chip_info = {962.bits_per_word = 8,963};964965static int ads7873_get_pendown_state(void)966{967return gpio_get_value(GPIO_PF6);968}969970static struct ads7846_platform_data __initdata ad7873_pdata = {971.model = 7873, /* AD7873 */972.x_max = 0xfff,973.y_max = 0xfff,974.x_plate_ohms = 620,975.debounce_max = 1,976.debounce_rep = 0,977.debounce_tol = (~0),978.get_pendown_state = ads7873_get_pendown_state,979};980#endif981982#if defined(CONFIG_MTD_DATAFLASH) \983|| defined(CONFIG_MTD_DATAFLASH_MODULE)984985static struct mtd_partition bfin_spi_dataflash_partitions[] = {986{987.name = "bootloader(spi)",988.size = 0x00040000,989.offset = 0,990.mask_flags = MTD_CAP_ROM991}, {992.name = "linux kernel(spi)",993.size = 0x180000,994.offset = MTDPART_OFS_APPEND,995}, {996.name = "file system(spi)",997.size = MTDPART_SIZ_FULL,998.offset = MTDPART_OFS_APPEND,999}1000};10011002static struct flash_platform_data bfin_spi_dataflash_data = {1003.name = "SPI Dataflash",1004.parts = bfin_spi_dataflash_partitions,1005.nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),1006};10071008/* DataFlash chip */1009static struct bfin5xx_spi_chip data_flash_chip_info = {1010.enable_dma = 0, /* use dma transfer with this chip*/1011.bits_per_word = 8,1012};1013#endif10141015#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)1016static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {1017.enable_dma = 0, /* use dma transfer with this chip*/1018.bits_per_word = 8,1019};1020#endif10211022#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)1023static struct bfin5xx_spi_chip spi_ad7476_chip_info = {1024.enable_dma = 0, /* use dma transfer with this chip*/1025.bits_per_word = 8,1026};1027#endif10281029static struct spi_board_info bfin_spi_board_info[] __initdata = {1030#if defined(CONFIG_MTD_M25P80) \1031|| defined(CONFIG_MTD_M25P80_MODULE)1032{1033/* the modalias must be the same as spi device driver name */1034.modalias = "m25p80", /* Name of spi_driver for this device */1035.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */1036.bus_num = 0, /* Framework bus number */1037.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/1038.platform_data = &bfin_spi_flash_data,1039.controller_data = &spi_flash_chip_info,1040.mode = SPI_MODE_3,1041},1042#endif1043#if defined(CONFIG_MTD_DATAFLASH) \1044|| defined(CONFIG_MTD_DATAFLASH_MODULE)1045{ /* DataFlash chip */1046.modalias = "mtd_dataflash",1047.max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */1048.bus_num = 0, /* Framework bus number */1049.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/1050.platform_data = &bfin_spi_dataflash_data,1051.controller_data = &data_flash_chip_info,1052.mode = SPI_MODE_3,1053},1054#endif1055#if defined(CONFIG_BFIN_SPI_ADC) \1056|| defined(CONFIG_BFIN_SPI_ADC_MODULE)1057{1058.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */1059.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */1060.bus_num = 0, /* Framework bus number */1061.chip_select = 1, /* Framework chip select. */1062.platform_data = NULL, /* No spi_driver specific config */1063.controller_data = &spi_adc_chip_info,1064},1065#endif10661067#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \1068|| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)1069{1070.modalias = "ad183x",1071.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */1072.bus_num = 0,1073.chip_select = 4,1074.platform_data = "ad1836", /* only includes chip name for the moment */1075.controller_data = &ad1836_spi_chip_info,1076.mode = SPI_MODE_3,1077},1078#endif10791080#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)1081{1082.modalias = "ad193x",1083.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */1084.bus_num = 0,1085.chip_select = 5,1086.controller_data = &ad1938_spi_chip_info,1087.mode = SPI_MODE_3,1088},1089#endif10901091#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)1092{1093.modalias = "adav80x",1094.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */1095.bus_num = 0,1096.chip_select = 1,1097.controller_data = &adav801_spi_chip_info,1098.mode = SPI_MODE_3,1099},1100#endif11011102#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)1103{1104.modalias = "ad714x_captouch",1105.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1106.irq = IRQ_PF4,1107.bus_num = 0,1108.chip_select = 5,1109.mode = SPI_MODE_3,1110.platform_data = &ad7147_spi_platform_data,1111.controller_data = &ad7147_spi_chip_info,1112},1113#endif11141115#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)1116{1117.modalias = "ad2s90",1118.bus_num = 0,1119.chip_select = 3, /* change it for your board */1120.mode = SPI_MODE_3,1121.platform_data = NULL,1122.controller_data = &ad2s90_spi_chip_info,1123},1124#endif11251126#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)1127{1128.modalias = "ad2s120x",1129.bus_num = 0,1130.chip_select = 4, /* CS, change it for your board */1131.platform_data = ad2s120x_platform_data,1132.controller_data = &ad2s120x_spi_chip_info,1133},1134#endif11351136#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)1137{1138.modalias = "ad2s1210",1139.max_speed_hz = 8192000,1140.bus_num = 0,1141.chip_select = 4, /* CS, change it for your board */1142.platform_data = ad2s1210_platform_data,1143.controller_data = &ad2s1210_spi_chip_info,1144},1145#endif11461147#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)1148{1149.modalias = "ad7314",1150.max_speed_hz = 1000000,1151.bus_num = 0,1152.chip_select = 4, /* CS, change it for your board */1153.controller_data = &ad7314_spi_chip_info,1154.mode = SPI_MODE_1,1155},1156#endif11571158#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)1159{1160.modalias = "ad7818",1161.max_speed_hz = 1000000,1162.bus_num = 0,1163.chip_select = 4, /* CS, change it for your board */1164.platform_data = ad7816_platform_data,1165.controller_data = &ad7816_spi_chip_info,1166.mode = SPI_MODE_3,1167},1168#endif11691170#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)1171{1172.modalias = "adt7310",1173.max_speed_hz = 1000000,1174.irq = IRQ_PG5, /* CT alarm event. Line 0 */1175.bus_num = 0,1176.chip_select = 4, /* CS, change it for your board */1177.platform_data = adt7310_platform_data,1178.controller_data = &adt7310_spi_chip_info,1179.mode = SPI_MODE_3,1180},1181#endif11821183#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)1184{1185.modalias = "ad7298",1186.max_speed_hz = 1000000,1187.bus_num = 0,1188.chip_select = 4, /* CS, change it for your board */1189.platform_data = ad7298_platform_data,1190.controller_data = &ad7298_spi_chip_info,1191.mode = SPI_MODE_3,1192},1193#endif11941195#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)1196{1197.modalias = "adt7316",1198.max_speed_hz = 1000000,1199.irq = IRQ_PG5, /* interrupt line */1200.bus_num = 0,1201.chip_select = 4, /* CS, change it for your board */1202.platform_data = adt7316_spi_data,1203.controller_data = &adt7316_spi_chip_info,1204.mode = SPI_MODE_3,1205},1206#endif12071208#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)1209{1210.modalias = "mmc_spi",1211.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */1212.bus_num = 0,1213.chip_select = 4,1214.platform_data = &bfin_mmc_spi_pdata,1215.controller_data = &mmc_spi_chip_info,1216.mode = SPI_MODE_3,1217},1218#endif1219#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)1220{1221.modalias = "ad7877",1222.platform_data = &bfin_ad7877_ts_info,1223.irq = IRQ_PF6,1224.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */1225.bus_num = 0,1226.chip_select = 1,1227.controller_data = &spi_ad7877_chip_info,1228},1229#endif1230#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)1231{1232.modalias = "ad7879",1233.platform_data = &bfin_ad7879_ts_info,1234.irq = IRQ_PF7,1235.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */1236.bus_num = 0,1237.chip_select = 1,1238.controller_data = &spi_ad7879_chip_info,1239.mode = SPI_CPHA | SPI_CPOL,1240},1241#endif1242#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)1243{1244.modalias = "spidev",1245.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */1246.bus_num = 0,1247.chip_select = 1,1248.controller_data = &spidev_chip_info,1249},1250#endif1251#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)1252{1253.modalias = "bfin-lq035q1-spi",1254.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */1255.bus_num = 0,1256.chip_select = 2,1257.controller_data = &lq035q1_spi_chip_info,1258.mode = SPI_CPHA | SPI_CPOL,1259},1260#endif1261#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)1262{1263.modalias = "enc28j60",1264.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */1265.irq = IRQ_PF6,1266.bus_num = 0,1267.chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */1268.controller_data = &enc28j60_spi_chip_info,1269.mode = SPI_MODE_0,1270},1271#endif1272#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)1273{1274.modalias = "adxl34x",1275.platform_data = &adxl34x_info,1276.irq = IRQ_PF6,1277.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */1278.bus_num = 0,1279.chip_select = 2,1280.controller_data = &spi_adxl34x_chip_info,1281.mode = SPI_MODE_3,1282},1283#endif1284#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)1285{1286.modalias = "adf702x",1287.max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */1288.bus_num = 0,1289.chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */1290.controller_data = &adf7021_spi_chip_info,1291.platform_data = &adf7021_platform_data,1292.mode = SPI_MODE_0,1293},1294#endif1295#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)1296{1297.modalias = "ads7846",1298.max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */1299.bus_num = 0,1300.irq = IRQ_PF6,1301.chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */1302.controller_data = &ad7873_spi_chip_info,1303.platform_data = &ad7873_pdata,1304.mode = SPI_MODE_0,1305},1306#endif1307#if defined(CONFIG_AD7476) \1308|| defined(CONFIG_AD7476_MODULE)1309{1310.modalias = "ad7476", /* Name of spi_driver for this device */1311.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */1312.bus_num = 0, /* Framework bus number */1313.chip_select = 1, /* Framework chip select. */1314.platform_data = NULL, /* No spi_driver specific config */1315.controller_data = &spi_ad7476_chip_info,1316.mode = SPI_MODE_3,1317},1318#endif1319#if defined(CONFIG_ADE7753) \1320|| defined(CONFIG_ADE7753_MODULE)1321{1322.modalias = "ade7753",1323.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1324.bus_num = 0,1325.chip_select = 1, /* CS, change it for your board */1326.platform_data = NULL, /* No spi_driver specific config */1327.mode = SPI_MODE_1,1328},1329#endif1330#if defined(CONFIG_ADE7754) \1331|| defined(CONFIG_ADE7754_MODULE)1332{1333.modalias = "ade7754",1334.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1335.bus_num = 0,1336.chip_select = 1, /* CS, change it for your board */1337.platform_data = NULL, /* No spi_driver specific config */1338.mode = SPI_MODE_1,1339},1340#endif1341#if defined(CONFIG_ADE7758) \1342|| defined(CONFIG_ADE7758_MODULE)1343{1344.modalias = "ade7758",1345.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1346.bus_num = 0,1347.chip_select = 1, /* CS, change it for your board */1348.platform_data = NULL, /* No spi_driver specific config */1349.mode = SPI_MODE_1,1350},1351#endif1352#if defined(CONFIG_ADE7759) \1353|| defined(CONFIG_ADE7759_MODULE)1354{1355.modalias = "ade7759",1356.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1357.bus_num = 0,1358.chip_select = 1, /* CS, change it for your board */1359.platform_data = NULL, /* No spi_driver specific config */1360.mode = SPI_MODE_1,1361},1362#endif1363#if defined(CONFIG_ADE7854_SPI) \1364|| defined(CONFIG_ADE7854_SPI_MODULE)1365{1366.modalias = "ade7854",1367.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1368.bus_num = 0,1369.chip_select = 1, /* CS, change it for your board */1370.platform_data = NULL, /* No spi_driver specific config */1371.mode = SPI_MODE_3,1372},1373#endif1374#if defined(CONFIG_ADIS16060) \1375|| defined(CONFIG_ADIS16060_MODULE)1376{1377.modalias = "adis16060_r",1378.max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */1379.bus_num = 0,1380.chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */1381.platform_data = NULL, /* No spi_driver specific config */1382.mode = SPI_MODE_0,1383},1384{1385.modalias = "adis16060_w",1386.max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */1387.bus_num = 0,1388.chip_select = 2, /* CS for write, change it for your board */1389.platform_data = NULL, /* No spi_driver specific config */1390.mode = SPI_MODE_1,1391},1392#endif1393#if defined(CONFIG_ADIS16130) \1394|| defined(CONFIG_ADIS16130_MODULE)1395{1396.modalias = "adis16130",1397.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1398.bus_num = 0,1399.chip_select = 1, /* CS for read, change it for your board */1400.platform_data = NULL, /* No spi_driver specific config */1401.mode = SPI_MODE_3,1402},1403#endif1404#if defined(CONFIG_ADIS16201) \1405|| defined(CONFIG_ADIS16201_MODULE)1406{1407.modalias = "adis16201",1408.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1409.bus_num = 0,1410.chip_select = 5, /* CS, change it for your board */1411.platform_data = NULL, /* No spi_driver specific config */1412.mode = SPI_MODE_3,1413.irq = IRQ_PF4,1414},1415#endif1416#if defined(CONFIG_ADIS16203) \1417|| defined(CONFIG_ADIS16203_MODULE)1418{1419.modalias = "adis16203",1420.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1421.bus_num = 0,1422.chip_select = 5, /* CS, change it for your board */1423.platform_data = NULL, /* No spi_driver specific config */1424.mode = SPI_MODE_3,1425.irq = IRQ_PF4,1426},1427#endif1428#if defined(CONFIG_ADIS16204) \1429|| defined(CONFIG_ADIS16204_MODULE)1430{1431.modalias = "adis16204",1432.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1433.bus_num = 0,1434.chip_select = 5, /* CS, change it for your board */1435.platform_data = NULL, /* No spi_driver specific config */1436.mode = SPI_MODE_3,1437.irq = IRQ_PF4,1438},1439#endif1440#if defined(CONFIG_ADIS16209) \1441|| defined(CONFIG_ADIS16209_MODULE)1442{1443.modalias = "adis16209",1444.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1445.bus_num = 0,1446.chip_select = 5, /* CS, change it for your board */1447.platform_data = NULL, /* No spi_driver specific config */1448.mode = SPI_MODE_3,1449.irq = IRQ_PF4,1450},1451#endif1452#if defined(CONFIG_ADIS16220) \1453|| defined(CONFIG_ADIS16220_MODULE)1454{1455.modalias = "adis16220",1456.max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */1457.bus_num = 0,1458.chip_select = 5, /* CS, change it for your board */1459.platform_data = NULL, /* No spi_driver specific config */1460.mode = SPI_MODE_3,1461.irq = IRQ_PF4,1462},1463#endif1464#if defined(CONFIG_ADIS16240) \1465|| defined(CONFIG_ADIS16240_MODULE)1466{1467.modalias = "adis16240",1468.max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */1469.bus_num = 0,1470.chip_select = 5, /* CS, change it for your board */1471.platform_data = NULL, /* No spi_driver specific config */1472.mode = SPI_MODE_3,1473.irq = IRQ_PF4,1474},1475#endif1476#if defined(CONFIG_ADIS16260) \1477|| defined(CONFIG_ADIS16260_MODULE)1478{1479.modalias = "adis16260",1480.max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */1481.bus_num = 0,1482.chip_select = 5, /* CS, change it for your board */1483.platform_data = NULL, /* No spi_driver specific config */1484.mode = SPI_MODE_3,1485.irq = IRQ_PF4,1486},1487#endif1488#if defined(CONFIG_ADIS16261) \1489|| defined(CONFIG_ADIS16261_MODULE)1490{1491.modalias = "adis16261",1492.max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */1493.bus_num = 0,1494.chip_select = 1, /* CS, change it for your board */1495.platform_data = NULL, /* No spi_driver specific config */1496.mode = SPI_MODE_3,1497},1498#endif1499#if defined(CONFIG_ADIS16300) \1500|| defined(CONFIG_ADIS16300_MODULE)1501{1502.modalias = "adis16300",1503.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1504.bus_num = 0,1505.chip_select = 5, /* CS, change it for your board */1506.platform_data = NULL, /* No spi_driver specific config */1507.mode = SPI_MODE_3,1508.irq = IRQ_PF4,1509},1510#endif1511#if defined(CONFIG_ADIS16350) \1512|| defined(CONFIG_ADIS16350_MODULE)1513{1514.modalias = "adis16364",1515.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1516.bus_num = 0,1517.chip_select = 5, /* CS, change it for your board */1518.platform_data = NULL, /* No spi_driver specific config */1519.mode = SPI_MODE_3,1520.irq = IRQ_PF4,1521},1522#endif1523#if defined(CONFIG_ADIS16400) \1524|| defined(CONFIG_ADIS16400_MODULE)1525{1526.modalias = "adis16400",1527.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */1528.bus_num = 0,1529.chip_select = 1, /* CS, change it for your board */1530.platform_data = NULL, /* No spi_driver specific config */1531.mode = SPI_MODE_3,1532},1533#endif1534};15351536#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)1537/* SPI controller data */1538static struct bfin5xx_spi_master bfin_spi0_info = {1539.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,1540.enable_dma = 1, /* master has the ability to do dma transfer */1541.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},1542};15431544/* SPI (0) */1545static struct resource bfin_spi0_resource[] = {1546[0] = {1547.start = SPI0_REGBASE,1548.end = SPI0_REGBASE + 0xFF,1549.flags = IORESOURCE_MEM,1550},1551[1] = {1552.start = CH_SPI,1553.end = CH_SPI,1554.flags = IORESOURCE_DMA,1555},1556[2] = {1557.start = IRQ_SPI,1558.end = IRQ_SPI,1559.flags = IORESOURCE_IRQ,1560},1561};15621563static struct platform_device bfin_spi0_device = {1564.name = "bfin-spi",1565.id = 0, /* Bus number */1566.num_resources = ARRAY_SIZE(bfin_spi0_resource),1567.resource = bfin_spi0_resource,1568.dev = {1569.platform_data = &bfin_spi0_info, /* Passed to driver */1570},1571};1572#endif /* spi master and devices */15731574#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)15751576/* SPORT SPI controller data */1577static struct bfin5xx_spi_master bfin_sport_spi0_info = {1578.num_chipselect = 1, /* master only supports one device */1579.enable_dma = 0, /* master don't support DMA */1580.pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,1581P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},1582};15831584static struct resource bfin_sport_spi0_resource[] = {1585[0] = {1586.start = SPORT0_TCR1,1587.end = SPORT0_TCR1 + 0xFF,1588.flags = IORESOURCE_MEM,1589},1590[1] = {1591.start = IRQ_SPORT0_ERROR,1592.end = IRQ_SPORT0_ERROR,1593.flags = IORESOURCE_IRQ,1594},1595};15961597static struct platform_device bfin_sport_spi0_device = {1598.name = "bfin-sport-spi",1599.id = 1, /* Bus number */1600.num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),1601.resource = bfin_sport_spi0_resource,1602.dev = {1603.platform_data = &bfin_sport_spi0_info, /* Passed to driver */1604},1605};16061607static struct bfin5xx_spi_master bfin_sport_spi1_info = {1608.num_chipselect = 1, /* master only supports one device */1609.enable_dma = 0, /* master don't support DMA */1610.pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,1611P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},1612};16131614static struct resource bfin_sport_spi1_resource[] = {1615[0] = {1616.start = SPORT1_TCR1,1617.end = SPORT1_TCR1 + 0xFF,1618.flags = IORESOURCE_MEM,1619},1620[1] = {1621.start = IRQ_SPORT1_ERROR,1622.end = IRQ_SPORT1_ERROR,1623.flags = IORESOURCE_IRQ,1624},1625};16261627static struct platform_device bfin_sport_spi1_device = {1628.name = "bfin-sport-spi",1629.id = 2, /* Bus number */1630.num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),1631.resource = bfin_sport_spi1_resource,1632.dev = {1633.platform_data = &bfin_sport_spi1_info, /* Passed to driver */1634},1635};16361637#endif /* sport spi master and devices */16381639#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)1640static struct platform_device bfin_fb_device = {1641.name = "bf537-lq035",1642};1643#endif16441645#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)1646#include <asm/bfin-lq035q1.h>16471648static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {1649.mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,1650.ppi_mode = USE_RGB565_16_BIT_PPI,1651.use_bl = 0, /* let something else control the LCD Blacklight */1652.gpio_bl = GPIO_PF7,1653};16541655static struct resource bfin_lq035q1_resources[] = {1656{1657.start = IRQ_PPI_ERROR,1658.end = IRQ_PPI_ERROR,1659.flags = IORESOURCE_IRQ,1660},1661};16621663static struct platform_device bfin_lq035q1_device = {1664.name = "bfin-lq035q1",1665.id = -1,1666.num_resources = ARRAY_SIZE(bfin_lq035q1_resources),1667.resource = bfin_lq035q1_resources,1668.dev = {1669.platform_data = &bfin_lq035q1_data,1670},1671};1672#endif16731674#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)1675#ifdef CONFIG_SERIAL_BFIN_UART01676static struct resource bfin_uart0_resources[] = {1677{1678.start = UART0_THR,1679.end = UART0_GCTL+2,1680.flags = IORESOURCE_MEM,1681},1682{1683.start = IRQ_UART0_RX,1684.end = IRQ_UART0_RX+1,1685.flags = IORESOURCE_IRQ,1686},1687{1688.start = IRQ_UART0_ERROR,1689.end = IRQ_UART0_ERROR,1690.flags = IORESOURCE_IRQ,1691},1692{1693.start = CH_UART0_TX,1694.end = CH_UART0_TX,1695.flags = IORESOURCE_DMA,1696},1697{1698.start = CH_UART0_RX,1699.end = CH_UART0_RX,1700.flags = IORESOURCE_DMA,1701},1702#ifdef CONFIG_BFIN_UART0_CTSRTS1703{ /* CTS pin */1704.start = GPIO_PG7,1705.end = GPIO_PG7,1706.flags = IORESOURCE_IO,1707},1708{ /* RTS pin */1709.start = GPIO_PG6,1710.end = GPIO_PG6,1711.flags = IORESOURCE_IO,1712},1713#endif1714};17151716static unsigned short bfin_uart0_peripherals[] = {1717P_UART0_TX, P_UART0_RX, 01718};17191720static struct platform_device bfin_uart0_device = {1721.name = "bfin-uart",1722.id = 0,1723.num_resources = ARRAY_SIZE(bfin_uart0_resources),1724.resource = bfin_uart0_resources,1725.dev = {1726.platform_data = &bfin_uart0_peripherals, /* Passed to driver */1727},1728};1729#endif1730#ifdef CONFIG_SERIAL_BFIN_UART11731static struct resource bfin_uart1_resources[] = {1732{1733.start = UART1_THR,1734.end = UART1_GCTL+2,1735.flags = IORESOURCE_MEM,1736},1737{1738.start = IRQ_UART1_RX,1739.end = IRQ_UART1_RX+1,1740.flags = IORESOURCE_IRQ,1741},1742{1743.start = IRQ_UART1_ERROR,1744.end = IRQ_UART1_ERROR,1745.flags = IORESOURCE_IRQ,1746},1747{1748.start = CH_UART1_TX,1749.end = CH_UART1_TX,1750.flags = IORESOURCE_DMA,1751},1752{1753.start = CH_UART1_RX,1754.end = CH_UART1_RX,1755.flags = IORESOURCE_DMA,1756},1757};17581759static unsigned short bfin_uart1_peripherals[] = {1760P_UART1_TX, P_UART1_RX, 01761};17621763static struct platform_device bfin_uart1_device = {1764.name = "bfin-uart",1765.id = 1,1766.num_resources = ARRAY_SIZE(bfin_uart1_resources),1767.resource = bfin_uart1_resources,1768.dev = {1769.platform_data = &bfin_uart1_peripherals, /* Passed to driver */1770},1771};1772#endif1773#endif17741775#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)1776#ifdef CONFIG_BFIN_SIR01777static struct resource bfin_sir0_resources[] = {1778{1779.start = 0xFFC00400,1780.end = 0xFFC004FF,1781.flags = IORESOURCE_MEM,1782},1783{1784.start = IRQ_UART0_RX,1785.end = IRQ_UART0_RX+1,1786.flags = IORESOURCE_IRQ,1787},1788{1789.start = CH_UART0_RX,1790.end = CH_UART0_RX+1,1791.flags = IORESOURCE_DMA,1792},1793};17941795static struct platform_device bfin_sir0_device = {1796.name = "bfin_sir",1797.id = 0,1798.num_resources = ARRAY_SIZE(bfin_sir0_resources),1799.resource = bfin_sir0_resources,1800};1801#endif1802#ifdef CONFIG_BFIN_SIR11803static struct resource bfin_sir1_resources[] = {1804{1805.start = 0xFFC02000,1806.end = 0xFFC020FF,1807.flags = IORESOURCE_MEM,1808},1809{1810.start = IRQ_UART1_RX,1811.end = IRQ_UART1_RX+1,1812.flags = IORESOURCE_IRQ,1813},1814{1815.start = CH_UART1_RX,1816.end = CH_UART1_RX+1,1817.flags = IORESOURCE_DMA,1818},1819};18201821static struct platform_device bfin_sir1_device = {1822.name = "bfin_sir",1823.id = 1,1824.num_resources = ARRAY_SIZE(bfin_sir1_resources),1825.resource = bfin_sir1_resources,1826};1827#endif1828#endif18291830#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)1831static struct resource bfin_twi0_resource[] = {1832[0] = {1833.start = TWI0_REGBASE,1834.end = TWI0_REGBASE,1835.flags = IORESOURCE_MEM,1836},1837[1] = {1838.start = IRQ_TWI,1839.end = IRQ_TWI,1840.flags = IORESOURCE_IRQ,1841},1842};18431844static struct platform_device i2c_bfin_twi_device = {1845.name = "i2c-bfin-twi",1846.id = 0,1847.num_resources = ARRAY_SIZE(bfin_twi0_resource),1848.resource = bfin_twi0_resource,1849};1850#endif18511852#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)1853static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {1854[0] = KEY_GRAVE,1855[1] = KEY_1,1856[2] = KEY_2,1857[3] = KEY_3,1858[4] = KEY_4,1859[5] = KEY_5,1860[6] = KEY_6,1861[7] = KEY_7,1862[8] = KEY_8,1863[9] = KEY_9,1864[10] = KEY_0,1865[11] = KEY_MINUS,1866[12] = KEY_EQUAL,1867[13] = KEY_BACKSLASH,1868[15] = KEY_KP0,1869[16] = KEY_Q,1870[17] = KEY_W,1871[18] = KEY_E,1872[19] = KEY_R,1873[20] = KEY_T,1874[21] = KEY_Y,1875[22] = KEY_U,1876[23] = KEY_I,1877[24] = KEY_O,1878[25] = KEY_P,1879[26] = KEY_LEFTBRACE,1880[27] = KEY_RIGHTBRACE,1881[29] = KEY_KP1,1882[30] = KEY_KP2,1883[31] = KEY_KP3,1884[32] = KEY_A,1885[33] = KEY_S,1886[34] = KEY_D,1887[35] = KEY_F,1888[36] = KEY_G,1889[37] = KEY_H,1890[38] = KEY_J,1891[39] = KEY_K,1892[40] = KEY_L,1893[41] = KEY_SEMICOLON,1894[42] = KEY_APOSTROPHE,1895[43] = KEY_BACKSLASH,1896[45] = KEY_KP4,1897[46] = KEY_KP5,1898[47] = KEY_KP6,1899[48] = KEY_102ND,1900[49] = KEY_Z,1901[50] = KEY_X,1902[51] = KEY_C,1903[52] = KEY_V,1904[53] = KEY_B,1905[54] = KEY_N,1906[55] = KEY_M,1907[56] = KEY_COMMA,1908[57] = KEY_DOT,1909[58] = KEY_SLASH,1910[60] = KEY_KPDOT,1911[61] = KEY_KP7,1912[62] = KEY_KP8,1913[63] = KEY_KP9,1914[64] = KEY_SPACE,1915[65] = KEY_BACKSPACE,1916[66] = KEY_TAB,1917[67] = KEY_KPENTER,1918[68] = KEY_ENTER,1919[69] = KEY_ESC,1920[70] = KEY_DELETE,1921[74] = KEY_KPMINUS,1922[76] = KEY_UP,1923[77] = KEY_DOWN,1924[78] = KEY_RIGHT,1925[79] = KEY_LEFT,1926};19271928static struct adp5588_kpad_platform_data adp5588_kpad_data = {1929.rows = 8,1930.cols = 10,1931.keymap = adp5588_keymap,1932.keymapsize = ARRAY_SIZE(adp5588_keymap),1933.repeat = 0,1934};1935#endif19361937#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)1938#include <linux/mfd/adp5520.h>19391940/*1941* ADP5520/5501 Backlight Data1942*/19431944static struct adp5520_backlight_platform_data adp5520_backlight_data = {1945.fade_in = ADP5520_FADE_T_1200ms,1946.fade_out = ADP5520_FADE_T_1200ms,1947.fade_led_law = ADP5520_BL_LAW_LINEAR,1948.en_ambl_sens = 1,1949.abml_filt = ADP5520_BL_AMBL_FILT_640ms,1950.l1_daylight_max = ADP5520_BL_CUR_mA(15),1951.l1_daylight_dim = ADP5520_BL_CUR_mA(0),1952.l2_office_max = ADP5520_BL_CUR_mA(7),1953.l2_office_dim = ADP5520_BL_CUR_mA(0),1954.l3_dark_max = ADP5520_BL_CUR_mA(3),1955.l3_dark_dim = ADP5520_BL_CUR_mA(0),1956.l2_trip = ADP5520_L2_COMP_CURR_uA(700),1957.l2_hyst = ADP5520_L2_COMP_CURR_uA(50),1958.l3_trip = ADP5520_L3_COMP_CURR_uA(80),1959.l3_hyst = ADP5520_L3_COMP_CURR_uA(20),1960};19611962/*1963* ADP5520/5501 LEDs Data1964*/19651966static struct led_info adp5520_leds[] = {1967{1968.name = "adp5520-led1",1969.default_trigger = "none",1970.flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,1971},1972#ifdef ADP5520_EN_ALL_LEDS1973{1974.name = "adp5520-led2",1975.default_trigger = "none",1976.flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,1977},1978{1979.name = "adp5520-led3",1980.default_trigger = "none",1981.flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,1982},1983#endif1984};19851986static struct adp5520_leds_platform_data adp5520_leds_data = {1987.num_leds = ARRAY_SIZE(adp5520_leds),1988.leds = adp5520_leds,1989.fade_in = ADP5520_FADE_T_600ms,1990.fade_out = ADP5520_FADE_T_600ms,1991.led_on_time = ADP5520_LED_ONT_600ms,1992};19931994/*1995* ADP5520 GPIO Data1996*/19971998static struct adp5520_gpio_platform_data adp5520_gpio_data = {1999.gpio_start = 50,2000.gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,2001.gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,2002};20032004/*2005* ADP5520 Keypad Data2006*/20072008static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {2009[ADP5520_KEY(0, 0)] = KEY_GRAVE,2010[ADP5520_KEY(0, 1)] = KEY_1,2011[ADP5520_KEY(0, 2)] = KEY_2,2012[ADP5520_KEY(0, 3)] = KEY_3,2013[ADP5520_KEY(1, 0)] = KEY_4,2014[ADP5520_KEY(1, 1)] = KEY_5,2015[ADP5520_KEY(1, 2)] = KEY_6,2016[ADP5520_KEY(1, 3)] = KEY_7,2017[ADP5520_KEY(2, 0)] = KEY_8,2018[ADP5520_KEY(2, 1)] = KEY_9,2019[ADP5520_KEY(2, 2)] = KEY_0,2020[ADP5520_KEY(2, 3)] = KEY_MINUS,2021[ADP5520_KEY(3, 0)] = KEY_EQUAL,2022[ADP5520_KEY(3, 1)] = KEY_BACKSLASH,2023[ADP5520_KEY(3, 2)] = KEY_BACKSPACE,2024[ADP5520_KEY(3, 3)] = KEY_ENTER,2025};20262027static struct adp5520_keys_platform_data adp5520_keys_data = {2028.rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,2029.cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,2030.keymap = adp5520_keymap,2031.keymapsize = ARRAY_SIZE(adp5520_keymap),2032.repeat = 0,2033};20342035/*2036* ADP5520/5501 Multifunction Device Init Data2037*/20382039static struct adp5520_platform_data adp5520_pdev_data = {2040.backlight = &adp5520_backlight_data,2041.leds = &adp5520_leds_data,2042.gpio = &adp5520_gpio_data,2043.keys = &adp5520_keys_data,2044};20452046#endif20472048#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)2049static struct adp5588_gpio_platform_data adp5588_gpio_data = {2050.gpio_start = 50,2051.pullup_dis_mask = 0,2052};2053#endif20542055#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)2056#include <linux/i2c/adp8870.h>2057static struct led_info adp8870_leds[] = {2058{2059.name = "adp8870-led7",2060.default_trigger = "none",2061.flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,2062},2063};206420652066static struct adp8870_backlight_platform_data adp8870_pdata = {2067.bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |2068ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */2069.pwm_assign = 0, /* 1 = Enables PWM mode */20702071.bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */2072.bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */2073.bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */20742075.en_ambl_sens = 1, /* 1 = enable ambient light sensor */2076.abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */20772078.l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2079.l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */2080.l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2081.l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */2082.l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2083.l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */2084.l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2085.l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */2086.l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2087.l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */20882089.l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */2090.l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */2091.l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */2092.l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */2093.l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */2094.l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */2095.l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */2096.l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */20972098.leds = adp8870_leds,2099.num_leds = ARRAY_SIZE(adp8870_leds),2100.led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */2101.led_fade_in = ADP8870_FADE_T_600ms,2102.led_fade_out = ADP8870_FADE_T_600ms,2103.led_on_time = ADP8870_LED_ONT_200ms,2104};2105#endif21062107#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)2108#include <linux/i2c/adp8860.h>2109static struct led_info adp8860_leds[] = {2110{2111.name = "adp8860-led7",2112.default_trigger = "none",2113.flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,2114},2115};21162117static struct adp8860_backlight_platform_data adp8860_pdata = {2118.bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |2119ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */21202121.bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */2122.bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */2123.bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */21242125.en_ambl_sens = 1, /* 1 = enable ambient light sensor */2126.abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */21272128.l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2129.l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */2130.l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2131.l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */2132.l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */2133.l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */21342135.l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */2136.l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */2137.l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */2138.l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */21392140.leds = adp8860_leds,2141.num_leds = ARRAY_SIZE(adp8860_leds),2142.led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */2143.led_fade_in = ADP8860_FADE_T_600ms,2144.led_fade_out = ADP8860_FADE_T_600ms,2145.led_on_time = ADP8860_LED_ONT_200ms,2146};2147#endif21482149#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)2150static struct regulator_consumer_supply ad5398_consumer = {2151.supply = "current",2152};21532154static struct regulator_init_data ad5398_regulator_data = {2155.constraints = {2156.name = "current range",2157.max_uA = 120000,2158.valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,2159},2160.num_consumer_supplies = 1,2161.consumer_supplies = &ad5398_consumer,2162};21632164#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \2165defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)2166static struct platform_device ad5398_virt_consumer_device = {2167.name = "reg-virt-consumer",2168.id = 0,2169.dev = {2170.platform_data = "current", /* Passed to driver */2171},2172};2173#endif2174#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \2175defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)2176static struct regulator_bulk_data ad5398_bulk_data = {2177.supply = "current",2178};21792180static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {2181.name = "ad5398",2182.num_supplies = 1,2183.supplies = &ad5398_bulk_data,2184};21852186static struct platform_device ad5398_userspace_consumer_device = {2187.name = "reg-userspace-consumer",2188.id = 0,2189.dev = {2190.platform_data = &ad5398_userspace_comsumer_data,2191},2192};2193#endif2194#endif21952196#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)2197/* INT bound temperature alarm event. line 1 */2198static unsigned long adt7410_platform_data[2] = {2199IRQ_PG4, IRQF_TRIGGER_LOW,2200};2201#endif22022203#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)2204/* INT bound temperature alarm event. line 1 */2205static unsigned long adt7316_i2c_data[2] = {2206IRQF_TRIGGER_LOW, /* interrupt flags */2207GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */2208};2209#endif22102211static struct i2c_board_info __initdata bfin_i2c_board_info[] = {2212#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)2213{2214I2C_BOARD_INFO("ad1937", 0x04),2215},2216#endif22172218#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)2219{2220I2C_BOARD_INFO("adav803", 0x10),2221},2222#endif22232224#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)2225{2226I2C_BOARD_INFO("ad7142_captouch", 0x2C),2227.irq = IRQ_PG5,2228.platform_data = (void *)&ad7142_i2c_platform_data,2229},2230#endif22312232#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)2233{2234I2C_BOARD_INFO("ad7150", 0x48),2235.irq = IRQ_PG5, /* fixme: use real interrupt number */2236},2237#endif22382239#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)2240{2241I2C_BOARD_INFO("ad7152", 0x48),2242},2243#endif22442245#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)2246{2247I2C_BOARD_INFO("ad774x", 0x48),2248},2249#endif22502251#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)2252{2253I2C_BOARD_INFO("ad7414", 0x9),2254.irq = IRQ_PG5,2255.irq_flags = IRQF_TRIGGER_LOW,2256},2257#endif22582259#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)2260{2261I2C_BOARD_INFO("ad7417", 0xb),2262.irq = IRQ_PG5,2263.irq_flags = IRQF_TRIGGER_LOW,2264.platform_data = (void *)GPIO_PF4,2265},2266#endif22672268#if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)2269{2270I2C_BOARD_INFO("ade7854", 0x38),2271},2272#endif22732274#if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)2275{2276I2C_BOARD_INFO("adt75", 0x9),2277.irq = IRQ_PG5,2278.irq_flags = IRQF_TRIGGER_LOW,2279},2280#endif22812282#if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)2283{2284I2C_BOARD_INFO("adt7408", 0x18),2285.irq = IRQ_PG5,2286.irq_flags = IRQF_TRIGGER_LOW,2287},2288#endif22892290#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)2291{2292I2C_BOARD_INFO("adt7410", 0x48),2293/* CT critical temperature event. line 0 */2294.irq = IRQ_PG5,2295.irq_flags = IRQF_TRIGGER_LOW,2296.platform_data = (void *)&adt7410_platform_data,2297},2298#endif22992300#if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)2301{2302I2C_BOARD_INFO("ad7291", 0x20),2303.irq = IRQ_PG5,2304.irq_flags = IRQF_TRIGGER_LOW,2305},2306#endif23072308#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)2309{2310I2C_BOARD_INFO("adt7316", 0x48),2311.irq = IRQ_PG6,2312.platform_data = (void *)&adt7316_i2c_data,2313},2314#endif23152316#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)2317{2318I2C_BOARD_INFO("pcf8574_lcd", 0x22),2319},2320#endif2321#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)2322{2323I2C_BOARD_INFO("pcf8574_keypad", 0x27),2324.irq = IRQ_PG6,2325},2326#endif2327#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)2328{2329I2C_BOARD_INFO("ad7879", 0x2F),2330.irq = IRQ_PG5,2331.platform_data = (void *)&bfin_ad7879_ts_info,2332},2333#endif2334#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)2335{2336I2C_BOARD_INFO("adp5588-keys", 0x34),2337.irq = IRQ_PG0,2338.platform_data = (void *)&adp5588_kpad_data,2339},2340#endif2341#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)2342{2343I2C_BOARD_INFO("pmic-adp5520", 0x32),2344.irq = IRQ_PG0,2345.platform_data = (void *)&adp5520_pdev_data,2346},2347#endif2348#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)2349{2350I2C_BOARD_INFO("adxl34x", 0x53),2351.irq = IRQ_PG3,2352.platform_data = (void *)&adxl34x_info,2353},2354#endif2355#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)2356{2357I2C_BOARD_INFO("adp5588-gpio", 0x34),2358.platform_data = (void *)&adp5588_gpio_data,2359},2360#endif2361#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)2362{2363I2C_BOARD_INFO("bfin-adv7393", 0x2B),2364},2365#endif2366#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)2367{2368I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),2369},2370#endif2371#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)2372{2373I2C_BOARD_INFO("adp8870", 0x2B),2374.platform_data = (void *)&adp8870_pdata,2375},2376#endif2377#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)2378{2379I2C_BOARD_INFO("adau1371", 0x1A),2380},2381#endif2382#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)2383{2384I2C_BOARD_INFO("adau1761", 0x38),2385},2386#endif2387#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)2388{2389I2C_BOARD_INFO("adau1361", 0x38),2390},2391#endif2392#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)2393{2394I2C_BOARD_INFO("ad5258", 0x18),2395},2396#endif2397#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)2398{2399I2C_BOARD_INFO("ssm2602", 0x1b),2400},2401#endif2402#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)2403{2404I2C_BOARD_INFO("ad5398", 0xC),2405.platform_data = (void *)&ad5398_regulator_data,2406},2407#endif2408#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)2409{2410I2C_BOARD_INFO("adp8860", 0x2A),2411.platform_data = (void *)&adp8860_pdata,2412},2413#endif2414#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)2415{2416I2C_BOARD_INFO("adau1373", 0x1A),2417},2418#endif2419#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)2420{2421I2C_BOARD_INFO("ad5252", 0x2e),2422},2423#endif2424};24252426#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)2427#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART2428static struct resource bfin_sport0_uart_resources[] = {2429{2430.start = SPORT0_TCR1,2431.end = SPORT0_MRCS3+4,2432.flags = IORESOURCE_MEM,2433},2434{2435.start = IRQ_SPORT0_RX,2436.end = IRQ_SPORT0_RX+1,2437.flags = IORESOURCE_IRQ,2438},2439{2440.start = IRQ_SPORT0_ERROR,2441.end = IRQ_SPORT0_ERROR,2442.flags = IORESOURCE_IRQ,2443},2444};24452446static unsigned short bfin_sport0_peripherals[] = {2447P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,2448P_SPORT0_DRPRI, P_SPORT0_RSCLK, 02449};24502451static struct platform_device bfin_sport0_uart_device = {2452.name = "bfin-sport-uart",2453.id = 0,2454.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),2455.resource = bfin_sport0_uart_resources,2456.dev = {2457.platform_data = &bfin_sport0_peripherals, /* Passed to driver */2458},2459};2460#endif2461#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART2462static struct resource bfin_sport1_uart_resources[] = {2463{2464.start = SPORT1_TCR1,2465.end = SPORT1_MRCS3+4,2466.flags = IORESOURCE_MEM,2467},2468{2469.start = IRQ_SPORT1_RX,2470.end = IRQ_SPORT1_RX+1,2471.flags = IORESOURCE_IRQ,2472},2473{2474.start = IRQ_SPORT1_ERROR,2475.end = IRQ_SPORT1_ERROR,2476.flags = IORESOURCE_IRQ,2477},2478};24792480static unsigned short bfin_sport1_peripherals[] = {2481P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,2482P_SPORT1_DRPRI, P_SPORT1_RSCLK, 02483};24842485static struct platform_device bfin_sport1_uart_device = {2486.name = "bfin-sport-uart",2487.id = 1,2488.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),2489.resource = bfin_sport1_uart_resources,2490.dev = {2491.platform_data = &bfin_sport1_peripherals, /* Passed to driver */2492},2493};2494#endif2495#endif24962497#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)2498#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE2499/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */25002501#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE2502#define PATA_INT IRQ_PF52503static struct pata_platform_info bfin_pata_platform_data = {2504.ioport_shift = 1,2505.irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,2506};25072508static struct resource bfin_pata_resources[] = {2509{2510.start = 0x20314020,2511.end = 0x2031403F,2512.flags = IORESOURCE_MEM,2513},2514{2515.start = 0x2031401C,2516.end = 0x2031401F,2517.flags = IORESOURCE_MEM,2518},2519{2520.start = PATA_INT,2521.end = PATA_INT,2522.flags = IORESOURCE_IRQ,2523},2524};2525#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)2526static struct pata_platform_info bfin_pata_platform_data = {2527.ioport_shift = 0,2528};2529/* CompactFlash Storage Card Memory Mapped Addressing2530* /REG = A11 = 12531*/2532static struct resource bfin_pata_resources[] = {2533{2534.start = 0x20211800,2535.end = 0x20211807,2536.flags = IORESOURCE_MEM,2537},2538{2539.start = 0x2021180E, /* Device Ctl */2540.end = 0x2021180E,2541.flags = IORESOURCE_MEM,2542},2543};2544#endif25452546static struct platform_device bfin_pata_device = {2547.name = "pata_platform",2548.id = -1,2549.num_resources = ARRAY_SIZE(bfin_pata_resources),2550.resource = bfin_pata_resources,2551.dev = {2552.platform_data = &bfin_pata_platform_data,2553}2554};2555#endif25562557static const unsigned int cclk_vlev_datasheet[] =2558{2559VRPAIR(VLEV_085, 250000000),2560VRPAIR(VLEV_090, 376000000),2561VRPAIR(VLEV_095, 426000000),2562VRPAIR(VLEV_100, 426000000),2563VRPAIR(VLEV_105, 476000000),2564VRPAIR(VLEV_110, 476000000),2565VRPAIR(VLEV_115, 476000000),2566VRPAIR(VLEV_120, 500000000),2567VRPAIR(VLEV_125, 533000000),2568VRPAIR(VLEV_130, 600000000),2569};25702571static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {2572.tuple_tab = cclk_vlev_datasheet,2573.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),2574.vr_settling_time = 25 /* us */,2575};25762577static struct platform_device bfin_dpmc = {2578.name = "bfin dpmc",2579.dev = {2580.platform_data = &bfin_dmpc_vreg_data,2581},2582};25832584#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \2585defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \2586defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)25872588#define SPORT_REQ(x) \2589[x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \2590P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}25912592static const u16 bfin_snd_pin[][7] = {2593SPORT_REQ(0),2594SPORT_REQ(1),2595};25962597static struct bfin_snd_platform_data bfin_snd_data[] = {2598{2599.pin_req = &bfin_snd_pin[0][0],2600},2601{2602.pin_req = &bfin_snd_pin[1][0],2603},2604};26052606#define BFIN_SND_RES(x) \2607[x] = { \2608{ \2609.start = SPORT##x##_TCR1, \2610.end = SPORT##x##_TCR1, \2611.flags = IORESOURCE_MEM \2612}, \2613{ \2614.start = CH_SPORT##x##_RX, \2615.end = CH_SPORT##x##_RX, \2616.flags = IORESOURCE_DMA, \2617}, \2618{ \2619.start = CH_SPORT##x##_TX, \2620.end = CH_SPORT##x##_TX, \2621.flags = IORESOURCE_DMA, \2622}, \2623{ \2624.start = IRQ_SPORT##x##_ERROR, \2625.end = IRQ_SPORT##x##_ERROR, \2626.flags = IORESOURCE_IRQ, \2627} \2628}26292630static struct resource bfin_snd_resources[][4] = {2631BFIN_SND_RES(0),2632BFIN_SND_RES(1),2633};26342635static struct platform_device bfin_pcm = {2636.name = "bfin-pcm-audio",2637.id = -1,2638};2639#endif26402641#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)2642static struct platform_device bfin_ad73311_codec_device = {2643.name = "ad73311",2644.id = -1,2645};2646#endif26472648#if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)2649static struct platform_device bfin_i2s = {2650.name = "bfin-i2s",2651.id = CONFIG_SND_BF5XX_SPORT_NUM,2652.num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),2653.resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],2654.dev = {2655.platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],2656},2657};2658#endif26592660#if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)2661static struct platform_device bfin_tdm = {2662.name = "bfin-tdm",2663.id = CONFIG_SND_BF5XX_SPORT_NUM,2664.num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),2665.resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],2666.dev = {2667.platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],2668},2669};2670#endif26712672#if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)2673static struct platform_device bfin_ac97 = {2674.name = "bfin-ac97",2675.id = CONFIG_SND_BF5XX_SPORT_NUM,2676.num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),2677.resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],2678.dev = {2679.platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],2680},2681};2682#endif26832684#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)2685#define REGULATOR_ADP122 "adp122"2686#define REGULATOR_ADP122_UV 250000026872688static struct regulator_consumer_supply adp122_consumers = {2689.supply = REGULATOR_ADP122,2690};26912692static struct regulator_init_data adp_switch_regulator_data = {2693.constraints = {2694.name = REGULATOR_ADP122,2695.valid_ops_mask = REGULATOR_CHANGE_STATUS,2696.min_uV = REGULATOR_ADP122_UV,2697.max_uV = REGULATOR_ADP122_UV,2698.min_uA = 0,2699.max_uA = 300000,2700},2701.num_consumer_supplies = 1, /* only 1 */2702.consumer_supplies = &adp122_consumers,2703};27042705static struct fixed_voltage_config adp_switch_pdata = {2706.supply_name = REGULATOR_ADP122,2707.microvolts = REGULATOR_ADP122_UV,2708.gpio = GPIO_PF2,2709.enable_high = 1,2710.enabled_at_boot = 0,2711.init_data = &adp_switch_regulator_data,2712};27132714static struct platform_device adp_switch_device = {2715.name = "reg-fixed-voltage",2716.id = 0,2717.dev = {2718.platform_data = &adp_switch_pdata,2719},2720};27212722#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \2723defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)2724static struct regulator_bulk_data adp122_bulk_data = {2725.supply = REGULATOR_ADP122,2726};27272728static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {2729.name = REGULATOR_ADP122,2730.num_supplies = 1,2731.supplies = &adp122_bulk_data,2732};27332734static struct platform_device adp122_userspace_consumer_device = {2735.name = "reg-userspace-consumer",2736.id = 0,2737.dev = {2738.platform_data = &adp122_userspace_comsumer_data,2739},2740};2741#endif2742#endif27432744#if defined(CONFIG_IIO_GPIO_TRIGGER) || \2745defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)27462747static struct resource iio_gpio_trigger_resources[] = {2748[0] = {2749.start = IRQ_PF5,2750.end = IRQ_PF5,2751.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,2752},2753};27542755static struct platform_device iio_gpio_trigger = {2756.name = "iio_gpio_trigger",2757.num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),2758.resource = iio_gpio_trigger_resources,2759};2760#endif27612762static struct platform_device *stamp_devices[] __initdata = {27632764&bfin_dpmc,27652766#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)2767&bfin_pcmcia_cf_device,2768#endif27692770#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)2771&rtc_device,2772#endif27732774#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)2775&sl811_hcd_device,2776#endif27772778#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)2779&isp1362_hcd_device,2780#endif27812782#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)2783&bfin_isp1760_device,2784#endif27852786#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)2787&smc91x_device,2788#endif27892790#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)2791&dm9000_device,2792#endif27932794#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)2795&bfin_can_device,2796#endif27972798#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)2799&bfin_mii_bus,2800&bfin_mac_device,2801#endif28022803#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)2804&net2272_bfin_device,2805#endif28062807#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)2808&bfin_spi0_device,2809#endif28102811#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)2812&bfin_sport_spi0_device,2813&bfin_sport_spi1_device,2814#endif28152816#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)2817&bfin_fb_device,2818#endif28192820#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)2821&bfin_lq035q1_device,2822#endif28232824#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)2825#ifdef CONFIG_SERIAL_BFIN_UART02826&bfin_uart0_device,2827#endif2828#ifdef CONFIG_SERIAL_BFIN_UART12829&bfin_uart1_device,2830#endif2831#endif28322833#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)2834#ifdef CONFIG_BFIN_SIR02835&bfin_sir0_device,2836#endif2837#ifdef CONFIG_BFIN_SIR12838&bfin_sir1_device,2839#endif2840#endif28412842#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)2843&i2c_bfin_twi_device,2844#endif28452846#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)2847#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART2848&bfin_sport0_uart_device,2849#endif2850#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART2851&bfin_sport1_uart_device,2852#endif2853#endif28542855#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)2856&bfin_pata_device,2857#endif28582859#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)2860&bfin_device_gpiokeys,2861#endif28622863#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)2864&bfin_async_nand_device,2865#endif28662867#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)2868&stamp_flash_device,2869#endif28702871#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \2872defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \2873defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)2874&bfin_pcm,2875#endif28762877#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)2878&bfin_ad73311_codec_device,2879#endif28802881#if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)2882&bfin_i2s,2883#endif28842885#if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)2886&bfin_tdm,2887#endif28882889#if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)2890&bfin_ac97,2891#endif28922893#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)2894#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \2895defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)2896&ad5398_virt_consumer_device,2897#endif2898#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \2899defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)2900&ad5398_userspace_consumer_device,2901#endif2902#endif29032904#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)2905&adp_switch_device,2906#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \2907defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)2908&adp122_userspace_consumer_device,2909#endif2910#endif29112912#if defined(CONFIG_IIO_GPIO_TRIGGER) || \2913defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)2914&iio_gpio_trigger,2915#endif2916};29172918static int __init stamp_init(void)2919{2920printk(KERN_INFO "%s(): registering device resources\n", __func__);2921bfin_plat_nand_init();2922adf702x_mac_init();2923platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));2924i2c_register_board_info(0, bfin_i2c_board_info,2925ARRAY_SIZE(bfin_i2c_board_info));2926spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));29272928return 0;2929}29302931arch_initcall(stamp_init);293229332934static struct platform_device *stamp_early_devices[] __initdata = {2935#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)2936#ifdef CONFIG_SERIAL_BFIN_UART02937&bfin_uart0_device,2938#endif2939#ifdef CONFIG_SERIAL_BFIN_UART12940&bfin_uart1_device,2941#endif2942#endif29432944#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)2945#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART2946&bfin_sport0_uart_device,2947#endif2948#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART2949&bfin_sport1_uart_device,2950#endif2951#endif2952};29532954void __init native_machine_early_platform_add_devices(void)2955{2956printk(KERN_INFO "register early platform devices\n");2957early_platform_add_devices(stamp_early_devices,2958ARRAY_SIZE(stamp_early_devices));2959}29602961void native_machine_restart(char *cmd)2962{2963/* workaround reboot hang when booting from SPI */2964if ((bfin_read_SYSCR() & 0x7) == 0x3)2965bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);2966}29672968/*2969* Currently the MAC address is saved in Flash by U-Boot2970*/2971#define FLASH_MAC 0x203f00002972void bfin_get_ether_addr(char *addr)2973{2974*(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);2975*(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);2976}2977EXPORT_SYMBOL(bfin_get_ether_addr);297829792980