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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/blackfin/mach-bf537/boards/tcm_bf537.c
15112 views
1
/*
2
* Copyright 2004-2009 Analog Devices Inc.
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* 2008-2009 Bluetechnix
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* 2005 National ICT Australia (NICTA)
5
* Aidan Williams <[email protected]>
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*
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* Licensed under the GPL-2 or later.
8
*/
9
10
#include <linux/device.h>
11
#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
14
#include <linux/mtd/partitions.h>
15
#include <linux/mtd/physmap.h>
16
#include <linux/spi/spi.h>
17
#include <linux/spi/flash.h>
18
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19
#include <linux/usb/isp1362.h>
20
#endif
21
#include <linux/ata_platform.h>
22
#include <linux/irq.h>
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#include <asm/dma.h>
24
#include <asm/bfin5xx_spi.h>
25
#include <asm/portmux.h>
26
#include <asm/dpmc.h>
27
#include <linux/spi/mmc_spi.h>
28
29
/*
30
* Name the Board for the /proc/cpuinfo
31
*/
32
const char bfin_board_name[] = "Bluetechnix TCM BF537";
33
34
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
35
/* all SPI peripherals info goes here */
36
37
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
38
static struct mtd_partition bfin_spi_flash_partitions[] = {
39
{
40
.name = "bootloader(spi)",
41
.size = 0x00020000,
42
.offset = 0,
43
.mask_flags = MTD_CAP_ROM
44
}, {
45
.name = "linux kernel(spi)",
46
.size = 0xe0000,
47
.offset = 0x20000
48
}, {
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.name = "file system(spi)",
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.size = 0x700000,
51
.offset = 0x00100000,
52
}
53
};
54
55
static struct flash_platform_data bfin_spi_flash_data = {
56
.name = "m25p80",
57
.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
60
};
61
62
/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
64
.enable_dma = 0, /* use dma transfer with this chip*/
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.bits_per_word = 8,
66
};
67
#endif
68
69
#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
70
/* SPI ADC chip */
71
static struct bfin5xx_spi_chip spi_adc_chip_info = {
72
.enable_dma = 1, /* use dma transfer with this chip*/
73
.bits_per_word = 16,
74
};
75
#endif
76
77
#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
78
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79
.enable_dma = 0,
80
.bits_per_word = 16,
81
};
82
#endif
83
84
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
85
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
86
.enable_dma = 0,
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.bits_per_word = 8,
88
};
89
#endif
90
91
static struct spi_board_info bfin_spi_board_info[] __initdata = {
92
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
93
{
94
/* the modalias must be the same as spi device driver name */
95
.modalias = "m25p80", /* Name of spi_driver for this device */
96
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
98
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
99
.platform_data = &bfin_spi_flash_data,
100
.controller_data = &spi_flash_chip_info,
101
.mode = SPI_MODE_3,
102
},
103
#endif
104
105
#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
106
{
107
.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
108
.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
109
.bus_num = 0, /* Framework bus number */
110
.chip_select = 1, /* Framework chip select. */
111
.platform_data = NULL, /* No spi_driver specific config */
112
.controller_data = &spi_adc_chip_info,
113
},
114
#endif
115
116
#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
117
{
118
.modalias = "ad183x",
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.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
120
.bus_num = 0,
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.chip_select = 4,
122
.controller_data = &ad1836_spi_chip_info,
123
},
124
#endif
125
126
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
127
{
128
.modalias = "mmc_spi",
129
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
130
.bus_num = 0,
131
.chip_select = 1,
132
.controller_data = &mmc_spi_chip_info,
133
.mode = SPI_MODE_3,
134
},
135
#endif
136
};
137
138
/* SPI (0) */
139
static struct resource bfin_spi0_resource[] = {
140
[0] = {
141
.start = SPI0_REGBASE,
142
.end = SPI0_REGBASE + 0xFF,
143
.flags = IORESOURCE_MEM,
144
},
145
[1] = {
146
.start = CH_SPI,
147
.end = CH_SPI,
148
.flags = IORESOURCE_DMA,
149
},
150
[2] = {
151
.start = IRQ_SPI,
152
.end = IRQ_SPI,
153
.flags = IORESOURCE_IRQ,
154
}
155
};
156
157
/* SPI controller data */
158
static struct bfin5xx_spi_master bfin_spi0_info = {
159
.num_chipselect = 8,
160
.enable_dma = 1, /* master has the ability to do dma transfer */
161
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
162
};
163
164
static struct platform_device bfin_spi0_device = {
165
.name = "bfin-spi",
166
.id = 0, /* Bus number */
167
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
168
.resource = bfin_spi0_resource,
169
.dev = {
170
.platform_data = &bfin_spi0_info, /* Passed to driver */
171
},
172
};
173
#endif /* spi master and devices */
174
175
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
176
static struct platform_device rtc_device = {
177
.name = "rtc-bfin",
178
.id = -1,
179
};
180
#endif
181
182
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
183
static struct platform_device hitachi_fb_device = {
184
.name = "hitachi-tx09",
185
};
186
#endif
187
188
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
189
#include <linux/smc91x.h>
190
191
static struct smc91x_platdata smc91x_info = {
192
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
193
.leda = RPC_LED_100_10,
194
.ledb = RPC_LED_TX_RX,
195
};
196
197
static struct resource smc91x_resources[] = {
198
{
199
.start = 0x20200300,
200
.end = 0x20200300 + 16,
201
.flags = IORESOURCE_MEM,
202
}, {
203
.start = IRQ_PF14,
204
.end = IRQ_PF14,
205
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
206
},
207
};
208
209
static struct platform_device smc91x_device = {
210
.name = "smc91x",
211
.id = 0,
212
.num_resources = ARRAY_SIZE(smc91x_resources),
213
.resource = smc91x_resources,
214
.dev = {
215
.platform_data = &smc91x_info,
216
},
217
};
218
#endif
219
220
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
221
static struct resource isp1362_hcd_resources[] = {
222
{
223
.start = 0x20308000,
224
.end = 0x20308000,
225
.flags = IORESOURCE_MEM,
226
}, {
227
.start = 0x20308004,
228
.end = 0x20308004,
229
.flags = IORESOURCE_MEM,
230
}, {
231
.start = IRQ_PG15,
232
.end = IRQ_PG15,
233
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
234
},
235
};
236
237
static struct isp1362_platform_data isp1362_priv = {
238
.sel15Kres = 1,
239
.clknotstop = 0,
240
.oc_enable = 0,
241
.int_act_high = 0,
242
.int_edge_triggered = 0,
243
.remote_wakeup_connected = 0,
244
.no_power_switching = 1,
245
.power_switching_mode = 0,
246
};
247
248
static struct platform_device isp1362_hcd_device = {
249
.name = "isp1362-hcd",
250
.id = 0,
251
.dev = {
252
.platform_data = &isp1362_priv,
253
},
254
.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
255
.resource = isp1362_hcd_resources,
256
};
257
#endif
258
259
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
260
static struct resource net2272_bfin_resources[] = {
261
{
262
.start = 0x20300000,
263
.end = 0x20300000 + 0x100,
264
.flags = IORESOURCE_MEM,
265
}, {
266
.start = IRQ_PG13,
267
.end = IRQ_PG13,
268
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
269
},
270
};
271
272
static struct platform_device net2272_bfin_device = {
273
.name = "net2272",
274
.id = -1,
275
.num_resources = ARRAY_SIZE(net2272_bfin_resources),
276
.resource = net2272_bfin_resources,
277
};
278
#endif
279
280
#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
281
static struct mtd_partition cm_partitions[] = {
282
{
283
.name = "bootloader(nor)",
284
.size = 0x40000,
285
.offset = 0,
286
}, {
287
.name = "linux kernel(nor)",
288
.size = 0x100000,
289
.offset = MTDPART_OFS_APPEND,
290
}, {
291
.name = "file system(nor)",
292
.size = MTDPART_SIZ_FULL,
293
.offset = MTDPART_OFS_APPEND,
294
}
295
};
296
297
static struct physmap_flash_data cm_flash_data = {
298
.width = 2,
299
.parts = cm_partitions,
300
.nr_parts = ARRAY_SIZE(cm_partitions),
301
};
302
303
static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
304
305
static struct resource cm_flash_resource[] = {
306
{
307
.name = "cfi_probe",
308
.start = 0x20000000,
309
.end = 0x201fffff,
310
.flags = IORESOURCE_MEM,
311
}, {
312
.start = (unsigned long)cm_flash_gpios,
313
.end = ARRAY_SIZE(cm_flash_gpios),
314
.flags = IORESOURCE_IRQ,
315
}
316
};
317
318
static struct platform_device cm_flash_device = {
319
.name = "gpio-addr-flash",
320
.id = 0,
321
.dev = {
322
.platform_data = &cm_flash_data,
323
},
324
.num_resources = ARRAY_SIZE(cm_flash_resource),
325
.resource = cm_flash_resource,
326
};
327
#endif
328
329
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
330
#ifdef CONFIG_SERIAL_BFIN_UART0
331
static struct resource bfin_uart0_resources[] = {
332
{
333
.start = UART0_THR,
334
.end = UART0_GCTL+2,
335
.flags = IORESOURCE_MEM,
336
},
337
{
338
.start = IRQ_UART0_RX,
339
.end = IRQ_UART0_RX+1,
340
.flags = IORESOURCE_IRQ,
341
},
342
{
343
.start = IRQ_UART0_ERROR,
344
.end = IRQ_UART0_ERROR,
345
.flags = IORESOURCE_IRQ,
346
},
347
{
348
.start = CH_UART0_TX,
349
.end = CH_UART0_TX,
350
.flags = IORESOURCE_DMA,
351
},
352
{
353
.start = CH_UART0_RX,
354
.end = CH_UART0_RX,
355
.flags = IORESOURCE_DMA,
356
},
357
};
358
359
static unsigned short bfin_uart0_peripherals[] = {
360
P_UART0_TX, P_UART0_RX, 0
361
};
362
363
static struct platform_device bfin_uart0_device = {
364
.name = "bfin-uart",
365
.id = 0,
366
.num_resources = ARRAY_SIZE(bfin_uart0_resources),
367
.resource = bfin_uart0_resources,
368
.dev = {
369
.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
370
},
371
};
372
#endif
373
#ifdef CONFIG_SERIAL_BFIN_UART1
374
static struct resource bfin_uart1_resources[] = {
375
{
376
.start = UART1_THR,
377
.end = UART1_GCTL+2,
378
.flags = IORESOURCE_MEM,
379
},
380
{
381
.start = IRQ_UART1_RX,
382
.end = IRQ_UART1_RX+1,
383
.flags = IORESOURCE_IRQ,
384
},
385
{
386
.start = IRQ_UART1_ERROR,
387
.end = IRQ_UART1_ERROR,
388
.flags = IORESOURCE_IRQ,
389
},
390
{
391
.start = CH_UART1_TX,
392
.end = CH_UART1_TX,
393
.flags = IORESOURCE_DMA,
394
},
395
{
396
.start = CH_UART1_RX,
397
.end = CH_UART1_RX,
398
.flags = IORESOURCE_DMA,
399
},
400
};
401
402
static unsigned short bfin_uart1_peripherals[] = {
403
P_UART1_TX, P_UART1_RX, 0
404
};
405
406
static struct platform_device bfin_uart1_device = {
407
.name = "bfin-uart",
408
.id = 1,
409
.num_resources = ARRAY_SIZE(bfin_uart1_resources),
410
.resource = bfin_uart1_resources,
411
.dev = {
412
.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
413
},
414
};
415
#endif
416
#endif
417
418
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
419
#ifdef CONFIG_BFIN_SIR0
420
static struct resource bfin_sir0_resources[] = {
421
{
422
.start = 0xFFC00400,
423
.end = 0xFFC004FF,
424
.flags = IORESOURCE_MEM,
425
},
426
{
427
.start = IRQ_UART0_RX,
428
.end = IRQ_UART0_RX+1,
429
.flags = IORESOURCE_IRQ,
430
},
431
{
432
.start = CH_UART0_RX,
433
.end = CH_UART0_RX+1,
434
.flags = IORESOURCE_DMA,
435
},
436
};
437
438
static struct platform_device bfin_sir0_device = {
439
.name = "bfin_sir",
440
.id = 0,
441
.num_resources = ARRAY_SIZE(bfin_sir0_resources),
442
.resource = bfin_sir0_resources,
443
};
444
#endif
445
#ifdef CONFIG_BFIN_SIR1
446
static struct resource bfin_sir1_resources[] = {
447
{
448
.start = 0xFFC02000,
449
.end = 0xFFC020FF,
450
.flags = IORESOURCE_MEM,
451
},
452
{
453
.start = IRQ_UART1_RX,
454
.end = IRQ_UART1_RX+1,
455
.flags = IORESOURCE_IRQ,
456
},
457
{
458
.start = CH_UART1_RX,
459
.end = CH_UART1_RX+1,
460
.flags = IORESOURCE_DMA,
461
},
462
};
463
464
static struct platform_device bfin_sir1_device = {
465
.name = "bfin_sir",
466
.id = 1,
467
.num_resources = ARRAY_SIZE(bfin_sir1_resources),
468
.resource = bfin_sir1_resources,
469
};
470
#endif
471
#endif
472
473
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
474
static struct resource bfin_twi0_resource[] = {
475
[0] = {
476
.start = TWI0_REGBASE,
477
.end = TWI0_REGBASE,
478
.flags = IORESOURCE_MEM,
479
},
480
[1] = {
481
.start = IRQ_TWI,
482
.end = IRQ_TWI,
483
.flags = IORESOURCE_IRQ,
484
},
485
};
486
487
static struct platform_device i2c_bfin_twi_device = {
488
.name = "i2c-bfin-twi",
489
.id = 0,
490
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
491
.resource = bfin_twi0_resource,
492
};
493
#endif
494
495
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
496
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
497
static struct resource bfin_sport0_uart_resources[] = {
498
{
499
.start = SPORT0_TCR1,
500
.end = SPORT0_MRCS3+4,
501
.flags = IORESOURCE_MEM,
502
},
503
{
504
.start = IRQ_SPORT0_RX,
505
.end = IRQ_SPORT0_RX+1,
506
.flags = IORESOURCE_IRQ,
507
},
508
{
509
.start = IRQ_SPORT0_ERROR,
510
.end = IRQ_SPORT0_ERROR,
511
.flags = IORESOURCE_IRQ,
512
},
513
};
514
515
static unsigned short bfin_sport0_peripherals[] = {
516
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
517
P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
518
};
519
520
static struct platform_device bfin_sport0_uart_device = {
521
.name = "bfin-sport-uart",
522
.id = 0,
523
.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
524
.resource = bfin_sport0_uart_resources,
525
.dev = {
526
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
527
},
528
};
529
#endif
530
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
531
static struct resource bfin_sport1_uart_resources[] = {
532
{
533
.start = SPORT1_TCR1,
534
.end = SPORT1_MRCS3+4,
535
.flags = IORESOURCE_MEM,
536
},
537
{
538
.start = IRQ_SPORT1_RX,
539
.end = IRQ_SPORT1_RX+1,
540
.flags = IORESOURCE_IRQ,
541
},
542
{
543
.start = IRQ_SPORT1_ERROR,
544
.end = IRQ_SPORT1_ERROR,
545
.flags = IORESOURCE_IRQ,
546
},
547
};
548
549
static unsigned short bfin_sport1_peripherals[] = {
550
P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
551
P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
552
};
553
554
static struct platform_device bfin_sport1_uart_device = {
555
.name = "bfin-sport-uart",
556
.id = 1,
557
.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
558
.resource = bfin_sport1_uart_resources,
559
.dev = {
560
.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
561
},
562
};
563
#endif
564
#endif
565
566
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
567
#include <linux/bfin_mac.h>
568
static const unsigned short bfin_mac_peripherals[] = P_MII0;
569
570
static struct bfin_phydev_platform_data bfin_phydev_data[] = {
571
{
572
.addr = 1,
573
.irq = IRQ_MAC_PHYINT,
574
},
575
};
576
577
static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
578
.phydev_number = 1,
579
.phydev_data = bfin_phydev_data,
580
.phy_mode = PHY_INTERFACE_MODE_MII,
581
.mac_peripherals = bfin_mac_peripherals,
582
};
583
584
static struct platform_device bfin_mii_bus = {
585
.name = "bfin_mii_bus",
586
.dev = {
587
.platform_data = &bfin_mii_bus_data,
588
}
589
};
590
591
static struct platform_device bfin_mac_device = {
592
.name = "bfin_mac",
593
.dev = {
594
.platform_data = &bfin_mii_bus,
595
}
596
};
597
#endif
598
599
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
600
#define PATA_INT IRQ_PF14
601
602
static struct pata_platform_info bfin_pata_platform_data = {
603
.ioport_shift = 2,
604
.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
605
};
606
607
static struct resource bfin_pata_resources[] = {
608
{
609
.start = 0x2030C000,
610
.end = 0x2030C01F,
611
.flags = IORESOURCE_MEM,
612
},
613
{
614
.start = 0x2030D018,
615
.end = 0x2030D01B,
616
.flags = IORESOURCE_MEM,
617
},
618
{
619
.start = PATA_INT,
620
.end = PATA_INT,
621
.flags = IORESOURCE_IRQ,
622
},
623
};
624
625
static struct platform_device bfin_pata_device = {
626
.name = "pata_platform",
627
.id = -1,
628
.num_resources = ARRAY_SIZE(bfin_pata_resources),
629
.resource = bfin_pata_resources,
630
.dev = {
631
.platform_data = &bfin_pata_platform_data,
632
}
633
};
634
#endif
635
636
static const unsigned int cclk_vlev_datasheet[] =
637
{
638
VRPAIR(VLEV_085, 250000000),
639
VRPAIR(VLEV_090, 376000000),
640
VRPAIR(VLEV_095, 426000000),
641
VRPAIR(VLEV_100, 426000000),
642
VRPAIR(VLEV_105, 476000000),
643
VRPAIR(VLEV_110, 476000000),
644
VRPAIR(VLEV_115, 476000000),
645
VRPAIR(VLEV_120, 500000000),
646
VRPAIR(VLEV_125, 533000000),
647
VRPAIR(VLEV_130, 600000000),
648
};
649
650
static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
651
.tuple_tab = cclk_vlev_datasheet,
652
.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
653
.vr_settling_time = 25 /* us */,
654
};
655
656
static struct platform_device bfin_dpmc = {
657
.name = "bfin dpmc",
658
.dev = {
659
.platform_data = &bfin_dmpc_vreg_data,
660
},
661
};
662
663
static struct platform_device *cm_bf537_devices[] __initdata = {
664
665
&bfin_dpmc,
666
667
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
668
&hitachi_fb_device,
669
#endif
670
671
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
672
&rtc_device,
673
#endif
674
675
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
676
#ifdef CONFIG_SERIAL_BFIN_UART0
677
&bfin_uart0_device,
678
#endif
679
#ifdef CONFIG_SERIAL_BFIN_UART1
680
&bfin_uart1_device,
681
#endif
682
#endif
683
684
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
685
#ifdef CONFIG_BFIN_SIR0
686
&bfin_sir0_device,
687
#endif
688
#ifdef CONFIG_BFIN_SIR1
689
&bfin_sir1_device,
690
#endif
691
#endif
692
693
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
694
&i2c_bfin_twi_device,
695
#endif
696
697
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
698
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
699
&bfin_sport0_uart_device,
700
#endif
701
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
702
&bfin_sport1_uart_device,
703
#endif
704
#endif
705
706
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
707
&isp1362_hcd_device,
708
#endif
709
710
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
711
&smc91x_device,
712
#endif
713
714
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
715
&bfin_mii_bus,
716
&bfin_mac_device,
717
#endif
718
719
#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
720
&net2272_bfin_device,
721
#endif
722
723
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
724
&bfin_spi0_device,
725
#endif
726
727
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
728
&bfin_pata_device,
729
#endif
730
731
#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
732
&cm_flash_device,
733
#endif
734
};
735
736
static int __init tcm_bf537_init(void)
737
{
738
printk(KERN_INFO "%s(): registering device resources\n", __func__);
739
platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
740
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
741
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
742
#endif
743
744
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
745
irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
746
#endif
747
return 0;
748
}
749
750
arch_initcall(tcm_bf537_init);
751
752
static struct platform_device *cm_bf537_early_devices[] __initdata = {
753
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
754
#ifdef CONFIG_SERIAL_BFIN_UART0
755
&bfin_uart0_device,
756
#endif
757
#ifdef CONFIG_SERIAL_BFIN_UART1
758
&bfin_uart1_device,
759
#endif
760
#endif
761
762
#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
763
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
764
&bfin_sport0_uart_device,
765
#endif
766
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
767
&bfin_sport1_uart_device,
768
#endif
769
#endif
770
};
771
772
void __init native_machine_early_platform_add_devices(void)
773
{
774
printk(KERN_INFO "register early platform devices\n");
775
early_platform_add_devices(cm_bf537_early_devices,
776
ARRAY_SIZE(cm_bf537_early_devices));
777
}
778
779
void bfin_get_ether_addr(char *addr)
780
{
781
random_ether_addr(addr);
782
printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
783
}
784
EXPORT_SYMBOL(bfin_get_ether_addr);
785
786