Path: blob/master/arch/blackfin/mach-bf537/boards/tcm_bf537.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2008-2009 Bluetechnix3* 2005 National ICT Australia (NICTA)4* Aidan Williams <[email protected]>5*6* Licensed under the GPL-2 or later.7*/89#include <linux/device.h>10#include <linux/etherdevice.h>11#include <linux/platform_device.h>12#include <linux/mtd/mtd.h>13#include <linux/mtd/partitions.h>14#include <linux/mtd/physmap.h>15#include <linux/spi/spi.h>16#include <linux/spi/flash.h>17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)18#include <linux/usb/isp1362.h>19#endif20#include <linux/ata_platform.h>21#include <linux/irq.h>22#include <asm/dma.h>23#include <asm/bfin5xx_spi.h>24#include <asm/portmux.h>25#include <asm/dpmc.h>26#include <linux/spi/mmc_spi.h>2728/*29* Name the Board for the /proc/cpuinfo30*/31const char bfin_board_name[] = "Bluetechnix TCM BF537";3233#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)34/* all SPI peripherals info goes here */3536#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)37static struct mtd_partition bfin_spi_flash_partitions[] = {38{39.name = "bootloader(spi)",40.size = 0x00020000,41.offset = 0,42.mask_flags = MTD_CAP_ROM43}, {44.name = "linux kernel(spi)",45.size = 0xe0000,46.offset = 0x2000047}, {48.name = "file system(spi)",49.size = 0x700000,50.offset = 0x00100000,51}52};5354static struct flash_platform_data bfin_spi_flash_data = {55.name = "m25p80",56.parts = bfin_spi_flash_partitions,57.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),58.type = "m25p64",59};6061/* SPI flash chip (m25p64) */62static struct bfin5xx_spi_chip spi_flash_chip_info = {63.enable_dma = 0, /* use dma transfer with this chip*/64.bits_per_word = 8,65};66#endif6768#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)69/* SPI ADC chip */70static struct bfin5xx_spi_chip spi_adc_chip_info = {71.enable_dma = 1, /* use dma transfer with this chip*/72.bits_per_word = 16,73};74#endif7576#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)77static struct bfin5xx_spi_chip ad1836_spi_chip_info = {78.enable_dma = 0,79.bits_per_word = 16,80};81#endif8283#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)84static struct bfin5xx_spi_chip mmc_spi_chip_info = {85.enable_dma = 0,86.bits_per_word = 8,87};88#endif8990static struct spi_board_info bfin_spi_board_info[] __initdata = {91#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)92{93/* the modalias must be the same as spi device driver name */94.modalias = "m25p80", /* Name of spi_driver for this device */95.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */96.bus_num = 0, /* Framework bus number */97.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/98.platform_data = &bfin_spi_flash_data,99.controller_data = &spi_flash_chip_info,100.mode = SPI_MODE_3,101},102#endif103104#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)105{106.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */107.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */108.bus_num = 0, /* Framework bus number */109.chip_select = 1, /* Framework chip select. */110.platform_data = NULL, /* No spi_driver specific config */111.controller_data = &spi_adc_chip_info,112},113#endif114115#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)116{117.modalias = "ad183x",118.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */119.bus_num = 0,120.chip_select = 4,121.controller_data = &ad1836_spi_chip_info,122},123#endif124125#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)126{127.modalias = "mmc_spi",128.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */129.bus_num = 0,130.chip_select = 1,131.controller_data = &mmc_spi_chip_info,132.mode = SPI_MODE_3,133},134#endif135};136137/* SPI (0) */138static struct resource bfin_spi0_resource[] = {139[0] = {140.start = SPI0_REGBASE,141.end = SPI0_REGBASE + 0xFF,142.flags = IORESOURCE_MEM,143},144[1] = {145.start = CH_SPI,146.end = CH_SPI,147.flags = IORESOURCE_DMA,148},149[2] = {150.start = IRQ_SPI,151.end = IRQ_SPI,152.flags = IORESOURCE_IRQ,153}154};155156/* SPI controller data */157static struct bfin5xx_spi_master bfin_spi0_info = {158.num_chipselect = 8,159.enable_dma = 1, /* master has the ability to do dma transfer */160.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},161};162163static struct platform_device bfin_spi0_device = {164.name = "bfin-spi",165.id = 0, /* Bus number */166.num_resources = ARRAY_SIZE(bfin_spi0_resource),167.resource = bfin_spi0_resource,168.dev = {169.platform_data = &bfin_spi0_info, /* Passed to driver */170},171};172#endif /* spi master and devices */173174#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)175static struct platform_device rtc_device = {176.name = "rtc-bfin",177.id = -1,178};179#endif180181#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)182static struct platform_device hitachi_fb_device = {183.name = "hitachi-tx09",184};185#endif186187#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)188#include <linux/smc91x.h>189190static struct smc91x_platdata smc91x_info = {191.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,192.leda = RPC_LED_100_10,193.ledb = RPC_LED_TX_RX,194};195196static struct resource smc91x_resources[] = {197{198.start = 0x20200300,199.end = 0x20200300 + 16,200.flags = IORESOURCE_MEM,201}, {202.start = IRQ_PF14,203.end = IRQ_PF14,204.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,205},206};207208static struct platform_device smc91x_device = {209.name = "smc91x",210.id = 0,211.num_resources = ARRAY_SIZE(smc91x_resources),212.resource = smc91x_resources,213.dev = {214.platform_data = &smc91x_info,215},216};217#endif218219#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)220static struct resource isp1362_hcd_resources[] = {221{222.start = 0x20308000,223.end = 0x20308000,224.flags = IORESOURCE_MEM,225}, {226.start = 0x20308004,227.end = 0x20308004,228.flags = IORESOURCE_MEM,229}, {230.start = IRQ_PG15,231.end = IRQ_PG15,232.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,233},234};235236static struct isp1362_platform_data isp1362_priv = {237.sel15Kres = 1,238.clknotstop = 0,239.oc_enable = 0,240.int_act_high = 0,241.int_edge_triggered = 0,242.remote_wakeup_connected = 0,243.no_power_switching = 1,244.power_switching_mode = 0,245};246247static struct platform_device isp1362_hcd_device = {248.name = "isp1362-hcd",249.id = 0,250.dev = {251.platform_data = &isp1362_priv,252},253.num_resources = ARRAY_SIZE(isp1362_hcd_resources),254.resource = isp1362_hcd_resources,255};256#endif257258#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)259static struct resource net2272_bfin_resources[] = {260{261.start = 0x20300000,262.end = 0x20300000 + 0x100,263.flags = IORESOURCE_MEM,264}, {265.start = IRQ_PG13,266.end = IRQ_PG13,267.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,268},269};270271static struct platform_device net2272_bfin_device = {272.name = "net2272",273.id = -1,274.num_resources = ARRAY_SIZE(net2272_bfin_resources),275.resource = net2272_bfin_resources,276};277#endif278279#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)280static struct mtd_partition cm_partitions[] = {281{282.name = "bootloader(nor)",283.size = 0x40000,284.offset = 0,285}, {286.name = "linux kernel(nor)",287.size = 0x100000,288.offset = MTDPART_OFS_APPEND,289}, {290.name = "file system(nor)",291.size = MTDPART_SIZ_FULL,292.offset = MTDPART_OFS_APPEND,293}294};295296static struct physmap_flash_data cm_flash_data = {297.width = 2,298.parts = cm_partitions,299.nr_parts = ARRAY_SIZE(cm_partitions),300};301302static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };303304static struct resource cm_flash_resource[] = {305{306.name = "cfi_probe",307.start = 0x20000000,308.end = 0x201fffff,309.flags = IORESOURCE_MEM,310}, {311.start = (unsigned long)cm_flash_gpios,312.end = ARRAY_SIZE(cm_flash_gpios),313.flags = IORESOURCE_IRQ,314}315};316317static struct platform_device cm_flash_device = {318.name = "gpio-addr-flash",319.id = 0,320.dev = {321.platform_data = &cm_flash_data,322},323.num_resources = ARRAY_SIZE(cm_flash_resource),324.resource = cm_flash_resource,325};326#endif327328#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)329#ifdef CONFIG_SERIAL_BFIN_UART0330static struct resource bfin_uart0_resources[] = {331{332.start = UART0_THR,333.end = UART0_GCTL+2,334.flags = IORESOURCE_MEM,335},336{337.start = IRQ_UART0_RX,338.end = IRQ_UART0_RX+1,339.flags = IORESOURCE_IRQ,340},341{342.start = IRQ_UART0_ERROR,343.end = IRQ_UART0_ERROR,344.flags = IORESOURCE_IRQ,345},346{347.start = CH_UART0_TX,348.end = CH_UART0_TX,349.flags = IORESOURCE_DMA,350},351{352.start = CH_UART0_RX,353.end = CH_UART0_RX,354.flags = IORESOURCE_DMA,355},356};357358static unsigned short bfin_uart0_peripherals[] = {359P_UART0_TX, P_UART0_RX, 0360};361362static struct platform_device bfin_uart0_device = {363.name = "bfin-uart",364.id = 0,365.num_resources = ARRAY_SIZE(bfin_uart0_resources),366.resource = bfin_uart0_resources,367.dev = {368.platform_data = &bfin_uart0_peripherals, /* Passed to driver */369},370};371#endif372#ifdef CONFIG_SERIAL_BFIN_UART1373static struct resource bfin_uart1_resources[] = {374{375.start = UART1_THR,376.end = UART1_GCTL+2,377.flags = IORESOURCE_MEM,378},379{380.start = IRQ_UART1_RX,381.end = IRQ_UART1_RX+1,382.flags = IORESOURCE_IRQ,383},384{385.start = IRQ_UART1_ERROR,386.end = IRQ_UART1_ERROR,387.flags = IORESOURCE_IRQ,388},389{390.start = CH_UART1_TX,391.end = CH_UART1_TX,392.flags = IORESOURCE_DMA,393},394{395.start = CH_UART1_RX,396.end = CH_UART1_RX,397.flags = IORESOURCE_DMA,398},399};400401static unsigned short bfin_uart1_peripherals[] = {402P_UART1_TX, P_UART1_RX, 0403};404405static struct platform_device bfin_uart1_device = {406.name = "bfin-uart",407.id = 1,408.num_resources = ARRAY_SIZE(bfin_uart1_resources),409.resource = bfin_uart1_resources,410.dev = {411.platform_data = &bfin_uart1_peripherals, /* Passed to driver */412},413};414#endif415#endif416417#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)418#ifdef CONFIG_BFIN_SIR0419static struct resource bfin_sir0_resources[] = {420{421.start = 0xFFC00400,422.end = 0xFFC004FF,423.flags = IORESOURCE_MEM,424},425{426.start = IRQ_UART0_RX,427.end = IRQ_UART0_RX+1,428.flags = IORESOURCE_IRQ,429},430{431.start = CH_UART0_RX,432.end = CH_UART0_RX+1,433.flags = IORESOURCE_DMA,434},435};436437static struct platform_device bfin_sir0_device = {438.name = "bfin_sir",439.id = 0,440.num_resources = ARRAY_SIZE(bfin_sir0_resources),441.resource = bfin_sir0_resources,442};443#endif444#ifdef CONFIG_BFIN_SIR1445static struct resource bfin_sir1_resources[] = {446{447.start = 0xFFC02000,448.end = 0xFFC020FF,449.flags = IORESOURCE_MEM,450},451{452.start = IRQ_UART1_RX,453.end = IRQ_UART1_RX+1,454.flags = IORESOURCE_IRQ,455},456{457.start = CH_UART1_RX,458.end = CH_UART1_RX+1,459.flags = IORESOURCE_DMA,460},461};462463static struct platform_device bfin_sir1_device = {464.name = "bfin_sir",465.id = 1,466.num_resources = ARRAY_SIZE(bfin_sir1_resources),467.resource = bfin_sir1_resources,468};469#endif470#endif471472#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)473static struct resource bfin_twi0_resource[] = {474[0] = {475.start = TWI0_REGBASE,476.end = TWI0_REGBASE,477.flags = IORESOURCE_MEM,478},479[1] = {480.start = IRQ_TWI,481.end = IRQ_TWI,482.flags = IORESOURCE_IRQ,483},484};485486static struct platform_device i2c_bfin_twi_device = {487.name = "i2c-bfin-twi",488.id = 0,489.num_resources = ARRAY_SIZE(bfin_twi0_resource),490.resource = bfin_twi0_resource,491};492#endif493494#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)495#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART496static struct resource bfin_sport0_uart_resources[] = {497{498.start = SPORT0_TCR1,499.end = SPORT0_MRCS3+4,500.flags = IORESOURCE_MEM,501},502{503.start = IRQ_SPORT0_RX,504.end = IRQ_SPORT0_RX+1,505.flags = IORESOURCE_IRQ,506},507{508.start = IRQ_SPORT0_ERROR,509.end = IRQ_SPORT0_ERROR,510.flags = IORESOURCE_IRQ,511},512};513514static unsigned short bfin_sport0_peripherals[] = {515P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,516P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0517};518519static struct platform_device bfin_sport0_uart_device = {520.name = "bfin-sport-uart",521.id = 0,522.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),523.resource = bfin_sport0_uart_resources,524.dev = {525.platform_data = &bfin_sport0_peripherals, /* Passed to driver */526},527};528#endif529#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART530static struct resource bfin_sport1_uart_resources[] = {531{532.start = SPORT1_TCR1,533.end = SPORT1_MRCS3+4,534.flags = IORESOURCE_MEM,535},536{537.start = IRQ_SPORT1_RX,538.end = IRQ_SPORT1_RX+1,539.flags = IORESOURCE_IRQ,540},541{542.start = IRQ_SPORT1_ERROR,543.end = IRQ_SPORT1_ERROR,544.flags = IORESOURCE_IRQ,545},546};547548static unsigned short bfin_sport1_peripherals[] = {549P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,550P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0551};552553static struct platform_device bfin_sport1_uart_device = {554.name = "bfin-sport-uart",555.id = 1,556.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),557.resource = bfin_sport1_uart_resources,558.dev = {559.platform_data = &bfin_sport1_peripherals, /* Passed to driver */560},561};562#endif563#endif564565#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)566#include <linux/bfin_mac.h>567static const unsigned short bfin_mac_peripherals[] = P_MII0;568569static struct bfin_phydev_platform_data bfin_phydev_data[] = {570{571.addr = 1,572.irq = IRQ_MAC_PHYINT,573},574};575576static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {577.phydev_number = 1,578.phydev_data = bfin_phydev_data,579.phy_mode = PHY_INTERFACE_MODE_MII,580.mac_peripherals = bfin_mac_peripherals,581};582583static struct platform_device bfin_mii_bus = {584.name = "bfin_mii_bus",585.dev = {586.platform_data = &bfin_mii_bus_data,587}588};589590static struct platform_device bfin_mac_device = {591.name = "bfin_mac",592.dev = {593.platform_data = &bfin_mii_bus,594}595};596#endif597598#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)599#define PATA_INT IRQ_PF14600601static struct pata_platform_info bfin_pata_platform_data = {602.ioport_shift = 2,603.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,604};605606static struct resource bfin_pata_resources[] = {607{608.start = 0x2030C000,609.end = 0x2030C01F,610.flags = IORESOURCE_MEM,611},612{613.start = 0x2030D018,614.end = 0x2030D01B,615.flags = IORESOURCE_MEM,616},617{618.start = PATA_INT,619.end = PATA_INT,620.flags = IORESOURCE_IRQ,621},622};623624static struct platform_device bfin_pata_device = {625.name = "pata_platform",626.id = -1,627.num_resources = ARRAY_SIZE(bfin_pata_resources),628.resource = bfin_pata_resources,629.dev = {630.platform_data = &bfin_pata_platform_data,631}632};633#endif634635static const unsigned int cclk_vlev_datasheet[] =636{637VRPAIR(VLEV_085, 250000000),638VRPAIR(VLEV_090, 376000000),639VRPAIR(VLEV_095, 426000000),640VRPAIR(VLEV_100, 426000000),641VRPAIR(VLEV_105, 476000000),642VRPAIR(VLEV_110, 476000000),643VRPAIR(VLEV_115, 476000000),644VRPAIR(VLEV_120, 500000000),645VRPAIR(VLEV_125, 533000000),646VRPAIR(VLEV_130, 600000000),647};648649static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {650.tuple_tab = cclk_vlev_datasheet,651.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),652.vr_settling_time = 25 /* us */,653};654655static struct platform_device bfin_dpmc = {656.name = "bfin dpmc",657.dev = {658.platform_data = &bfin_dmpc_vreg_data,659},660};661662static struct platform_device *cm_bf537_devices[] __initdata = {663664&bfin_dpmc,665666#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)667&hitachi_fb_device,668#endif669670#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)671&rtc_device,672#endif673674#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)675#ifdef CONFIG_SERIAL_BFIN_UART0676&bfin_uart0_device,677#endif678#ifdef CONFIG_SERIAL_BFIN_UART1679&bfin_uart1_device,680#endif681#endif682683#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)684#ifdef CONFIG_BFIN_SIR0685&bfin_sir0_device,686#endif687#ifdef CONFIG_BFIN_SIR1688&bfin_sir1_device,689#endif690#endif691692#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)693&i2c_bfin_twi_device,694#endif695696#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)697#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART698&bfin_sport0_uart_device,699#endif700#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART701&bfin_sport1_uart_device,702#endif703#endif704705#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)706&isp1362_hcd_device,707#endif708709#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)710&smc91x_device,711#endif712713#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)714&bfin_mii_bus,715&bfin_mac_device,716#endif717718#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)719&net2272_bfin_device,720#endif721722#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)723&bfin_spi0_device,724#endif725726#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)727&bfin_pata_device,728#endif729730#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)731&cm_flash_device,732#endif733};734735static int __init tcm_bf537_init(void)736{737printk(KERN_INFO "%s(): registering device resources\n", __func__);738platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));739#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)740spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));741#endif742743#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)744irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);745#endif746return 0;747}748749arch_initcall(tcm_bf537_init);750751static struct platform_device *cm_bf537_early_devices[] __initdata = {752#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)753#ifdef CONFIG_SERIAL_BFIN_UART0754&bfin_uart0_device,755#endif756#ifdef CONFIG_SERIAL_BFIN_UART1757&bfin_uart1_device,758#endif759#endif760761#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)762#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART763&bfin_sport0_uart_device,764#endif765#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART766&bfin_sport1_uart_device,767#endif768#endif769};770771void __init native_machine_early_platform_add_devices(void)772{773printk(KERN_INFO "register early platform devices\n");774early_platform_add_devices(cm_bf537_early_devices,775ARRAY_SIZE(cm_bf537_early_devices));776}777778void bfin_get_ether_addr(char *addr)779{780random_ether_addr(addr);781printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);782}783EXPORT_SYMBOL(bfin_get_ether_addr);784785786