Path: blob/master/arch/blackfin/mach-bf538/boards/ezkit.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2005 National ICT Australia (NICTA)3* Aidan Williams <[email protected]>4*5* Licensed under the GPL-26*/78#include <linux/device.h>9#include <linux/platform_device.h>10#include <linux/mtd/mtd.h>11#include <linux/mtd/physmap.h>12#include <linux/mtd/partitions.h>13#include <linux/spi/spi.h>14#include <linux/spi/flash.h>15#include <linux/irq.h>16#include <linux/interrupt.h>17#include <asm/bfin5xx_spi.h>18#include <asm/dma.h>19#include <asm/gpio.h>20#include <asm/nand.h>21#include <asm/portmux.h>22#include <asm/dpmc.h>23#include <linux/input.h>2425/*26* Name the Board for the /proc/cpuinfo27*/28const char bfin_board_name[] = "ADI BF538-EZKIT";2930/*31* Driver needs to know address, irq and flag pin.32*/333435#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)36static struct platform_device rtc_device = {37.name = "rtc-bfin",38.id = -1,39};40#endif4142#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)43#ifdef CONFIG_SERIAL_BFIN_UART044static struct resource bfin_uart0_resources[] = {45{46.start = UART0_THR,47.end = UART0_GCTL+2,48.flags = IORESOURCE_MEM,49},50{51.start = IRQ_UART0_RX,52.end = IRQ_UART0_RX+1,53.flags = IORESOURCE_IRQ,54},55{56.start = IRQ_UART0_ERROR,57.end = IRQ_UART0_ERROR,58.flags = IORESOURCE_IRQ,59},60{61.start = CH_UART0_TX,62.end = CH_UART0_TX,63.flags = IORESOURCE_DMA,64},65{66.start = CH_UART0_RX,67.end = CH_UART0_RX,68.flags = IORESOURCE_DMA,69},70#ifdef CONFIG_BFIN_UART0_CTSRTS71{ /* CTS pin */72.start = GPIO_PG7,73.end = GPIO_PG7,74.flags = IORESOURCE_IO,75},76{ /* RTS pin */77.start = GPIO_PG6,78.end = GPIO_PG6,79.flags = IORESOURCE_IO,80},81#endif82};8384static unsigned short bfin_uart0_peripherals[] = {85P_UART0_TX, P_UART0_RX, 086};8788static struct platform_device bfin_uart0_device = {89.name = "bfin-uart",90.id = 0,91.num_resources = ARRAY_SIZE(bfin_uart0_resources),92.resource = bfin_uart0_resources,93.dev = {94.platform_data = &bfin_uart0_peripherals, /* Passed to driver */95},96};97#endif98#ifdef CONFIG_SERIAL_BFIN_UART199static struct resource bfin_uart1_resources[] = {100{101.start = UART1_THR,102.end = UART1_GCTL+2,103.flags = IORESOURCE_MEM,104},105{106.start = IRQ_UART1_RX,107.end = IRQ_UART1_RX+1,108.flags = IORESOURCE_IRQ,109},110{111.start = IRQ_UART1_ERROR,112.end = IRQ_UART1_ERROR,113.flags = IORESOURCE_IRQ,114},115{116.start = CH_UART1_TX,117.end = CH_UART1_TX,118.flags = IORESOURCE_DMA,119},120{121.start = CH_UART1_RX,122.end = CH_UART1_RX,123.flags = IORESOURCE_DMA,124},125};126127static unsigned short bfin_uart1_peripherals[] = {128P_UART1_TX, P_UART1_RX, 0129};130131static struct platform_device bfin_uart1_device = {132.name = "bfin-uart",133.id = 1,134.num_resources = ARRAY_SIZE(bfin_uart1_resources),135.resource = bfin_uart1_resources,136.dev = {137.platform_data = &bfin_uart1_peripherals, /* Passed to driver */138},139};140#endif141#ifdef CONFIG_SERIAL_BFIN_UART2142static struct resource bfin_uart2_resources[] = {143{144.start = UART2_THR,145.end = UART2_GCTL+2,146.flags = IORESOURCE_MEM,147},148{149.start = IRQ_UART2_RX,150.end = IRQ_UART2_RX+1,151.flags = IORESOURCE_IRQ,152},153{154.start = IRQ_UART2_ERROR,155.end = IRQ_UART2_ERROR,156.flags = IORESOURCE_IRQ,157},158{159.start = CH_UART2_TX,160.end = CH_UART2_TX,161.flags = IORESOURCE_DMA,162},163{164.start = CH_UART2_RX,165.end = CH_UART2_RX,166.flags = IORESOURCE_DMA,167},168};169170static unsigned short bfin_uart2_peripherals[] = {171P_UART2_TX, P_UART2_RX, 0172};173174static struct platform_device bfin_uart2_device = {175.name = "bfin-uart",176.id = 2,177.num_resources = ARRAY_SIZE(bfin_uart2_resources),178.resource = bfin_uart2_resources,179.dev = {180.platform_data = &bfin_uart2_peripherals, /* Passed to driver */181},182};183#endif184#endif185186#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)187#ifdef CONFIG_BFIN_SIR0188static struct resource bfin_sir0_resources[] = {189{190.start = 0xFFC00400,191.end = 0xFFC004FF,192.flags = IORESOURCE_MEM,193},194{195.start = IRQ_UART0_RX,196.end = IRQ_UART0_RX+1,197.flags = IORESOURCE_IRQ,198},199{200.start = CH_UART0_RX,201.end = CH_UART0_RX+1,202.flags = IORESOURCE_DMA,203},204};205static struct platform_device bfin_sir0_device = {206.name = "bfin_sir",207.id = 0,208.num_resources = ARRAY_SIZE(bfin_sir0_resources),209.resource = bfin_sir0_resources,210};211#endif212#ifdef CONFIG_BFIN_SIR1213static struct resource bfin_sir1_resources[] = {214{215.start = 0xFFC02000,216.end = 0xFFC020FF,217.flags = IORESOURCE_MEM,218},219{220.start = IRQ_UART1_RX,221.end = IRQ_UART1_RX+1,222.flags = IORESOURCE_IRQ,223},224{225.start = CH_UART1_RX,226.end = CH_UART1_RX+1,227.flags = IORESOURCE_DMA,228},229};230static struct platform_device bfin_sir1_device = {231.name = "bfin_sir",232.id = 1,233.num_resources = ARRAY_SIZE(bfin_sir1_resources),234.resource = bfin_sir1_resources,235};236#endif237#ifdef CONFIG_BFIN_SIR2238static struct resource bfin_sir2_resources[] = {239{240.start = 0xFFC02100,241.end = 0xFFC021FF,242.flags = IORESOURCE_MEM,243},244{245.start = IRQ_UART2_RX,246.end = IRQ_UART2_RX+1,247.flags = IORESOURCE_IRQ,248},249{250.start = CH_UART2_RX,251.end = CH_UART2_RX+1,252.flags = IORESOURCE_DMA,253},254};255static struct platform_device bfin_sir2_device = {256.name = "bfin_sir",257.id = 2,258.num_resources = ARRAY_SIZE(bfin_sir2_resources),259.resource = bfin_sir2_resources,260};261#endif262#endif263264#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)265#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART266static struct resource bfin_sport0_uart_resources[] = {267{268.start = SPORT0_TCR1,269.end = SPORT0_MRCS3+4,270.flags = IORESOURCE_MEM,271},272{273.start = IRQ_SPORT0_RX,274.end = IRQ_SPORT0_RX+1,275.flags = IORESOURCE_IRQ,276},277{278.start = IRQ_SPORT0_ERROR,279.end = IRQ_SPORT0_ERROR,280.flags = IORESOURCE_IRQ,281},282};283284static unsigned short bfin_sport0_peripherals[] = {285P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,286P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0287};288289static struct platform_device bfin_sport0_uart_device = {290.name = "bfin-sport-uart",291.id = 0,292.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),293.resource = bfin_sport0_uart_resources,294.dev = {295.platform_data = &bfin_sport0_peripherals, /* Passed to driver */296},297};298#endif299#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART300static struct resource bfin_sport1_uart_resources[] = {301{302.start = SPORT1_TCR1,303.end = SPORT1_MRCS3+4,304.flags = IORESOURCE_MEM,305},306{307.start = IRQ_SPORT1_RX,308.end = IRQ_SPORT1_RX+1,309.flags = IORESOURCE_IRQ,310},311{312.start = IRQ_SPORT1_ERROR,313.end = IRQ_SPORT1_ERROR,314.flags = IORESOURCE_IRQ,315},316};317318static unsigned short bfin_sport1_peripherals[] = {319P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,320P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0321};322323static struct platform_device bfin_sport1_uart_device = {324.name = "bfin-sport-uart",325.id = 1,326.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),327.resource = bfin_sport1_uart_resources,328.dev = {329.platform_data = &bfin_sport1_peripherals, /* Passed to driver */330},331};332#endif333#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART334static struct resource bfin_sport2_uart_resources[] = {335{336.start = SPORT2_TCR1,337.end = SPORT2_MRCS3+4,338.flags = IORESOURCE_MEM,339},340{341.start = IRQ_SPORT2_RX,342.end = IRQ_SPORT2_RX+1,343.flags = IORESOURCE_IRQ,344},345{346.start = IRQ_SPORT2_ERROR,347.end = IRQ_SPORT2_ERROR,348.flags = IORESOURCE_IRQ,349},350};351352static unsigned short bfin_sport2_peripherals[] = {353P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,354P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0355};356357static struct platform_device bfin_sport2_uart_device = {358.name = "bfin-sport-uart",359.id = 2,360.num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),361.resource = bfin_sport2_uart_resources,362.dev = {363.platform_data = &bfin_sport2_peripherals, /* Passed to driver */364},365};366#endif367#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART368static struct resource bfin_sport3_uart_resources[] = {369{370.start = SPORT3_TCR1,371.end = SPORT3_MRCS3+4,372.flags = IORESOURCE_MEM,373},374{375.start = IRQ_SPORT3_RX,376.end = IRQ_SPORT3_RX+1,377.flags = IORESOURCE_IRQ,378},379{380.start = IRQ_SPORT3_ERROR,381.end = IRQ_SPORT3_ERROR,382.flags = IORESOURCE_IRQ,383},384};385386static unsigned short bfin_sport3_peripherals[] = {387P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,388P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0389};390391static struct platform_device bfin_sport3_uart_device = {392.name = "bfin-sport-uart",393.id = 3,394.num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),395.resource = bfin_sport3_uart_resources,396.dev = {397.platform_data = &bfin_sport3_peripherals, /* Passed to driver */398},399};400#endif401#endif402403#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)404static unsigned short bfin_can_peripherals[] = {405P_CAN0_RX, P_CAN0_TX, 0406};407408static struct resource bfin_can_resources[] = {409{410.start = 0xFFC02A00,411.end = 0xFFC02FFF,412.flags = IORESOURCE_MEM,413},414{415.start = IRQ_CAN_RX,416.end = IRQ_CAN_RX,417.flags = IORESOURCE_IRQ,418},419{420.start = IRQ_CAN_TX,421.end = IRQ_CAN_TX,422.flags = IORESOURCE_IRQ,423},424{425.start = IRQ_CAN_ERROR,426.end = IRQ_CAN_ERROR,427.flags = IORESOURCE_IRQ,428},429};430431static struct platform_device bfin_can_device = {432.name = "bfin_can",433.num_resources = ARRAY_SIZE(bfin_can_resources),434.resource = bfin_can_resources,435.dev = {436.platform_data = &bfin_can_peripherals, /* Passed to driver */437},438};439#endif440441/*442* USB-LAN EzExtender board443* Driver needs to know address, irq and flag pin.444*/445#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)446#include <linux/smc91x.h>447448static struct smc91x_platdata smc91x_info = {449.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,450.leda = RPC_LED_100_10,451.ledb = RPC_LED_TX_RX,452};453454static struct resource smc91x_resources[] = {455{456.name = "smc91x-regs",457.start = 0x20310300,458.end = 0x20310300 + 16,459.flags = IORESOURCE_MEM,460}, {461.start = IRQ_PF0,462.end = IRQ_PF0,463.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,464},465};466static struct platform_device smc91x_device = {467.name = "smc91x",468.id = 0,469.num_resources = ARRAY_SIZE(smc91x_resources),470.resource = smc91x_resources,471.dev = {472.platform_data = &smc91x_info,473},474};475#endif476477#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)478/* all SPI peripherals info goes here */479#if defined(CONFIG_MTD_M25P80) \480|| defined(CONFIG_MTD_M25P80_MODULE)481/* SPI flash chip (m25p16) */482static struct mtd_partition bfin_spi_flash_partitions[] = {483{484.name = "bootloader(spi)",485.size = 0x00040000,486.offset = 0,487.mask_flags = MTD_CAP_ROM488}, {489.name = "linux kernel(spi)",490.size = 0x1c0000,491.offset = 0x40000492}493};494495static struct flash_platform_data bfin_spi_flash_data = {496.name = "m25p80",497.parts = bfin_spi_flash_partitions,498.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),499.type = "m25p16",500};501502static struct bfin5xx_spi_chip spi_flash_chip_info = {503.enable_dma = 0, /* use dma transfer with this chip*/504.bits_per_word = 8,505};506#endif507508#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)509#include <linux/spi/ad7879.h>510static const struct ad7879_platform_data bfin_ad7879_ts_info = {511.model = 7879, /* Model = AD7879 */512.x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */513.pressure_max = 10000,514.pressure_min = 0,515.first_conversion_delay = 3, /* wait 512us before do a first conversion */516.acquisition_time = 1, /* 4us acquisition time per sample */517.median = 2, /* do 8 measurements */518.averaging = 1, /* take the average of 4 middle samples */519.pen_down_acc_interval = 255, /* 9.4 ms */520.gpio_export = 1, /* Export GPIO to gpiolib */521.gpio_base = -1, /* Dynamic allocation */522};523#endif524525#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)526static struct bfin5xx_spi_chip spi_ad7879_chip_info = {527.enable_dma = 0,528.bits_per_word = 16,529};530#endif531532#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)533#include <asm/bfin-lq035q1.h>534535static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {536.mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,537.ppi_mode = USE_RGB565_16_BIT_PPI,538.use_bl = 0, /* let something else control the LCD Blacklight */539.gpio_bl = GPIO_PF7,540};541542static struct resource bfin_lq035q1_resources[] = {543{544.start = IRQ_PPI_ERROR,545.end = IRQ_PPI_ERROR,546.flags = IORESOURCE_IRQ,547},548};549550static struct platform_device bfin_lq035q1_device = {551.name = "bfin-lq035q1",552.id = -1,553.num_resources = ARRAY_SIZE(bfin_lq035q1_resources),554.resource = bfin_lq035q1_resources,555.dev = {556.platform_data = &bfin_lq035q1_data,557},558};559#endif560561#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)562static struct bfin5xx_spi_chip spidev_chip_info = {563.enable_dma = 0,564.bits_per_word = 8,565};566#endif567568#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)569static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {570.enable_dma = 0,571.bits_per_word = 8,572};573#endif574575static struct spi_board_info bf538_spi_board_info[] __initdata = {576#if defined(CONFIG_MTD_M25P80) \577|| defined(CONFIG_MTD_M25P80_MODULE)578{579/* the modalias must be the same as spi device driver name */580.modalias = "m25p80", /* Name of spi_driver for this device */581.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */582.bus_num = 0, /* Framework bus number */583.chip_select = 1, /* SPI_SSEL1*/584.platform_data = &bfin_spi_flash_data,585.controller_data = &spi_flash_chip_info,586.mode = SPI_MODE_3,587},588#endif589#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)590{591.modalias = "ad7879",592.platform_data = &bfin_ad7879_ts_info,593.irq = IRQ_PF3,594.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */595.bus_num = 0,596.chip_select = 1,597.controller_data = &spi_ad7879_chip_info,598.mode = SPI_CPHA | SPI_CPOL,599},600#endif601#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)602{603.modalias = "bfin-lq035q1-spi",604.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */605.bus_num = 0,606.chip_select = 2,607.controller_data = &lq035q1_spi_chip_info,608.mode = SPI_CPHA | SPI_CPOL,609},610#endif611#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)612{613.modalias = "spidev",614.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */615.bus_num = 0,616.chip_select = 1,617.controller_data = &spidev_chip_info,618},619#endif620};621622/* SPI (0) */623static struct resource bfin_spi0_resource[] = {624[0] = {625.start = SPI0_REGBASE,626.end = SPI0_REGBASE + 0xFF,627.flags = IORESOURCE_MEM,628},629[1] = {630.start = CH_SPI0,631.end = CH_SPI0,632.flags = IORESOURCE_DMA,633},634[2] = {635.start = IRQ_SPI0,636.end = IRQ_SPI0,637.flags = IORESOURCE_IRQ,638}639};640641/* SPI (1) */642static struct resource bfin_spi1_resource[] = {643[0] = {644.start = SPI1_REGBASE,645.end = SPI1_REGBASE + 0xFF,646.flags = IORESOURCE_MEM,647},648[1] = {649.start = CH_SPI1,650.end = CH_SPI1,651.flags = IORESOURCE_DMA,652},653[2] = {654.start = IRQ_SPI1,655.end = IRQ_SPI1,656.flags = IORESOURCE_IRQ,657}658};659660/* SPI (2) */661static struct resource bfin_spi2_resource[] = {662[0] = {663.start = SPI2_REGBASE,664.end = SPI2_REGBASE + 0xFF,665.flags = IORESOURCE_MEM,666},667[1] = {668.start = CH_SPI2,669.end = CH_SPI2,670.flags = IORESOURCE_DMA,671},672[2] = {673.start = IRQ_SPI2,674.end = IRQ_SPI2,675.flags = IORESOURCE_IRQ,676}677};678679/* SPI controller data */680static struct bfin5xx_spi_master bf538_spi_master_info0 = {681.num_chipselect = 8,682.enable_dma = 1, /* master has the ability to do dma transfer */683.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},684};685686static struct platform_device bf538_spi_master0 = {687.name = "bfin-spi",688.id = 0, /* Bus number */689.num_resources = ARRAY_SIZE(bfin_spi0_resource),690.resource = bfin_spi0_resource,691.dev = {692.platform_data = &bf538_spi_master_info0, /* Passed to driver */693},694};695696static struct bfin5xx_spi_master bf538_spi_master_info1 = {697.num_chipselect = 2,698.enable_dma = 1, /* master has the ability to do dma transfer */699.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},700};701702static struct platform_device bf538_spi_master1 = {703.name = "bfin-spi",704.id = 1, /* Bus number */705.num_resources = ARRAY_SIZE(bfin_spi1_resource),706.resource = bfin_spi1_resource,707.dev = {708.platform_data = &bf538_spi_master_info1, /* Passed to driver */709},710};711712static struct bfin5xx_spi_master bf538_spi_master_info2 = {713.num_chipselect = 2,714.enable_dma = 1, /* master has the ability to do dma transfer */715.pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},716};717718static struct platform_device bf538_spi_master2 = {719.name = "bfin-spi",720.id = 2, /* Bus number */721.num_resources = ARRAY_SIZE(bfin_spi2_resource),722.resource = bfin_spi2_resource,723.dev = {724.platform_data = &bf538_spi_master_info2, /* Passed to driver */725},726};727728#endif /* spi master and devices */729730#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)731static struct resource bfin_twi0_resource[] = {732[0] = {733.start = TWI0_REGBASE,734.end = TWI0_REGBASE + 0xFF,735.flags = IORESOURCE_MEM,736},737[1] = {738.start = IRQ_TWI0,739.end = IRQ_TWI0,740.flags = IORESOURCE_IRQ,741},742};743744static struct platform_device i2c_bfin_twi0_device = {745.name = "i2c-bfin-twi",746.id = 0,747.num_resources = ARRAY_SIZE(bfin_twi0_resource),748.resource = bfin_twi0_resource,749};750751#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */752static struct resource bfin_twi1_resource[] = {753[0] = {754.start = TWI1_REGBASE,755.end = TWI1_REGBASE + 0xFF,756.flags = IORESOURCE_MEM,757},758[1] = {759.start = IRQ_TWI1,760.end = IRQ_TWI1,761.flags = IORESOURCE_IRQ,762},763};764765static struct platform_device i2c_bfin_twi1_device = {766.name = "i2c-bfin-twi",767.id = 1,768.num_resources = ARRAY_SIZE(bfin_twi1_resource),769.resource = bfin_twi1_resource,770};771#endif772#endif773774#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)775#include <linux/gpio_keys.h>776777static struct gpio_keys_button bfin_gpio_keys_table[] = {778{BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},779};780781static struct gpio_keys_platform_data bfin_gpio_keys_data = {782.buttons = bfin_gpio_keys_table,783.nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),784};785786static struct platform_device bfin_device_gpiokeys = {787.name = "gpio-keys",788.dev = {789.platform_data = &bfin_gpio_keys_data,790},791};792#endif793794static const unsigned int cclk_vlev_datasheet[] =795{796/*797* Internal VLEV BF538SBBC1533798****temporarily using these values until data sheet is updated799*/800VRPAIR(VLEV_100, 150000000),801VRPAIR(VLEV_100, 250000000),802VRPAIR(VLEV_110, 276000000),803VRPAIR(VLEV_115, 301000000),804VRPAIR(VLEV_120, 525000000),805VRPAIR(VLEV_125, 550000000),806VRPAIR(VLEV_130, 600000000),807};808809static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {810.tuple_tab = cclk_vlev_datasheet,811.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),812.vr_settling_time = 25 /* us */,813};814815static struct platform_device bfin_dpmc = {816.name = "bfin dpmc",817.dev = {818.platform_data = &bfin_dmpc_vreg_data,819},820};821822#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)823static struct mtd_partition ezkit_partitions[] = {824{825.name = "bootloader(nor)",826.size = 0x40000,827.offset = 0,828}, {829.name = "linux kernel(nor)",830.size = 0x180000,831.offset = MTDPART_OFS_APPEND,832}, {833.name = "file system(nor)",834.size = MTDPART_SIZ_FULL,835.offset = MTDPART_OFS_APPEND,836}837};838839static struct physmap_flash_data ezkit_flash_data = {840.width = 2,841.parts = ezkit_partitions,842.nr_parts = ARRAY_SIZE(ezkit_partitions),843};844845static struct resource ezkit_flash_resource = {846.start = 0x20000000,847#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)848.end = 0x202fffff,849#else850.end = 0x203fffff,851#endif852.flags = IORESOURCE_MEM,853};854855static struct platform_device ezkit_flash_device = {856.name = "physmap-flash",857.id = 0,858.dev = {859.platform_data = &ezkit_flash_data,860},861.num_resources = 1,862.resource = &ezkit_flash_resource,863};864#endif865866static struct platform_device *cm_bf538_devices[] __initdata = {867868&bfin_dpmc,869870#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)871&rtc_device,872#endif873874#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)875#ifdef CONFIG_SERIAL_BFIN_UART0876&bfin_uart0_device,877#endif878#ifdef CONFIG_SERIAL_BFIN_UART1879&bfin_uart1_device,880#endif881#ifdef CONFIG_SERIAL_BFIN_UART2882&bfin_uart2_device,883#endif884#endif885886#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)887&bf538_spi_master0,888&bf538_spi_master1,889&bf538_spi_master2,890#endif891892#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)893&i2c_bfin_twi0_device,894&i2c_bfin_twi1_device,895#endif896897#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)898#ifdef CONFIG_BFIN_SIR0899&bfin_sir0_device,900#endif901#ifdef CONFIG_BFIN_SIR1902&bfin_sir1_device,903#endif904#ifdef CONFIG_BFIN_SIR2905&bfin_sir2_device,906#endif907#endif908909#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)910#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART911&bfin_sport0_uart_device,912#endif913#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART914&bfin_sport1_uart_device,915#endif916#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART917&bfin_sport2_uart_device,918#endif919#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART920&bfin_sport3_uart_device,921#endif922#endif923924#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)925&bfin_can_device,926#endif927928#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)929&smc91x_device,930#endif931932#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)933&bfin_lq035q1_device,934#endif935936#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)937&bfin_device_gpiokeys,938#endif939940#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)941&ezkit_flash_device,942#endif943};944945static int __init ezkit_init(void)946{947printk(KERN_INFO "%s(): registering device resources\n", __func__);948platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));949950#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)951spi_register_board_info(bf538_spi_board_info,952ARRAY_SIZE(bf538_spi_board_info));953#endif954955return 0;956}957958arch_initcall(ezkit_init);959960static struct platform_device *ezkit_early_devices[] __initdata = {961#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)962#ifdef CONFIG_SERIAL_BFIN_UART0963&bfin_uart0_device,964#endif965#ifdef CONFIG_SERIAL_BFIN_UART1966&bfin_uart1_device,967#endif968#ifdef CONFIG_SERIAL_BFIN_UART2969&bfin_uart2_device,970#endif971#endif972973#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)974#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART975&bfin_sport0_uart_device,976#endif977#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART978&bfin_sport1_uart_device,979#endif980#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART981&bfin_sport2_uart_device,982#endif983#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART984&bfin_sport3_uart_device,985#endif986#endif987};988989void __init native_machine_early_platform_add_devices(void)990{991printk(KERN_INFO "register early platform devices\n");992early_platform_add_devices(ezkit_early_devices,993ARRAY_SIZE(ezkit_early_devices));994}995996997