Path: blob/master/arch/blackfin/mach-bf561/boards/cm_bf561.c
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/*1* Copyright 2004-2009 Analog Devices Inc.2* 2008-2009 Bluetechnix3* 2005 National ICT Australia (NICTA)4* Aidan Williams <[email protected]>5*6* Licensed under the GPL-2 or later.7*/89#include <linux/device.h>10#include <linux/platform_device.h>11#include <linux/mtd/mtd.h>12#include <linux/mtd/partitions.h>13#include <linux/spi/spi.h>14#include <linux/spi/flash.h>15#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)16#include <linux/usb/isp1362.h>17#endif18#include <linux/ata_platform.h>19#include <linux/irq.h>20#include <asm/dma.h>21#include <asm/bfin5xx_spi.h>22#include <asm/portmux.h>23#include <asm/dpmc.h>24#include <linux/mtd/physmap.h>2526/*27* Name the Board for the /proc/cpuinfo28*/29const char bfin_board_name[] = "Bluetechnix CM BF561";3031#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)32/* all SPI peripherals info goes here */3334#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)35static struct mtd_partition bfin_spi_flash_partitions[] = {36{37.name = "bootloader(spi)",38.size = 0x00020000,39.offset = 0,40.mask_flags = MTD_CAP_ROM41}, {42.name = "linux kernel(spi)",43.size = 0xe0000,44.offset = 0x2000045}, {46.name = "file system(spi)",47.size = 0x700000,48.offset = 0x00100000,49}50};5152static struct flash_platform_data bfin_spi_flash_data = {53.name = "m25p80",54.parts = bfin_spi_flash_partitions,55.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),56.type = "m25p64",57};5859/* SPI flash chip (m25p64) */60static struct bfin5xx_spi_chip spi_flash_chip_info = {61.enable_dma = 0, /* use dma transfer with this chip*/62.bits_per_word = 8,63};64#endif6566#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)67/* SPI ADC chip */68static struct bfin5xx_spi_chip spi_adc_chip_info = {69.enable_dma = 1, /* use dma transfer with this chip*/70.bits_per_word = 16,71};72#endif7374#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)75static struct bfin5xx_spi_chip ad1836_spi_chip_info = {76.enable_dma = 0,77.bits_per_word = 16,78};79#endif8081#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)82static struct bfin5xx_spi_chip mmc_spi_chip_info = {83.enable_dma = 0,84.bits_per_word = 8,85};86#endif8788static struct spi_board_info bfin_spi_board_info[] __initdata = {89#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)90{91/* the modalias must be the same as spi device driver name */92.modalias = "m25p80", /* Name of spi_driver for this device */93.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */94.bus_num = 0, /* Framework bus number */95.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/96.platform_data = &bfin_spi_flash_data,97.controller_data = &spi_flash_chip_info,98.mode = SPI_MODE_3,99},100#endif101102#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)103{104.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */105.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */106.bus_num = 0, /* Framework bus number */107.chip_select = 1, /* Framework chip select. */108.platform_data = NULL, /* No spi_driver specific config */109.controller_data = &spi_adc_chip_info,110},111#endif112113#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)114{115.modalias = "ad183x",116.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */117.bus_num = 0,118.chip_select = 4,119.controller_data = &ad1836_spi_chip_info,120},121#endif122#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)123{124.modalias = "mmc_spi",125.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */126.bus_num = 0,127.chip_select = 1,128.controller_data = &mmc_spi_chip_info,129.mode = SPI_MODE_3,130},131#endif132};133134/* SPI (0) */135static struct resource bfin_spi0_resource[] = {136[0] = {137.start = SPI0_REGBASE,138.end = SPI0_REGBASE + 0xFF,139.flags = IORESOURCE_MEM,140},141[1] = {142.start = CH_SPI,143.end = CH_SPI,144.flags = IORESOURCE_DMA,145},146[2] = {147.start = IRQ_SPI,148.end = IRQ_SPI,149.flags = IORESOURCE_IRQ,150},151};152153/* SPI controller data */154static struct bfin5xx_spi_master bfin_spi0_info = {155.num_chipselect = 8,156.enable_dma = 1, /* master has the ability to do dma transfer */157.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},158};159160static struct platform_device bfin_spi0_device = {161.name = "bfin-spi",162.id = 0, /* Bus number */163.num_resources = ARRAY_SIZE(bfin_spi0_resource),164.resource = bfin_spi0_resource,165.dev = {166.platform_data = &bfin_spi0_info, /* Passed to driver */167},168};169#endif /* spi master and devices */170171172#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)173static struct platform_device hitachi_fb_device = {174.name = "hitachi-tx09",175};176#endif177178179#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)180#include <linux/smc91x.h>181182static struct smc91x_platdata smc91x_info = {183.flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,184.leda = RPC_LED_100_10,185.ledb = RPC_LED_TX_RX,186};187188static struct resource smc91x_resources[] = {189{190.name = "smc91x-regs",191.start = 0x28000300,192.end = 0x28000300 + 16,193.flags = IORESOURCE_MEM,194}, {195.start = IRQ_PF0,196.end = IRQ_PF0,197.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,198},199};200static struct platform_device smc91x_device = {201.name = "smc91x",202.id = 0,203.num_resources = ARRAY_SIZE(smc91x_resources),204.resource = smc91x_resources,205.dev = {206.platform_data = &smc91x_info,207},208};209#endif210211#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)212#include <linux/smsc911x.h>213214static struct resource smsc911x_resources[] = {215{216.name = "smsc911x-memory",217.start = 0x24008000,218.end = 0x24008000 + 0xFF,219.flags = IORESOURCE_MEM,220},221{222.start = IRQ_PF43,223.end = IRQ_PF43,224.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,225},226};227228static struct smsc911x_platform_config smsc911x_config = {229.flags = SMSC911X_USE_16BIT,230.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,231.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,232.phy_interface = PHY_INTERFACE_MODE_MII,233};234235static struct platform_device smsc911x_device = {236.name = "smsc911x",237.id = 0,238.num_resources = ARRAY_SIZE(smsc911x_resources),239.resource = smsc911x_resources,240.dev = {241.platform_data = &smsc911x_config,242},243};244#endif245246#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)247static struct resource net2272_bfin_resources[] = {248{249.start = 0x24000000,250.end = 0x24000000 + 0x100,251.flags = IORESOURCE_MEM,252}, {253.start = IRQ_PF45,254.end = IRQ_PF45,255.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,256},257};258259static struct platform_device net2272_bfin_device = {260.name = "net2272",261.id = -1,262.num_resources = ARRAY_SIZE(net2272_bfin_resources),263.resource = net2272_bfin_resources,264};265#endif266267#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)268static struct resource isp1362_hcd_resources[] = {269{270.start = 0x24008000,271.end = 0x24008000,272.flags = IORESOURCE_MEM,273}, {274.start = 0x24008004,275.end = 0x24008004,276.flags = IORESOURCE_MEM,277}, {278.start = IRQ_PF47,279.end = IRQ_PF47,280.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,281},282};283284static struct isp1362_platform_data isp1362_priv = {285.sel15Kres = 1,286.clknotstop = 0,287.oc_enable = 0,288.int_act_high = 0,289.int_edge_triggered = 0,290.remote_wakeup_connected = 0,291.no_power_switching = 1,292.power_switching_mode = 0,293};294295static struct platform_device isp1362_hcd_device = {296.name = "isp1362-hcd",297.id = 0,298.dev = {299.platform_data = &isp1362_priv,300},301.num_resources = ARRAY_SIZE(isp1362_hcd_resources),302.resource = isp1362_hcd_resources,303};304#endif305306#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)307#ifdef CONFIG_SERIAL_BFIN_UART0308static struct resource bfin_uart0_resources[] = {309{310.start = BFIN_UART_THR,311.end = BFIN_UART_GCTL+2,312.flags = IORESOURCE_MEM,313},314{315.start = IRQ_UART_RX,316.end = IRQ_UART_RX+1,317.flags = IORESOURCE_IRQ,318},319{320.start = IRQ_UART_ERROR,321.end = IRQ_UART_ERROR,322.flags = IORESOURCE_IRQ,323},324{325.start = CH_UART_TX,326.end = CH_UART_TX,327.flags = IORESOURCE_DMA,328},329{330.start = CH_UART_RX,331.end = CH_UART_RX,332.flags = IORESOURCE_DMA,333},334};335336static unsigned short bfin_uart0_peripherals[] = {337P_UART0_TX, P_UART0_RX, 0338};339340static struct platform_device bfin_uart0_device = {341.name = "bfin-uart",342.id = 0,343.num_resources = ARRAY_SIZE(bfin_uart0_resources),344.resource = bfin_uart0_resources,345.dev = {346.platform_data = &bfin_uart0_peripherals, /* Passed to driver */347},348};349#endif350#endif351352#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)353#ifdef CONFIG_BFIN_SIR0354static struct resource bfin_sir0_resources[] = {355{356.start = 0xFFC00400,357.end = 0xFFC004FF,358.flags = IORESOURCE_MEM,359},360{361.start = IRQ_UART0_RX,362.end = IRQ_UART0_RX+1,363.flags = IORESOURCE_IRQ,364},365{366.start = CH_UART0_RX,367.end = CH_UART0_RX+1,368.flags = IORESOURCE_DMA,369},370};371372static struct platform_device bfin_sir0_device = {373.name = "bfin_sir",374.id = 0,375.num_resources = ARRAY_SIZE(bfin_sir0_resources),376.resource = bfin_sir0_resources,377};378#endif379#endif380381#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)382#define PATA_INT IRQ_PF46383384static struct pata_platform_info bfin_pata_platform_data = {385.ioport_shift = 2,386.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,387};388389static struct resource bfin_pata_resources[] = {390{391.start = 0x2400C000,392.end = 0x2400C001F,393.flags = IORESOURCE_MEM,394},395{396.start = 0x2400D018,397.end = 0x2400D01B,398.flags = IORESOURCE_MEM,399},400{401.start = PATA_INT,402.end = PATA_INT,403.flags = IORESOURCE_IRQ,404},405};406407static struct platform_device bfin_pata_device = {408.name = "pata_platform",409.id = -1,410.num_resources = ARRAY_SIZE(bfin_pata_resources),411.resource = bfin_pata_resources,412.dev = {413.platform_data = &bfin_pata_platform_data,414}415};416#endif417418#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)419static struct mtd_partition para_partitions[] = {420{421.name = "bootloader(nor)",422.size = 0x40000,423.offset = 0,424}, {425.name = "linux kernel(nor)",426.size = 0x100000,427.offset = MTDPART_OFS_APPEND,428}, {429.name = "file system(nor)",430.size = MTDPART_SIZ_FULL,431.offset = MTDPART_OFS_APPEND,432}433};434435static struct physmap_flash_data para_flash_data = {436.width = 2,437.parts = para_partitions,438.nr_parts = ARRAY_SIZE(para_partitions),439};440441static struct resource para_flash_resource = {442.start = 0x20000000,443.end = 0x207fffff,444.flags = IORESOURCE_MEM,445};446447static struct platform_device para_flash_device = {448.name = "physmap-flash",449.id = 0,450.dev = {451.platform_data = ¶_flash_data,452},453.num_resources = 1,454.resource = ¶_flash_resource,455};456#endif457458static const unsigned int cclk_vlev_datasheet[] =459{460VRPAIR(VLEV_085, 250000000),461VRPAIR(VLEV_090, 300000000),462VRPAIR(VLEV_095, 313000000),463VRPAIR(VLEV_100, 350000000),464VRPAIR(VLEV_105, 400000000),465VRPAIR(VLEV_110, 444000000),466VRPAIR(VLEV_115, 450000000),467VRPAIR(VLEV_120, 475000000),468VRPAIR(VLEV_125, 500000000),469VRPAIR(VLEV_130, 600000000),470};471472static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {473.tuple_tab = cclk_vlev_datasheet,474.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),475.vr_settling_time = 25 /* us */,476};477478static struct platform_device bfin_dpmc = {479.name = "bfin dpmc",480.dev = {481.platform_data = &bfin_dmpc_vreg_data,482},483};484485static struct platform_device *cm_bf561_devices[] __initdata = {486487&bfin_dpmc,488489#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)490&hitachi_fb_device,491#endif492493#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)494#ifdef CONFIG_SERIAL_BFIN_UART0495&bfin_uart0_device,496#endif497#endif498499#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)500#ifdef CONFIG_BFIN_SIR0501&bfin_sir0_device,502#endif503#endif504505#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)506&isp1362_hcd_device,507#endif508509#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)510&smc91x_device,511#endif512513#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)514&smsc911x_device,515#endif516517#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)518&net2272_bfin_device,519#endif520521#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)522&bfin_spi0_device,523#endif524525#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)526&bfin_pata_device,527#endif528529#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)530¶_flash_device,531#endif532};533534static int __init cm_bf561_init(void)535{536printk(KERN_INFO "%s(): registering device resources\n", __func__);537platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));538#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)539spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));540#endif541542#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)543irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);544#endif545return 0;546}547548arch_initcall(cm_bf561_init);549550static struct platform_device *cm_bf561_early_devices[] __initdata = {551#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)552#ifdef CONFIG_SERIAL_BFIN_UART0553&bfin_uart0_device,554#endif555#endif556};557558void __init native_machine_early_platform_add_devices(void)559{560printk(KERN_INFO "register early platform devices\n");561early_platform_add_devices(cm_bf561_early_devices,562ARRAY_SIZE(cm_bf561_early_devices));563}564565566