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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/cris/arch-v32/drivers/i2c.c
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1
/*!***************************************************************************
2
*!
3
*! FILE NAME : i2c.c
4
*!
5
*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
6
*! kernel modules (i2c_writereg/readreg) and from userspace using
7
*! ioctl()'s
8
*!
9
*! Nov 30 1998 Torbjorn Eliasson Initial version.
10
*! Bjorn Wesen Elinux kernel version.
11
*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
12
*! don't use PB_I2C if DS1302 uses same bits,
13
*! use PB.
14
*| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
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*| generates nack on last received byte,
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*| instead of ack.
17
*| i2c_getack changed data level while clock
18
*| was high, causing DS75 to see a stop condition
19
*!
20
*! ---------------------------------------------------------------------------
21
*!
22
*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
23
*!
24
*!***************************************************************************/
25
26
/****************** INCLUDE FILES SECTION ***********************************/
27
28
#include <linux/module.h>
29
#include <linux/sched.h>
30
#include <linux/errno.h>
31
#include <linux/kernel.h>
32
#include <linux/fs.h>
33
#include <linux/string.h>
34
#include <linux/init.h>
35
#include <linux/mutex.h>
36
37
#include <asm/etraxi2c.h>
38
39
#include <asm/system.h>
40
#include <asm/io.h>
41
#include <asm/delay.h>
42
43
#include "i2c.h"
44
45
/****************** I2C DEFINITION SECTION *************************/
46
47
#define D(x)
48
49
#define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
50
static DEFINE_MUTEX(i2c_mutex);
51
static const char i2c_name[] = "i2c";
52
53
#define CLOCK_LOW_TIME 8
54
#define CLOCK_HIGH_TIME 8
55
#define START_CONDITION_HOLD_TIME 8
56
#define STOP_CONDITION_HOLD_TIME 8
57
#define ENABLE_OUTPUT 0x01
58
#define ENABLE_INPUT 0x00
59
#define I2C_CLOCK_HIGH 1
60
#define I2C_CLOCK_LOW 0
61
#define I2C_DATA_HIGH 1
62
#define I2C_DATA_LOW 0
63
64
#define i2c_enable()
65
#define i2c_disable()
66
67
/* enable or disable output-enable, to select output or input on the i2c bus */
68
69
#define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
70
#define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
71
72
/* control the i2c clock and data signals */
73
74
#define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
75
#define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
76
77
/* read a bit from the i2c interface */
78
79
#define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
80
81
#define i2c_delay(usecs) udelay(usecs)
82
83
static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
84
85
/****************** VARIABLE SECTION ************************************/
86
87
static struct crisv32_iopin cris_i2c_clk;
88
static struct crisv32_iopin cris_i2c_data;
89
90
/****************** FUNCTION DEFINITION SECTION *************************/
91
92
93
/* generate i2c start condition */
94
95
void
96
i2c_start(void)
97
{
98
/*
99
* SCL=1 SDA=1
100
*/
101
i2c_dir_out();
102
i2c_delay(CLOCK_HIGH_TIME/6);
103
i2c_data(I2C_DATA_HIGH);
104
i2c_clk(I2C_CLOCK_HIGH);
105
i2c_delay(CLOCK_HIGH_TIME);
106
/*
107
* SCL=1 SDA=0
108
*/
109
i2c_data(I2C_DATA_LOW);
110
i2c_delay(START_CONDITION_HOLD_TIME);
111
/*
112
* SCL=0 SDA=0
113
*/
114
i2c_clk(I2C_CLOCK_LOW);
115
i2c_delay(CLOCK_LOW_TIME);
116
}
117
118
/* generate i2c stop condition */
119
120
void
121
i2c_stop(void)
122
{
123
i2c_dir_out();
124
125
/*
126
* SCL=0 SDA=0
127
*/
128
i2c_clk(I2C_CLOCK_LOW);
129
i2c_data(I2C_DATA_LOW);
130
i2c_delay(CLOCK_LOW_TIME*2);
131
/*
132
* SCL=1 SDA=0
133
*/
134
i2c_clk(I2C_CLOCK_HIGH);
135
i2c_delay(CLOCK_HIGH_TIME*2);
136
/*
137
* SCL=1 SDA=1
138
*/
139
i2c_data(I2C_DATA_HIGH);
140
i2c_delay(STOP_CONDITION_HOLD_TIME);
141
142
i2c_dir_in();
143
}
144
145
/* write a byte to the i2c interface */
146
147
void
148
i2c_outbyte(unsigned char x)
149
{
150
int i;
151
152
i2c_dir_out();
153
154
for (i = 0; i < 8; i++) {
155
if (x & 0x80) {
156
i2c_data(I2C_DATA_HIGH);
157
} else {
158
i2c_data(I2C_DATA_LOW);
159
}
160
161
i2c_delay(CLOCK_LOW_TIME/2);
162
i2c_clk(I2C_CLOCK_HIGH);
163
i2c_delay(CLOCK_HIGH_TIME);
164
i2c_clk(I2C_CLOCK_LOW);
165
i2c_delay(CLOCK_LOW_TIME/2);
166
x <<= 1;
167
}
168
i2c_data(I2C_DATA_LOW);
169
i2c_delay(CLOCK_LOW_TIME/2);
170
171
/*
172
* enable input
173
*/
174
i2c_dir_in();
175
}
176
177
/* read a byte from the i2c interface */
178
179
unsigned char
180
i2c_inbyte(void)
181
{
182
unsigned char aBitByte = 0;
183
int i;
184
185
/* Switch off I2C to get bit */
186
i2c_disable();
187
i2c_dir_in();
188
i2c_delay(CLOCK_HIGH_TIME/2);
189
190
/* Get bit */
191
aBitByte |= i2c_getbit();
192
193
/* Enable I2C */
194
i2c_enable();
195
i2c_delay(CLOCK_LOW_TIME/2);
196
197
for (i = 1; i < 8; i++) {
198
aBitByte <<= 1;
199
/* Clock pulse */
200
i2c_clk(I2C_CLOCK_HIGH);
201
i2c_delay(CLOCK_HIGH_TIME);
202
i2c_clk(I2C_CLOCK_LOW);
203
i2c_delay(CLOCK_LOW_TIME);
204
205
/* Switch off I2C to get bit */
206
i2c_disable();
207
i2c_dir_in();
208
i2c_delay(CLOCK_HIGH_TIME/2);
209
210
/* Get bit */
211
aBitByte |= i2c_getbit();
212
213
/* Enable I2C */
214
i2c_enable();
215
i2c_delay(CLOCK_LOW_TIME/2);
216
}
217
i2c_clk(I2C_CLOCK_HIGH);
218
i2c_delay(CLOCK_HIGH_TIME);
219
220
/*
221
* we leave the clock low, getbyte is usually followed
222
* by sendack/nack, they assume the clock to be low
223
*/
224
i2c_clk(I2C_CLOCK_LOW);
225
return aBitByte;
226
}
227
228
/*#---------------------------------------------------------------------------
229
*#
230
*# FUNCTION NAME: i2c_getack
231
*#
232
*# DESCRIPTION : checks if ack was received from ic2
233
*#
234
*#--------------------------------------------------------------------------*/
235
236
int
237
i2c_getack(void)
238
{
239
int ack = 1;
240
/*
241
* enable output
242
*/
243
i2c_dir_out();
244
/*
245
* Release data bus by setting
246
* data high
247
*/
248
i2c_data(I2C_DATA_HIGH);
249
/*
250
* enable input
251
*/
252
i2c_dir_in();
253
i2c_delay(CLOCK_HIGH_TIME/4);
254
/*
255
* generate ACK clock pulse
256
*/
257
i2c_clk(I2C_CLOCK_HIGH);
258
#if 0
259
/*
260
* Use PORT PB instead of I2C
261
* for input. (I2C not working)
262
*/
263
i2c_clk(1);
264
i2c_data(1);
265
/*
266
* switch off I2C
267
*/
268
i2c_data(1);
269
i2c_disable();
270
i2c_dir_in();
271
#endif
272
273
/*
274
* now wait for ack
275
*/
276
i2c_delay(CLOCK_HIGH_TIME/2);
277
/*
278
* check for ack
279
*/
280
if (i2c_getbit())
281
ack = 0;
282
i2c_delay(CLOCK_HIGH_TIME/2);
283
if (!ack) {
284
if (!i2c_getbit()) /* receiver pulld SDA low */
285
ack = 1;
286
i2c_delay(CLOCK_HIGH_TIME/2);
287
}
288
289
/*
290
* our clock is high now, make sure data is low
291
* before we enable our output. If we keep data high
292
* and enable output, we would generate a stop condition.
293
*/
294
#if 0
295
i2c_data(I2C_DATA_LOW);
296
297
/*
298
* end clock pulse
299
*/
300
i2c_enable();
301
i2c_dir_out();
302
#endif
303
i2c_clk(I2C_CLOCK_LOW);
304
i2c_delay(CLOCK_HIGH_TIME/4);
305
/*
306
* enable output
307
*/
308
i2c_dir_out();
309
/*
310
* remove ACK clock pulse
311
*/
312
i2c_data(I2C_DATA_HIGH);
313
i2c_delay(CLOCK_LOW_TIME/2);
314
return ack;
315
}
316
317
/*#---------------------------------------------------------------------------
318
*#
319
*# FUNCTION NAME: I2C::sendAck
320
*#
321
*# DESCRIPTION : Send ACK on received data
322
*#
323
*#--------------------------------------------------------------------------*/
324
void
325
i2c_sendack(void)
326
{
327
/*
328
* enable output
329
*/
330
i2c_delay(CLOCK_LOW_TIME);
331
i2c_dir_out();
332
/*
333
* set ack pulse high
334
*/
335
i2c_data(I2C_DATA_LOW);
336
/*
337
* generate clock pulse
338
*/
339
i2c_delay(CLOCK_HIGH_TIME/6);
340
i2c_clk(I2C_CLOCK_HIGH);
341
i2c_delay(CLOCK_HIGH_TIME);
342
i2c_clk(I2C_CLOCK_LOW);
343
i2c_delay(CLOCK_LOW_TIME/6);
344
/*
345
* reset data out
346
*/
347
i2c_data(I2C_DATA_HIGH);
348
i2c_delay(CLOCK_LOW_TIME);
349
350
i2c_dir_in();
351
}
352
353
/*#---------------------------------------------------------------------------
354
*#
355
*# FUNCTION NAME: i2c_sendnack
356
*#
357
*# DESCRIPTION : Sends NACK on received data
358
*#
359
*#--------------------------------------------------------------------------*/
360
void
361
i2c_sendnack(void)
362
{
363
/*
364
* enable output
365
*/
366
i2c_delay(CLOCK_LOW_TIME);
367
i2c_dir_out();
368
/*
369
* set data high
370
*/
371
i2c_data(I2C_DATA_HIGH);
372
/*
373
* generate clock pulse
374
*/
375
i2c_delay(CLOCK_HIGH_TIME/6);
376
i2c_clk(I2C_CLOCK_HIGH);
377
i2c_delay(CLOCK_HIGH_TIME);
378
i2c_clk(I2C_CLOCK_LOW);
379
i2c_delay(CLOCK_LOW_TIME);
380
381
i2c_dir_in();
382
}
383
384
/*#---------------------------------------------------------------------------
385
*#
386
*# FUNCTION NAME: i2c_write
387
*#
388
*# DESCRIPTION : Writes a value to an I2C device
389
*#
390
*#--------------------------------------------------------------------------*/
391
int
392
i2c_write(unsigned char theSlave, void *data, size_t nbytes)
393
{
394
int error, cntr = 3;
395
unsigned char bytes_wrote = 0;
396
unsigned char value;
397
unsigned long flags;
398
399
spin_lock_irqsave(&i2c_lock, flags);
400
401
do {
402
error = 0;
403
404
i2c_start();
405
/*
406
* send slave address
407
*/
408
i2c_outbyte((theSlave & 0xfe));
409
/*
410
* wait for ack
411
*/
412
if (!i2c_getack())
413
error = 1;
414
/*
415
* send data
416
*/
417
for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
418
memcpy(&value, data + bytes_wrote, sizeof value);
419
i2c_outbyte(value);
420
/*
421
* now it's time to wait for ack
422
*/
423
if (!i2c_getack())
424
error |= 4;
425
}
426
/*
427
* end byte stream
428
*/
429
i2c_stop();
430
431
} while (error && cntr--);
432
433
i2c_delay(CLOCK_LOW_TIME);
434
435
spin_unlock_irqrestore(&i2c_lock, flags);
436
437
return -error;
438
}
439
440
/*#---------------------------------------------------------------------------
441
*#
442
*# FUNCTION NAME: i2c_read
443
*#
444
*# DESCRIPTION : Reads a value from an I2C device
445
*#
446
*#--------------------------------------------------------------------------*/
447
int
448
i2c_read(unsigned char theSlave, void *data, size_t nbytes)
449
{
450
unsigned char b = 0;
451
unsigned char bytes_read = 0;
452
int error, cntr = 3;
453
unsigned long flags;
454
455
spin_lock_irqsave(&i2c_lock, flags);
456
457
do {
458
error = 0;
459
memset(data, 0, nbytes);
460
/*
461
* generate start condition
462
*/
463
i2c_start();
464
/*
465
* send slave address
466
*/
467
i2c_outbyte((theSlave | 0x01));
468
/*
469
* wait for ack
470
*/
471
if (!i2c_getack())
472
error = 1;
473
/*
474
* fetch data
475
*/
476
for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
477
b = i2c_inbyte();
478
memcpy(data + bytes_read, &b, sizeof b);
479
480
if (bytes_read < (nbytes - 1))
481
i2c_sendack();
482
}
483
/*
484
* last received byte needs to be nacked
485
* instead of acked
486
*/
487
i2c_sendnack();
488
/*
489
* end sequence
490
*/
491
i2c_stop();
492
} while (error && cntr--);
493
494
spin_unlock_irqrestore(&i2c_lock, flags);
495
496
return -error;
497
}
498
499
/*#---------------------------------------------------------------------------
500
*#
501
*# FUNCTION NAME: i2c_writereg
502
*#
503
*# DESCRIPTION : Writes a value to an I2C device
504
*#
505
*#--------------------------------------------------------------------------*/
506
int
507
i2c_writereg(unsigned char theSlave, unsigned char theReg,
508
unsigned char theValue)
509
{
510
int error, cntr = 3;
511
unsigned long flags;
512
513
spin_lock_irqsave(&i2c_lock, flags);
514
515
do {
516
error = 0;
517
518
i2c_start();
519
/*
520
* send slave address
521
*/
522
i2c_outbyte((theSlave & 0xfe));
523
/*
524
* wait for ack
525
*/
526
if(!i2c_getack())
527
error = 1;
528
/*
529
* now select register
530
*/
531
i2c_dir_out();
532
i2c_outbyte(theReg);
533
/*
534
* now it's time to wait for ack
535
*/
536
if(!i2c_getack())
537
error |= 2;
538
/*
539
* send register register data
540
*/
541
i2c_outbyte(theValue);
542
/*
543
* now it's time to wait for ack
544
*/
545
if(!i2c_getack())
546
error |= 4;
547
/*
548
* end byte stream
549
*/
550
i2c_stop();
551
} while(error && cntr--);
552
553
i2c_delay(CLOCK_LOW_TIME);
554
555
spin_unlock_irqrestore(&i2c_lock, flags);
556
557
return -error;
558
}
559
560
/*#---------------------------------------------------------------------------
561
*#
562
*# FUNCTION NAME: i2c_readreg
563
*#
564
*# DESCRIPTION : Reads a value from the decoder registers.
565
*#
566
*#--------------------------------------------------------------------------*/
567
unsigned char
568
i2c_readreg(unsigned char theSlave, unsigned char theReg)
569
{
570
unsigned char b = 0;
571
int error, cntr = 3;
572
unsigned long flags;
573
574
spin_lock_irqsave(&i2c_lock, flags);
575
576
do {
577
error = 0;
578
/*
579
* generate start condition
580
*/
581
i2c_start();
582
583
/*
584
* send slave address
585
*/
586
i2c_outbyte((theSlave & 0xfe));
587
/*
588
* wait for ack
589
*/
590
if(!i2c_getack())
591
error = 1;
592
/*
593
* now select register
594
*/
595
i2c_dir_out();
596
i2c_outbyte(theReg);
597
/*
598
* now it's time to wait for ack
599
*/
600
if(!i2c_getack())
601
error |= 2;
602
/*
603
* repeat start condition
604
*/
605
i2c_delay(CLOCK_LOW_TIME);
606
i2c_start();
607
/*
608
* send slave address
609
*/
610
i2c_outbyte(theSlave | 0x01);
611
/*
612
* wait for ack
613
*/
614
if(!i2c_getack())
615
error |= 4;
616
/*
617
* fetch register
618
*/
619
b = i2c_inbyte();
620
/*
621
* last received byte needs to be nacked
622
* instead of acked
623
*/
624
i2c_sendnack();
625
/*
626
* end sequence
627
*/
628
i2c_stop();
629
630
} while(error && cntr--);
631
632
spin_unlock_irqrestore(&i2c_lock, flags);
633
634
return b;
635
}
636
637
static int
638
i2c_open(struct inode *inode, struct file *filp)
639
{
640
return 0;
641
}
642
643
static int
644
i2c_release(struct inode *inode, struct file *filp)
645
{
646
return 0;
647
}
648
649
/* Main device API. ioctl's to write or read to/from i2c registers.
650
*/
651
652
static long
653
i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
654
{
655
int ret;
656
if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
657
return -ENOTTY;
658
}
659
660
switch (_IOC_NR(cmd)) {
661
case I2C_WRITEREG:
662
/* write to an i2c slave */
663
D(printk("i2cw %d %d %d\n",
664
I2C_ARGSLAVE(arg),
665
I2C_ARGREG(arg),
666
I2C_ARGVALUE(arg)));
667
668
mutex_lock(&i2c_mutex);
669
ret = i2c_writereg(I2C_ARGSLAVE(arg),
670
I2C_ARGREG(arg),
671
I2C_ARGVALUE(arg));
672
mutex_unlock(&i2c_mutex);
673
return ret;
674
675
case I2C_READREG:
676
{
677
unsigned char val;
678
/* read from an i2c slave */
679
D(printk("i2cr %d %d ",
680
I2C_ARGSLAVE(arg),
681
I2C_ARGREG(arg)));
682
mutex_lock(&i2c_mutex);
683
val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
684
mutex_unlock(&i2c_mutex);
685
D(printk("= %d\n", val));
686
return val;
687
}
688
default:
689
return -EINVAL;
690
691
}
692
693
return 0;
694
}
695
696
static const struct file_operations i2c_fops = {
697
.owner = THIS_MODULE,
698
.unlocked_ioctl = i2c_ioctl,
699
.open = i2c_open,
700
.release = i2c_release,
701
.llseek = noop_llseek,
702
};
703
704
static int __init i2c_init(void)
705
{
706
static int res;
707
static int first = 1;
708
709
if (!first)
710
return res;
711
712
first = 0;
713
714
/* Setup and enable the DATA and CLK pins */
715
716
res = crisv32_io_get_name(&cris_i2c_data,
717
CONFIG_ETRAX_V32_I2C_DATA_PORT);
718
if (res < 0)
719
return res;
720
721
res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
722
crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
723
724
return res;
725
}
726
727
728
static int __init i2c_register(void)
729
{
730
int res;
731
732
res = i2c_init();
733
if (res < 0)
734
return res;
735
736
/* register char device */
737
738
res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
739
if (res < 0) {
740
printk(KERN_ERR "i2c: couldn't get a major number.\n");
741
return res;
742
}
743
744
printk(KERN_INFO
745
"I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");
746
747
return 0;
748
}
749
/* this makes sure that i2c_init is called during boot */
750
module_init(i2c_register);
751
752
/****************** END OF FILE i2c.c ********************************/
753
754