CoCalc -- kgdb

GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/cris/arch-v32/kernel/kgdb_asm.S
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/*
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 *  Copyright (C) 2004 Axis Communications AB
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 *
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 * Code for handling break 8, hardware breakpoint, single step, and serial
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 * port exceptions for kernel debugging purposes.
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 */
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#include <hwregs/intr_vect.h>
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	;; Exported functions.
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	.globl kgdb_handle_exception
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kgdb_handle_exception:
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;; Create a register image of the caller.
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;;
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;; First of all, save the ACR on the stack since we need it for address calculations.
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;; We put it into the register struct later.
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  subq     4, $sp
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  move.d   $acr, [$sp]
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;; Now we are free to use ACR all we want.
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;; If we were running this handler with interrupts on, we would have to be careful
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;; to save and restore CCS manually, but since we aren't we treat it like every other
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;; register.
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  move.d   reg,  $acr
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  move.d   $r0,  [$acr]        ; Save R0 (start of register struct)
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  addq     4,    $acr
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  move.d   $r1,  [$acr]        ; Save R1
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  addq     4,    $acr
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  move.d   $r2,  [$acr]        ; Save R2
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  addq     4,    $acr
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  move.d   $r3,  [$acr]        ; Save R3
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  addq     4,    $acr
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  move.d   $r4,  [$acr]        ; Save R4
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  addq     4,    $acr
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  move.d   $r5,  [$acr]        ; Save R5
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  addq     4,    $acr
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  move.d   $r6,  [$acr]        ; Save R6
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  addq     4,    $acr
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  move.d   $r7,  [$acr]        ; Save R7
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  addq     4,    $acr
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  move.d   $r8,  [$acr]        ; Save R8
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  addq     4,    $acr
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  move.d   $r9,  [$acr]        ; Save R9
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  addq     4,    $acr
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  move.d   $r10, [$acr]        ; Save R10
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  addq     4,    $acr
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  move.d   $r11, [$acr]        ; Save R11
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  addq     4,    $acr
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  move.d   $r12, [$acr]        ; Save R12
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  addq     4,    $acr
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  move.d   $r13, [$acr]        ; Save R13
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  addq     4,    $acr
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  move.d   $sp,  [$acr]        ; Save SP (R14)
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  addq     4,    $acr
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  ;; The ACR register is already saved on the stack, so pop it from there.
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  move.d   [$sp],$r0
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  move.d   $r0,  [$acr]
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  addq     4,    $acr
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  move     $bz,  [$acr]
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  addq     1,    $acr
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  move     $vr,  [$acr]
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  addq     1,    $acr
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  move     $pid, [$acr]
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  addq     4,    $acr
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  move     $srs, [$acr]
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  addq     1,    $acr
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  move     $wz,  [$acr]
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  addq     2,    $acr
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  move     $exs, [$acr]
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  addq     4,    $acr
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  move     $eda, [$acr]
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  addq     4,    $acr
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  move     $mof, [$acr]
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  addq     4,    $acr
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  move     $dz,  [$acr]
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  addq     4,    $acr
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  move     $ebp, [$acr]
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  addq     4,    $acr
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  move     $erp, [$acr]
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  addq     4,    $acr
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  move     $srp, [$acr]
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  addq     4,    $acr
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  move     $nrp, [$acr]
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  addq     4,    $acr
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  move     $ccs, [$acr]
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  addq     4,    $acr
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  move     $usp, [$acr]
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  addq     4,    $acr
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  move     $spc, [$acr]
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  addq     4,     $acr
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;; Skip the pseudo-PC.
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  addq     4,     $acr
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;; Save the support registers in bank 0 - 3.
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  clear.d $r1 ; Bank counter
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  move.d  sreg, $acr
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;; Bank 0
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  move    $r1,  $srs
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  nop
108
  nop
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  nop
110
  move    $s0,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s1,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s2,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s3,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s4,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s5,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s6,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s7,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s8,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s9,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s10,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s11,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s12,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  ;; Nothing in S13 - S15, bank 0
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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;; Bank 1 and bank 2 have the same layout, hence the loop.
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  addq    1, $r1
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1:
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  move    $r1,  $srs
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  nop
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  nop
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  nop
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  move    $s0,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s1,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s2,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s3,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s4,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s5,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s6,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  ;; Nothing in S7 - S15, bank 1 and 2
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  clear.d [$acr]
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  addq    4,     $acr
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  addq 1, $r1
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  cmpq 3, $r1
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  bne 1b
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  nop
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;; Bank 3
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  move    $r1,  $srs
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  nop
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  nop
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  nop
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  move    $s0,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s1,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s2,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s3,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s4,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s5,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s6,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s7,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s8,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s9,   $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s10,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s11,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s12,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s13,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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  move    $s14,  $r0
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  move.d  $r0,   [$acr]
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  addq    4,     $acr
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;; Nothing in S15, bank 3
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  clear.d [$acr]
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  addq    4,     $acr
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;; Check what got us here: get IDX field of EXS.
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  move $exs,    $r10
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  and.d 0xff00, $r10
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  lsrq 8,       $r10
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#if defined(CONFIG_ETRAX_KGDB_PORT0)
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  cmp.d SER0_INTR_VECT,   $r10 ; IRQ for serial port 0
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  beq sigint
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  nop
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#elif defined(CONFIG_ETRAX_KGDB_PORT1)
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  cmp.d SER1_INTR_VECT,   $r10 ; IRQ for serial port 1
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  beq sigint
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  nop
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#elif defined(CONFIG_ETRAX_KGDB_PORT2)
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  cmp.d SER2_INTR_VECT,   $r10 ; IRQ for serial port 2
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  beq sigint
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  nop
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#elif defined(CONFIG_ETRAX_KGDB_PORT3)
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  cmp.d SER3_INTR_VECT,   $r10 ; IRQ for serial port 3
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  beq sigint
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  nop
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#endif
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;; Multiple interrupt must be due to serial break.
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  cmp.d 0x30,   $r10 ; Multiple interrupt
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  beq sigint
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  nop
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;; Neither of those? Then it's a sigtrap.
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  ba handle_comm
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  moveq 5, $r10      ; Set SIGTRAP (delay slot)
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sigint:
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  ;; Serial interrupt; get character
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  jsr getDebugChar
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  nop                ; Delay slot
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  cmp.b 3, $r10      ; \003 (Ctrl-C)?
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  bne return         ; No, get out of here
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  nop
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  moveq 2, $r10      ; Set SIGINT
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304
;;
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;; Handle the communication
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;;
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handle_comm:
308
  move.d   internal_stack+1020, $sp ; Use the internal stack which grows upwards
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  jsr      handle_exception         ; Interactive routine
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  nop
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;;
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;; Return to the caller
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;;
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return:
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;; First of all, write the support registers.
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  clear.d $r1 ; Bank counter
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  move.d  sreg, $acr
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321
;; Bank 0
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  move    $r1,  $srs
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  nop
324
  nop
325
  nop
326
  move.d  [$acr], $r0
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  move    $r0,    $s0
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  addq    4,      $acr
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  move.d  [$acr], $r0
330
  move    $r0,    $s1
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  addq    4,      $acr
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  move.d  [$acr], $r0
333
  move    $r0,    $s2
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  addq    4,      $acr
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  move.d  [$acr], $r0
336
  move    $r0,    $s3
337
  addq    4,      $acr
338
  move.d  [$acr], $r0
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  move    $r0,    $s4
340
  addq    4,      $acr
341
  move.d  [$acr], $r0
342
  move    $r0,    $s5
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  addq    4,      $acr
344

345
;; Nothing in S6 - S7, bank 0.
346
  addq    4,      $acr
347
  addq    4,      $acr
348

349
  move.d  [$acr], $r0
350
  move    $r0,    $s8
351
  addq    4,      $acr
352
  move.d  [$acr], $r0
353
  move    $r0,    $s9
354
  addq    4,      $acr
355
  move.d  [$acr], $r0
356
  move    $r0,    $s10
357
  addq    4,      $acr
358
  move.d  [$acr], $r0
359
  move    $r0,    $s11
360
  addq    4,      $acr
361
  move.d  [$acr], $r0
362
  move    $r0,    $s12
363
  addq    4,      $acr
364

365
;; Nothing in S13 - S15, bank 0
366
  addq    4,      $acr
367
  addq    4,      $acr
368
  addq    4,      $acr
369

370
;; Bank 1 and bank 2 have the same layout, hence the loop.
371
  addq    1, $r1
372
2:
373
  move    $r1,  $srs
374
  nop
375
  nop
376
  nop
377
  move.d  [$acr], $r0
378
  move    $r0,    $s0
379
  addq    4,      $acr
380
  move.d  [$acr], $r0
381
  move    $r0,    $s1
382
  addq    4,      $acr
383
  move.d  [$acr], $r0
384
  move    $r0,    $s2
385
  addq    4,      $acr
386

387
;; S3 (MM_CAUSE) is read-only.
388
  addq    4,      $acr
389

390
  move.d  [$acr], $r0
391
  move    $r0,    $s4
392
  addq    4,      $acr
393

394
;; FIXME: Actually write S5/S6? (Affects MM_CAUSE.)
395
  addq    4,      $acr
396
  addq    4,      $acr
397

398
;; Nothing in S7 - S15, bank 1 and 2
399
  addq    4,      $acr
400
  addq    4,      $acr
401
  addq    4,      $acr
402
  addq    4,      $acr
403
  addq    4,      $acr
404
  addq    4,      $acr
405
  addq    4,      $acr
406
  addq    4,      $acr
407
  addq    4,      $acr
408

409
  addq 1, $r1
410
  cmpq 3, $r1
411
  bne 2b
412
  nop
413

414
;; Bank 3
415
  move    $r1,  $srs
416
  nop
417
  nop
418
  nop
419
  move.d  [$acr], $r0
420
  move    $r0,    $s0
421
  addq    4,      $acr
422
  move.d  [$acr], $r0
423
  move    $r0,    $s1
424
  addq    4,      $acr
425
  move.d  [$acr], $r0
426
  move    $r0,    $s2
427
  addq    4,      $acr
428
  move.d  [$acr], $r0
429
  move    $r0,    $s3
430
  addq    4,      $acr
431
  move.d  [$acr], $r0
432
  move    $r0,    $s4
433
  addq    4,      $acr
434
  move.d  [$acr], $r0
435
  move    $r0,    $s5
436
  addq    4,      $acr
437
  move.d  [$acr], $r0
438
  move    $r0,    $s6
439
  addq    4,      $acr
440
  move.d  [$acr], $r0
441
  move    $r0,    $s7
442
  addq    4,      $acr
443
  move.d  [$acr], $r0
444
  move    $r0,    $s8
445
  addq    4,      $acr
446
  move.d  [$acr], $r0
447
  move    $r0,    $s9
448
  addq    4,      $acr
449
  move.d  [$acr], $r0
450
  move    $r0,    $s10
451
  addq    4,      $acr
452
  move.d  [$acr], $r0
453
  move    $r0,    $s11
454
  addq    4,      $acr
455
  move.d  [$acr], $r0
456
  move    $r0,    $s12
457
  addq    4,      $acr
458
  move.d  [$acr], $r0
459
  move    $r0,    $s13
460
  addq    4,      $acr
461
  move.d  [$acr], $r0
462
  move    $r0,    $s14
463
  addq    4,      $acr
464

465
;; Nothing in S15, bank 3
466
  addq    4,      $acr
467

468
;; Now, move on to the regular register restoration process.
469

470
   move.d  reg,    $acr   ; Reset ACR to point at the beginning of the register image
471
   move.d  [$acr], $r0    ; Restore R0
472
   addq    4,      $acr
473
   move.d  [$acr], $r1    ; Restore R1
474
   addq    4,      $acr
475
   move.d  [$acr], $r2    ; Restore R2
476
   addq    4,      $acr
477
   move.d  [$acr], $r3    ; Restore R3
478
   addq    4,      $acr
479
   move.d  [$acr], $r4    ; Restore R4
480
   addq    4,      $acr
481
   move.d  [$acr], $r5    ; Restore R5
482
   addq    4,      $acr
483
   move.d  [$acr], $r6    ; Restore R6
484
   addq    4,      $acr
485
   move.d  [$acr], $r7    ; Restore R7
486
   addq    4,      $acr
487
   move.d  [$acr], $r8    ; Restore R8
488
   addq    4,      $acr
489
   move.d  [$acr], $r9    ; Restore R9
490
   addq    4,      $acr
491
   move.d  [$acr], $r10   ; Restore R10
492
   addq    4,      $acr
493
   move.d  [$acr], $r11   ; Restore R11
494
   addq    4,      $acr
495
   move.d  [$acr], $r12   ; Restore R12
496
   addq    4,      $acr
497
   move.d  [$acr], $r13   ; Restore R13
498

499
;;
500
;; We restore all registers, even though some of them probably haven't changed.
501
;;
502

503
   addq    4,      $acr
504
   move.d  [$acr], $sp    ; Restore SP (R14)
505

506
   ;; ACR cannot be restored just yet.
507
   addq    8,      $acr
508

509
   ;; Skip BZ, VR.
510
   addq    2,      $acr
511

512
   move    [$acr], $pid   ; Restore PID
513
   addq    4,      $acr
514
   move    [$acr], $srs   ; Restore SRS
515
   nop
516
   nop
517
   nop
518
   addq    1,      $acr
519

520
   ;; Skip WZ.
521
   addq    2,      $acr
522

523
   move    [$acr], $exs    ; Restore EXS.
524
   addq    4,      $acr
525
   move    [$acr], $eda    ; Restore EDA.
526
   addq    4,      $acr
527
   move    [$acr], $mof    ; Restore MOF.
528

529
   ;; Skip DZ.
530
   addq    8,      $acr
531

532
   move    [$acr], $ebp    ; Restore EBP.
533
   addq    4,      $acr
534
   move    [$acr], $erp    ; Restore ERP.
535
   addq    4,      $acr
536
   move    [$acr], $srp    ; Restore SRP.
537
   addq    4,      $acr
538
   move    [$acr], $nrp    ; Restore NRP.
539
   addq    4,      $acr
540
   move    [$acr], $ccs    ; Restore CCS like an ordinary register.
541
   addq    4,      $acr
542
   move    [$acr], $usp    ; Restore USP
543
   addq    4,      $acr
544
   move    [$acr], $spc    ; Restore SPC
545
                           ; No restoration of pseudo-PC of course.
546

547
   move.d  reg,    $acr    ; Reset ACR to point at the beginning of the register image
548
   add.d   15*4,   $acr
549
   move.d  [$acr], $acr    ; Finally, restore ACR.
550
   rete                    ; Same as jump ERP
551
   rfe                     ; Shifts CCS
552

553
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