CoCalc -- config

GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/cris/include/arch-v32/mach-fs/mach/hwregs/config_defs.h
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#ifndef __config_defs_h
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#define __config_defs_h
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/*
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 * This file is autogenerated from
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 *   file:           ../../rtl/config_regs.r
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 *     id:           config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp 
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 *     last modfied: Thu Mar  4 12:34:39 2004
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 * 
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 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile config_defs.h ../../rtl/config_regs.r
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 *      id: $Id: config_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
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 * Any changes here will be lost.
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 *
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 * -*- buffer-read-only: t -*-
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 */
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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  REG_READ( reg_##scope##_##reg, \
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            (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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  REG_WRITE( reg_##scope##_##reg, \
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             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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  REG_READ( reg_##scope##_##reg, \
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            (inst) + REG_RD_ADDR_##scope##_##reg + \
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	    (index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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  REG_WRITE( reg_##scope##_##reg, \
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             (inst) + REG_WR_ADDR_##scope##_##reg + \
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	     (index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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	    (index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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	     (index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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  ( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
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    (index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope config */
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/* Register r_bootsel, scope config, type r */
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typedef struct {
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  unsigned int boot_mode   : 3;
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  unsigned int full_duplex : 1;
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  unsigned int user        : 1;
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  unsigned int pll         : 1;
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  unsigned int flash_bw    : 1;
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  unsigned int dummy1      : 25;
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} reg_config_r_bootsel;
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#define REG_RD_ADDR_config_r_bootsel 0
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/* Register rw_clk_ctrl, scope config, type rw */
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typedef struct {
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  unsigned int pll          : 1;
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  unsigned int cpu          : 1;
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  unsigned int iop          : 1;
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  unsigned int dma01_eth0   : 1;
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  unsigned int dma23        : 1;
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  unsigned int dma45        : 1;
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  unsigned int dma67        : 1;
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  unsigned int dma89_strcop : 1;
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  unsigned int bif          : 1;
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  unsigned int fix_io       : 1;
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  unsigned int dummy1       : 22;
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} reg_config_rw_clk_ctrl;
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#define REG_RD_ADDR_config_rw_clk_ctrl 4
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#define REG_WR_ADDR_config_rw_clk_ctrl 4
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/* Register rw_pad_ctrl, scope config, type rw */
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typedef struct {
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  unsigned int usb_susp : 1;
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  unsigned int phyrst_n : 1;
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  unsigned int dummy1   : 30;
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} reg_config_rw_pad_ctrl;
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#define REG_RD_ADDR_config_rw_pad_ctrl 8
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#define REG_WR_ADDR_config_rw_pad_ctrl 8
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/* Constants */
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enum {
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  regk_config_bw16                         = 0x00000000,
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  regk_config_bw32                         = 0x00000001,
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  regk_config_master                       = 0x00000005,
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  regk_config_nand                         = 0x00000003,
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  regk_config_net_rx                       = 0x00000001,
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  regk_config_net_tx_rx                    = 0x00000002,
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  regk_config_no                           = 0x00000000,
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  regk_config_none                         = 0x00000007,
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  regk_config_nor                          = 0x00000000,
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  regk_config_rw_clk_ctrl_default          = 0x00000002,
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  regk_config_rw_pad_ctrl_default          = 0x00000000,
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  regk_config_ser                          = 0x00000004,
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  regk_config_slave                        = 0x00000006,
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  regk_config_yes                          = 0x00000001
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};
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#endif /* __config_defs_h */
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