/* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation1*2* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.3* Written by David Howells ([email protected])4*5* This program is free software; you can redistribute it and/or6* modify it under the terms of the GNU General Public License7* as published by the Free Software Foundation; either version8* 2 of the License, or (at your option) any later version.9*/1011#include <linux/init.h>12#include <linux/threads.h>13#include <linux/linkage.h>14#include <asm/ptrace.h>15#include <asm/page.h>16#include <asm/spr-regs.h>17#include <asm/mb86943a.h>18#include "head.inc"192021#define __400_DBR0 0xfe000e0022#define __400_DBR1 0xfe000e0823#define __400_DBR2 0xfe000e1024#define __400_DBR3 0xfe000e1825#define __400_DAM0 0xfe000f0026#define __400_DAM1 0xfe000f0827#define __400_DAM2 0xfe000f1028#define __400_DAM3 0xfe000f1829#define __400_LGCR 0xfe00001030#define __400_LCR 0xfe00010031#define __400_LSBR 0xfe000c003233__INIT34.balign 43536###############################################################################37#38# set the protection map with the I/DAMPR registers39#40# ENTRY: EXIT:41# GR25 SDRAM size [saved]42# GR26 &__head_reference [saved]43# GR30 LED address [saved]44#45###############################################################################46.globl __head_fr451_set_protection47__head_fr451_set_protection:48movsg lr,gr274950movgs gr0,dampr1051movgs gr0,damlr1052movgs gr0,dampr953movgs gr0,damlr954movgs gr0,dampr855movgs gr0,damlr85657# set the I/O region protection registers for FR401/3/558sethi.p %hi(__region_IO),gr559setlo %lo(__region_IO),gr560sethi.p %hi(0x1fffffff),gr761setlo %lo(0x1fffffff),gr762ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr563movgs gr5,dampr11 ; General I/O tile64movgs gr7,damlr116566# need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible67# - start with the highest numbered registers68sethi.p %hi(__kernel_image_end),gr869setlo %lo(__kernel_image_end),gr870sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap71setlo %lo(32768),gr472add gr8,gr4,gr873sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB74setlo %lo(1024*2048-1),gr475add.p gr8,gr4,gr876not gr4,gr477and gr8,gr4,gr87879sethi.p %hi(__page_offset),gr980setlo %lo(__page_offset),gr981add gr9,gr25,gr98283sethi.p %hi(0xffffc000),gr1184setlo %lo(0xffffc000),gr118586# GR8 = base of uncovered RAM87# GR9 = top of uncovered RAM88# GR11 = xAMLR mask89LEDS 0x331790call __head_split_region91movgs gr4,iampr792movgs gr6,iamlr793movgs gr5,dampr794movgs gr7,damlr79596LEDS 0x331697call __head_split_region98movgs gr4,iampr699movgs gr6,iamlr6100movgs gr5,dampr6101movgs gr7,damlr6102103LEDS 0x3315104call __head_split_region105movgs gr4,iampr5106movgs gr6,iamlr5107movgs gr5,dampr5108movgs gr7,damlr5109110LEDS 0x3314111call __head_split_region112movgs gr4,iampr4113movgs gr6,iamlr4114movgs gr5,dampr4115movgs gr7,damlr4116117LEDS 0x3313118call __head_split_region119movgs gr4,iampr3120movgs gr6,iamlr3121movgs gr5,dampr3122movgs gr7,damlr3123124LEDS 0x3312125call __head_split_region126movgs gr4,iampr2127movgs gr6,iamlr2128movgs gr5,dampr2129movgs gr7,damlr2130131LEDS 0x3311132call __head_split_region133movgs gr4,iampr1134movgs gr6,iamlr1135movgs gr5,dampr1136movgs gr7,damlr1137138# cover kernel core image with kernel-only segment139LEDS 0x3310140sethi.p %hi(__page_offset),gr8141setlo %lo(__page_offset),gr8142call __head_split_region143144#ifdef CONFIG_PROTECT_KERNEL145ori.p gr4,#xAMPRx_S_KERNEL,gr4146ori gr5,#xAMPRx_S_KERNEL,gr5147#endif148149movgs gr4,iampr0150movgs gr6,iamlr0151movgs gr5,dampr0152movgs gr7,damlr0153154# start in TLB context 0 with no page tables155movgs gr0,cxnr156movgs gr0,ttbr157158# the FR451 also has an extra trap base register159movsg tbr,gr4160movgs gr4,btbr161162# turn on the timers as appropriate163movgs gr0,timerh164movgs gr0,timerl165movgs gr0,timerd166movsg hsr0,gr4167sethi.p %hi(HSR0_ETMI),gr5168setlo %lo(HSR0_ETMI),gr5169or gr4,gr5,gr4170movgs gr4,hsr0171172LEDS 0x3300173jmpl @(gr27,gr0)174175176