/* atomic-ops.S: kernel atomic operations1*2* For an explanation of how atomic ops work in this arch, see:3* Documentation/frv/atomic-ops.txt4*5* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.6* Written by David Howells ([email protected])7*8* This program is free software; you can redistribute it and/or9* modify it under the terms of the GNU General Public License10* as published by the Free Software Foundation; either version11* 2 of the License, or (at your option) any later version.12*/1314#include <asm/spr-regs.h>1516.text17.balign 41819###############################################################################20#21# unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);22#23###############################################################################24.globl atomic_test_and_ANDNOT_mask25.type atomic_test_and_ANDNOT_mask,@function26atomic_test_and_ANDNOT_mask:27not.p gr8,gr10280:29orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */30ckeq icc3,cc731ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */32orcr cc7,cc7,cc3 /* set CC3 to true */33and gr8,gr10,gr1134cst.p gr11,@(gr9,gr0) ,cc3,#135corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */36beq icc3,#0,0b37bralr3839.size atomic_test_and_ANDNOT_mask, .-atomic_test_and_ANDNOT_mask4041###############################################################################42#43# unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);44#45###############################################################################46.globl atomic_test_and_OR_mask47.type atomic_test_and_OR_mask,@function48atomic_test_and_OR_mask:49or.p gr8,gr8,gr10500:51orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */52ckeq icc3,cc753ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */54orcr cc7,cc7,cc3 /* set CC3 to true */55or gr8,gr10,gr1156cst.p gr11,@(gr9,gr0) ,cc3,#157corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */58beq icc3,#0,0b59bralr6061.size atomic_test_and_OR_mask, .-atomic_test_and_OR_mask6263###############################################################################64#65# unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);66#67###############################################################################68.globl atomic_test_and_XOR_mask69.type atomic_test_and_XOR_mask,@function70atomic_test_and_XOR_mask:71or.p gr8,gr8,gr10720:73orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */74ckeq icc3,cc775ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */76orcr cc7,cc7,cc3 /* set CC3 to true */77xor gr8,gr10,gr1178cst.p gr11,@(gr9,gr0) ,cc3,#179corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */80beq icc3,#0,0b81bralr8283.size atomic_test_and_XOR_mask, .-atomic_test_and_XOR_mask8485###############################################################################86#87# int atomic_add_return(int i, atomic_t *v)88#89###############################################################################90.globl atomic_add_return91.type atomic_add_return,@function92atomic_add_return:93or.p gr8,gr8,gr10940:95orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */96ckeq icc3,cc797ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */98orcr cc7,cc7,cc3 /* set CC3 to true */99add gr8,gr10,gr8100cst.p gr8,@(gr9,gr0) ,cc3,#1101corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */102beq icc3,#0,0b103bralr104105.size atomic_add_return, .-atomic_add_return106107###############################################################################108#109# int atomic_sub_return(int i, atomic_t *v)110#111###############################################################################112.globl atomic_sub_return113.type atomic_sub_return,@function114atomic_sub_return:115or.p gr8,gr8,gr101160:117orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */118ckeq icc3,cc7119ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */120orcr cc7,cc7,cc3 /* set CC3 to true */121sub gr8,gr10,gr8122cst.p gr8,@(gr9,gr0) ,cc3,#1123corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */124beq icc3,#0,0b125bralr126127.size atomic_sub_return, .-atomic_sub_return128129###############################################################################130#131# uint32_t __xchg_32(uint32_t i, uint32_t *v)132#133###############################################################################134.globl __xchg_32135.type __xchg_32,@function136__xchg_32:137or.p gr8,gr8,gr101380:139orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */140ckeq icc3,cc7141ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */142orcr cc7,cc7,cc3 /* set CC3 to true */143cst.p gr10,@(gr9,gr0) ,cc3,#1144corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */145beq icc3,#0,0b146bralr147148.size __xchg_32, .-__xchg_32149150###############################################################################151#152# uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new)153#154###############################################################################155.globl __cmpxchg_32156.type __cmpxchg_32,@function157__cmpxchg_32:158or.p gr8,gr8,gr111590:160orcc gr0,gr0,gr0,icc3161ckeq icc3,cc7162ld.p @(gr11,gr0),gr8163orcr cc7,cc7,cc3164subcc gr8,gr9,gr7,icc0165bnelr icc0,#0166cst.p gr10,@(gr11,gr0) ,cc3,#1167corcc gr29,gr29,gr0 ,cc3,#1168beq icc3,#0,0b169bralr170171.size __cmpxchg_32, .-__cmpxchg_32172173174