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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/frv/lib/atomic64-ops.S
10817 views
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/* kernel atomic64 operations

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 *

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 * For an explanation of how atomic ops work in this arch, see:

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 *   Documentation/frv/atomic-ops.txt

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 *

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 * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.

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 * Written by David Howells ([email protected])

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 *

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 * This program is free software; you can redistribute it and/or

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 * modify it under the terms of the GNU General Public License

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 * as published by the Free Software Foundation; either version

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 * 2 of the License, or (at your option) any later version.

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 */

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#include <asm/spr-regs.h>

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	.text

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	.balign 4

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###############################################################################

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#

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# long long atomic64_inc_return(atomic64_t *v)

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#

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###############################################################################

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	.globl		atomic64_inc_return

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        .type		atomic64_inc_return,@function

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atomic64_inc_return:

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	or.p		gr8,gr8,gr10

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0:

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	orcc		gr0,gr0,gr0,icc3		/* set ICC3.Z */

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	ckeq		icc3,cc7

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	ldd.p		@(gr10,gr0),gr8			/* LDD.P/ORCR must be atomic */

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	orcr		cc7,cc7,cc3			/* set CC3 to true */

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	addicc		gr9,#1,gr9,icc0

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	addxi		gr8,#0,gr8,icc0

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	cstd.p		gr8,@(gr10,gr0)		,cc3,#1

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	corcc		gr29,gr29,gr0		,cc3,#1	/* clear ICC3.Z if store happens */

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	beq		icc3,#0,0b

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	bralr

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	.size		atomic64_inc_return, .-atomic64_inc_return

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###############################################################################

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#

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# long long atomic64_dec_return(atomic64_t *v)

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#

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###############################################################################

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	.globl		atomic64_dec_return

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        .type		atomic64_dec_return,@function

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atomic64_dec_return:

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	or.p		gr8,gr8,gr10

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0:

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	orcc		gr0,gr0,gr0,icc3		/* set ICC3.Z */

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	ckeq		icc3,cc7

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	ldd.p		@(gr10,gr0),gr8			/* LDD.P/ORCR must be atomic */

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	orcr		cc7,cc7,cc3			/* set CC3 to true */

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	subicc		gr9,#1,gr9,icc0

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	subxi		gr8,#0,gr8,icc0

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	cstd.p		gr8,@(gr10,gr0)		,cc3,#1

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	corcc		gr29,gr29,gr0		,cc3,#1	/* clear ICC3.Z if store happens */

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	beq		icc3,#0,0b

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	bralr

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	.size		atomic64_dec_return, .-atomic64_dec_return

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###############################################################################

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#

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# long long atomic64_add_return(long long i, atomic64_t *v)

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#

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###############################################################################

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	.globl		atomic64_add_return

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        .type		atomic64_add_return,@function

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atomic64_add_return:

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	or.p		gr8,gr8,gr4

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	or		gr9,gr9,gr5

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0:

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	orcc		gr0,gr0,gr0,icc3		/* set ICC3.Z */

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	ckeq		icc3,cc7

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	ldd.p		@(gr10,gr0),gr8			/* LDD.P/ORCR must be atomic */

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	orcr		cc7,cc7,cc3			/* set CC3 to true */

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	addcc		gr9,gr5,gr9,icc0

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	addx		gr8,gr4,gr8,icc0

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	cstd.p		gr8,@(gr10,gr0)		,cc3,#1

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	corcc		gr29,gr29,gr0		,cc3,#1	/* clear ICC3.Z if store happens */

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	beq		icc3,#0,0b

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	bralr

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	.size		atomic64_add_return, .-atomic64_add_return

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###############################################################################

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#

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# long long atomic64_sub_return(long long i, atomic64_t *v)

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#

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###############################################################################

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	.globl		atomic64_sub_return

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        .type		atomic64_sub_return,@function

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atomic64_sub_return:

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	or.p		gr8,gr8,gr4

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	or		gr9,gr9,gr5

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0:

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	orcc		gr0,gr0,gr0,icc3		/* set ICC3.Z */

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	ckeq		icc3,cc7

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	ldd.p		@(gr10,gr0),gr8			/* LDD.P/ORCR must be atomic */

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	orcr		cc7,cc7,cc3			/* set CC3 to true */

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	subcc		gr9,gr5,gr9,icc0

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	subx		gr8,gr4,gr8,icc0

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	cstd.p		gr8,@(gr10,gr0)		,cc3,#1

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	corcc		gr29,gr29,gr0		,cc3,#1	/* clear ICC3.Z if store happens */

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	beq		icc3,#0,0b

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	bralr

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	.size		atomic64_sub_return, .-atomic64_sub_return

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###############################################################################

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#

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# uint64_t __xchg_64(uint64_t i, uint64_t *v)

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#

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###############################################################################

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	.globl		__xchg_64

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        .type		__xchg_64,@function

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__xchg_64:

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	or.p		gr8,gr8,gr4

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	or		gr9,gr9,gr5

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0:

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	orcc		gr0,gr0,gr0,icc3		/* set ICC3.Z */

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	ckeq		icc3,cc7

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	ldd.p		@(gr10,gr0),gr8			/* LDD.P/ORCR must be atomic */

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	orcr		cc7,cc7,cc3			/* set CC3 to true */

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	cstd.p		gr4,@(gr10,gr0)		,cc3,#1

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	corcc		gr29,gr29,gr0		,cc3,#1	/* clear ICC3.Z if store happens */

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	beq		icc3,#0,0b

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	bralr

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	.size		__xchg_64, .-__xchg_64

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###############################################################################

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#

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# uint64_t __cmpxchg_64(uint64_t test, uint64_t new, uint64_t *v)

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#

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###############################################################################

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	.globl		__cmpxchg_64

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        .type		__cmpxchg_64,@function

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__cmpxchg_64:

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	or.p		gr8,gr8,gr4

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	or		gr9,gr9,gr5

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0:

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	orcc		gr0,gr0,gr0,icc3		/* set ICC3.Z */

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	ckeq		icc3,cc7

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	ldd.p		@(gr12,gr0),gr8			/* LDD.P/ORCR must be atomic */

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	orcr		cc7,cc7,cc3

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	subcc		gr8,gr4,gr0,icc0

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	subcc.p		gr9,gr5,gr0,icc1

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	bnelr		icc0,#0

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	bnelr		icc1,#0

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	cstd.p		gr10,@(gr12,gr0)	,cc3,#1

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	corcc		gr29,gr29,gr0		,cc3,#1	/* clear ICC3.Z if store happens */

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	beq		icc3,#0,0b

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	bralr

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	.size		__cmpxchg_64, .-__cmpxchg_64

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