/* tlb-flush.S: TLB flushing routines1*2* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.3* Written by David Howells ([email protected])4*5* This program is free software; you can redistribute it and/or6* modify it under the terms of the GNU General Public License7* as published by the Free Software Foundation; either version8* 2 of the License, or (at your option) any later version.9*/1011#include <linux/sys.h>12#include <linux/linkage.h>13#include <asm/page.h>14#include <asm/ptrace.h>15#include <asm/spr-regs.h>1617.macro DEBUG ch18# sethi.p %hi(0xfeff9c00),gr419# setlo %lo(0xfeff9c00),gr420# setlos #\ch,gr521# stbi gr5,@(gr4,#0)22# membar23.endm2425.section .rodata2627# sizes corresponding to TPXR.LMAX28.balign 129__tlb_lmax_sizes:30.byte 0, 64, 0, 031.byte 0, 0, 0, 032.byte 0, 0, 0, 033.byte 0, 0, 0, 03435.section .text36.balign 43738###############################################################################39#40# flush everything41# - void __flush_tlb_all(void)42#43###############################################################################44.globl __flush_tlb_all45.type __flush_tlb_all,@function46__flush_tlb_all:47DEBUG 'A'4849# kill cached PGE value50setlos #0xffffffff,gr451movgs gr4,scr052movgs gr4,scr15354# kill AMPR-cached TLB values55movgs gr0,iamlr156movgs gr0,iampr157movgs gr0,damlr158movgs gr0,dampr15960# find out how many lines there are61movsg tpxr,gr562sethi.p %hi(__tlb_lmax_sizes),gr463srli gr5,#TPXR_LMAX_SHIFT,gr564setlo.p %lo(__tlb_lmax_sizes),gr465andi gr5,#TPXR_LMAX_SMASK,gr566ldub @(gr4,gr5),gr46768# now, we assume that the TLB line step is page size in size69setlos.p #PAGE_SIZE,gr570setlos #0,gr6711:72tlbpr gr6,gr0,#6,#073subicc.p gr4,#1,gr4,icc074add gr6,gr5,gr675bne icc0,#2,1b7677DEBUG 'B'78bralr7980.size __flush_tlb_all, .-__flush_tlb_all8182###############################################################################83#84# flush everything to do with one context85# - void __flush_tlb_mm(unsigned long contextid [GR8])86#87###############################################################################88.globl __flush_tlb_mm89.type __flush_tlb_mm,@function90__flush_tlb_mm:91DEBUG 'M'9293# kill cached PGE value94setlos #0xffffffff,gr495movgs gr4,scr096movgs gr4,scr19798# specify the context we want to flush99movgs gr8,tplr100101# find out how many lines there are102movsg tpxr,gr5103sethi.p %hi(__tlb_lmax_sizes),gr4104srli gr5,#TPXR_LMAX_SHIFT,gr5105setlo.p %lo(__tlb_lmax_sizes),gr4106andi gr5,#TPXR_LMAX_SMASK,gr5107ldub @(gr4,gr5),gr4108109# now, we assume that the TLB line step is page size in size110setlos.p #PAGE_SIZE,gr5111setlos #0,gr61120:113tlbpr gr6,gr0,#5,#0114subicc.p gr4,#1,gr4,icc0115add gr6,gr5,gr6116bne icc0,#2,0b117118DEBUG 'N'119bralr120121.size __flush_tlb_mm, .-__flush_tlb_mm122123###############################################################################124#125# flush a range of addresses from the TLB126# - void __flush_tlb_page(unsigned long contextid [GR8],127# unsigned long start [GR9])128#129###############################################################################130.globl __flush_tlb_page131.type __flush_tlb_page,@function132__flush_tlb_page:133# kill cached PGE value134setlos #0xffffffff,gr4135movgs gr4,scr0136movgs gr4,scr1137138# specify the context we want to flush139movgs gr8,tplr140141# zap the matching TLB line and AMR values142setlos #~(PAGE_SIZE-1),gr5143and gr9,gr5,gr9144tlbpr gr9,gr0,#5,#0145146bralr147148.size __flush_tlb_page, .-__flush_tlb_page149150###############################################################################151#152# flush a range of addresses from the TLB153# - void __flush_tlb_range(unsigned long contextid [GR8],154# unsigned long start [GR9],155# unsigned long end [GR10])156#157###############################################################################158.globl __flush_tlb_range159.type __flush_tlb_range,@function160__flush_tlb_range:161# kill cached PGE value162setlos #0xffffffff,gr4163movgs gr4,scr0164movgs gr4,scr1165166# specify the context we want to flush167movgs gr8,tplr168169# round the start down to beginning of TLB line and end up to beginning of next TLB line170setlos.p #~(PAGE_SIZE-1),gr5171setlos #PAGE_SIZE,gr6172subi.p gr10,#1,gr10173and gr9,gr5,gr9174and gr10,gr5,gr101752:176tlbpr gr9,gr0,#5,#0177subcc.p gr9,gr10,gr0,icc0178add gr9,gr6,gr9179bne icc0,#0,2b ; most likely a 1-page flush180181bralr182183.size __flush_tlb_range, .-__flush_tlb_range184185186