#ifndef _ASM_IA64_CACHE_H1#define _ASM_IA64_CACHE_H234/*5* Copyright (C) 1998-2000 Hewlett-Packard Co6* David Mosberger-Tang <[email protected]>7*/89/* Bytes per L1 (data) cache line. */10#define L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT11#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)1213#ifdef CONFIG_SMP14# define SMP_CACHE_SHIFT L1_CACHE_SHIFT15# define SMP_CACHE_BYTES L1_CACHE_BYTES16#else17/*18* The "aligned" directive can only _increase_ alignment, so this is19* safe and provides an easy way to avoid wasting space on a20* uni-processor:21*/22# define SMP_CACHE_SHIFT 323# define SMP_CACHE_BYTES (1 << 3)24#endif2526#define __read_mostly __attribute__((__section__(".data..read_mostly")))2728#endif /* _ASM_IA64_CACHE_H */293031