Path: blob/master/arch/ia64/include/asm/intrinsics.h
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#ifndef _ASM_IA64_INTRINSICS_H1#define _ASM_IA64_INTRINSICS_H23/*4* Compiler-dependent intrinsics.5*6* Copyright (C) 2002-2003 Hewlett-Packard Co7* David Mosberger-Tang <[email protected]>8*/910#ifndef __ASSEMBLY__1112#include <linux/types.h>13/* include compiler specific intrinsics */14#include <asm/ia64regs.h>15#ifdef __INTEL_COMPILER16# include <asm/intel_intrin.h>17#else18# include <asm/gcc_intrin.h>19#endif2021#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)2223#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \24do { \25ia64_native_set_rr(0x0000000000000000UL, (val0)); \26ia64_native_set_rr(0x2000000000000000UL, (val1)); \27ia64_native_set_rr(0x4000000000000000UL, (val2)); \28ia64_native_set_rr(0x6000000000000000UL, (val3)); \29ia64_native_set_rr(0x8000000000000000UL, (val4)); \30} while (0)3132/*33* Force an unresolved reference if someone tries to use34* ia64_fetch_and_add() with a bad value.35*/36extern unsigned long __bad_size_for_ia64_fetch_and_add (void);37extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);3839#define IA64_FETCHADD(tmp,v,n,sz,sem) \40({ \41switch (sz) { \42case 4: \43tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \44break; \45\46case 8: \47tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \48break; \49\50default: \51__bad_size_for_ia64_fetch_and_add(); \52} \53})5455#define ia64_fetchadd(i,v,sem) \56({ \57__u64 _tmp; \58volatile __typeof__(*(v)) *_v = (v); \59/* Can't use a switch () here: gcc isn't always smart enough for that... */ \60if ((i) == -16) \61IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \62else if ((i) == -8) \63IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \64else if ((i) == -4) \65IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \66else if ((i) == -1) \67IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \68else if ((i) == 1) \69IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \70else if ((i) == 4) \71IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \72else if ((i) == 8) \73IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \74else if ((i) == 16) \75IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \76else \77_tmp = __bad_increment_for_ia64_fetch_and_add(); \78(__typeof__(*(v))) (_tmp); /* return old value */ \79})8081#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */8283/*84* This function doesn't exist, so you'll get a linker error if85* something tries to do an invalid xchg().86*/87extern void ia64_xchg_called_with_bad_pointer (void);8889#define __xchg(x,ptr,size) \90({ \91unsigned long __xchg_result; \92\93switch (size) { \94case 1: \95__xchg_result = ia64_xchg1((__u8 *)ptr, x); \96break; \97\98case 2: \99__xchg_result = ia64_xchg2((__u16 *)ptr, x); \100break; \101\102case 4: \103__xchg_result = ia64_xchg4((__u32 *)ptr, x); \104break; \105\106case 8: \107__xchg_result = ia64_xchg8((__u64 *)ptr, x); \108break; \109default: \110ia64_xchg_called_with_bad_pointer(); \111} \112__xchg_result; \113})114115#define xchg(ptr,x) \116((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))117118/*119* Atomic compare and exchange. Compare OLD with MEM, if identical,120* store NEW in MEM. Return the initial value in MEM. Success is121* indicated by comparing RETURN with OLD.122*/123124#define __HAVE_ARCH_CMPXCHG 1125126/*127* This function doesn't exist, so you'll get a linker error128* if something tries to do an invalid cmpxchg().129*/130extern long ia64_cmpxchg_called_with_bad_pointer (void);131132#define ia64_cmpxchg(sem,ptr,old,new,size) \133({ \134__u64 _o_, _r_; \135\136switch (size) { \137case 1: _o_ = (__u8 ) (long) (old); break; \138case 2: _o_ = (__u16) (long) (old); break; \139case 4: _o_ = (__u32) (long) (old); break; \140case 8: _o_ = (__u64) (long) (old); break; \141default: break; \142} \143switch (size) { \144case 1: \145_r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \146break; \147\148case 2: \149_r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \150break; \151\152case 4: \153_r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \154break; \155\156case 8: \157_r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \158break; \159\160default: \161_r_ = ia64_cmpxchg_called_with_bad_pointer(); \162break; \163} \164(__typeof__(old)) _r_; \165})166167#define cmpxchg_acq(ptr, o, n) \168ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))169#define cmpxchg_rel(ptr, o, n) \170ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))171172/* for compatibility with other platforms: */173#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))174#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))175176#define cmpxchg_local cmpxchg177#define cmpxchg64_local cmpxchg64178179#ifdef CONFIG_IA64_DEBUG_CMPXCHG180# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;181# define CMPXCHG_BUGCHECK(v) \182do { \183if (_cmpxchg_bugcheck_count-- <= 0) { \184void *ip; \185extern int printk(const char *fmt, ...); \186ip = (void *) ia64_getreg(_IA64_REG_IP); \187printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \188break; \189} \190} while (0)191#else /* !CONFIG_IA64_DEBUG_CMPXCHG */192# define CMPXCHG_BUGCHECK_DECL193# define CMPXCHG_BUGCHECK(v)194#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */195196#endif197198#ifdef __KERNEL__199#include <asm/paravirt_privop.h>200#endif201202#ifndef __ASSEMBLY__203#if defined(CONFIG_PARAVIRT) && defined(__KERNEL__)204#ifdef ASM_SUPPORTED205# define IA64_INTRINSIC_API(name) paravirt_ ## name206#else207# define IA64_INTRINSIC_API(name) pv_cpu_ops.name208#endif209#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name210#else211#define IA64_INTRINSIC_API(name) ia64_native_ ## name212#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name213#endif214215/************************************************/216/* Instructions paravirtualized for correctness */217/************************************************/218/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */219/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"220* is not currently used (though it may be in a long-format VHPT system!)221*/222#define ia64_fc IA64_INTRINSIC_API(fc)223#define ia64_thash IA64_INTRINSIC_API(thash)224#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)225#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)226227228/************************************************/229/* Instructions paravirtualized for performance */230/************************************************/231#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)232#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)233#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)234#define ia64_setreg IA64_INTRINSIC_API(setreg)235#define ia64_set_rr IA64_INTRINSIC_API(set_rr)236#define ia64_get_rr IA64_INTRINSIC_API(get_rr)237#define ia64_ptcga IA64_INTRINSIC_API(ptcga)238#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)239#define ia64_intrin_local_irq_restore \240IA64_INTRINSIC_API(intrin_local_irq_restore)241#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)242243#endif /* !__ASSEMBLY__ */244245#endif /* _ASM_IA64_INTRINSICS_H */246247248