/*1* linux/arch/ia64/kernel/irq.c2*3* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar4*5* This file contains the code used by various IRQ handling routines:6* asking for different IRQs should be done through these routines7* instead of just grabbing them. Thus setups with different IRQ numbers8* shouldn't result in any weird surprises, and installing new handlers9* should be easier.10*11* Copyright (C) Ashok Raj<[email protected]>, Intel Corporation 200412*13* 4/14/2004: Added code to handle cpu migration and do safe irq14* migration without losing interrupts for iosapic15* architecture.16*/1718#include <asm/delay.h>19#include <asm/uaccess.h>20#include <linux/module.h>21#include <linux/seq_file.h>22#include <linux/interrupt.h>23#include <linux/kernel_stat.h>2425/*26* 'what should we do if we get a hw irq event on an illegal vector'.27* each architecture has to answer this themselves.28*/29void ack_bad_irq(unsigned int irq)30{31printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id());32}3334#ifdef CONFIG_IA64_GENERIC35ia64_vector __ia64_irq_to_vector(int irq)36{37return irq_cfg[irq].vector;38}3940unsigned int __ia64_local_vector_to_irq (ia64_vector vec)41{42return __get_cpu_var(vector_irq)[vec];43}44#endif4546/*47* Interrupt statistics:48*/4950atomic_t irq_err_count;5152/*53* /proc/interrupts printing:54*/55int arch_show_interrupts(struct seq_file *p, int prec)56{57seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));58return 0;59}6061#ifdef CONFIG_SMP62static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };6364void set_irq_affinity_info (unsigned int irq, int hwid, int redir)65{66if (irq < NR_IRQS) {67cpumask_copy(irq_get_irq_data(irq)->affinity,68cpumask_of(cpu_logical_id(hwid)));69irq_redir[irq] = (char) (redir & 0xff);70}71}7273bool is_affinity_mask_valid(const struct cpumask *cpumask)74{75if (ia64_platform_is("sn2")) {76/* Only allow one CPU to be specified in the smp_affinity mask */77if (cpumask_weight(cpumask) != 1)78return false;79}80return true;81}8283#endif /* CONFIG_SMP */8485#ifdef CONFIG_HOTPLUG_CPU86unsigned int vectors_in_migration[NR_IRQS];8788/*89* Since cpu_online_mask is already updated, we just need to check for90* affinity that has zeros91*/92static void migrate_irqs(void)93{94int irq, new_cpu;9596for (irq=0; irq < NR_IRQS; irq++) {97struct irq_desc *desc = irq_to_desc(irq);98struct irq_data *data = irq_desc_get_irq_data(desc);99struct irq_chip *chip = irq_data_get_irq_chip(data);100101if (irqd_irq_disabled(data))102continue;103104/*105* No handling for now.106* TBD: Implement a disable function so we can now107* tell CPU not to respond to these local intr sources.108* such as ITV,CPEI,MCA etc.109*/110if (irqd_is_per_cpu(data))111continue;112113if (cpumask_any_and(data->affinity, cpu_online_mask)114>= nr_cpu_ids) {115/*116* Save it for phase 2 processing117*/118vectors_in_migration[irq] = irq;119120new_cpu = cpumask_any(cpu_online_mask);121122/*123* Al three are essential, currently WARN_ON.. maybe panic?124*/125if (chip && chip->irq_disable &&126chip->irq_enable && chip->irq_set_affinity) {127chip->irq_disable(data);128chip->irq_set_affinity(data,129cpumask_of(new_cpu), false);130chip->irq_enable(data);131} else {132WARN_ON((!chip || !chip->irq_disable ||133!chip->irq_enable ||134!chip->irq_set_affinity));135}136}137}138}139140void fixup_irqs(void)141{142unsigned int irq;143extern void ia64_process_pending_intr(void);144extern volatile int time_keeper_id;145146/* Mask ITV to disable timer */147ia64_set_itv(1 << 16);148149/*150* Find a new timesync master151*/152if (smp_processor_id() == time_keeper_id) {153time_keeper_id = cpumask_first(cpu_online_mask);154printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id);155}156157/*158* Phase 1: Locate IRQs bound to this cpu and159* relocate them for cpu removal.160*/161migrate_irqs();162163/*164* Phase 2: Perform interrupt processing for all entries reported in165* local APIC.166*/167ia64_process_pending_intr();168169/*170* Phase 3: Now handle any interrupts not captured in local APIC.171* This is to account for cases that device interrupted during the time the172* rte was being disabled and re-programmed.173*/174for (irq=0; irq < NR_IRQS; irq++) {175if (vectors_in_migration[irq]) {176struct pt_regs *old_regs = set_irq_regs(NULL);177178vectors_in_migration[irq]=0;179generic_handle_irq(irq);180set_irq_regs(old_regs);181}182}183184/*185* Now let processor die. We do irq disable and max_xtp() to186* ensure there is no more interrupts routed to this processor.187* But the local timer interrupt can have 1 pending which we188* take care in timer_interrupt().189*/190max_xtp();191local_irq_disable();192}193#endif194195196