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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/ia64/sn/kernel/pio_phys.S
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/*

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 * This file is subject to the terms and conditions of the GNU General Public

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 * License.  See the file "COPYING" in the main directory of this archive

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 * for more details.

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 *

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 * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.

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 *

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 * This file contains macros used to access MMR registers via

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 * uncached physical addresses.

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 *      pio_phys_read_mmr  - read an MMR

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 *      pio_phys_write_mmr - write an MMR

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 *      pio_atomic_phys_write_mmrs - atomically write 1 or 2 MMRs with psr.ic=0

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 *              Second MMR will be skipped if address is NULL

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 *

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 * Addresses passed to these routines should be uncached physical addresses

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 * 	ie., 0x80000....

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 */

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#include <asm/asmmacro.h>

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#include <asm/page.h>

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GLOBAL_ENTRY(pio_phys_read_mmr)

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	.prologue

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	.regstk 1,0,0,0

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	.body

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	mov r2=psr

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	rsm psr.i | psr.dt

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	;;

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	srlz.d

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	ld8.acq r8=[r32]

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	;;

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	mov psr.l=r2;;

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	srlz.d

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	br.ret.sptk.many rp

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END(pio_phys_read_mmr)

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GLOBAL_ENTRY(pio_phys_write_mmr)

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	.prologue

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	.regstk 2,0,0,0

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	.body

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	mov r2=psr

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	rsm psr.i | psr.dt

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	;;

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	srlz.d

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	st8.rel [r32]=r33

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	;;

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	mov psr.l=r2;;

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	srlz.d

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	br.ret.sptk.many rp

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END(pio_phys_write_mmr)

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GLOBAL_ENTRY(pio_atomic_phys_write_mmrs)

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	.prologue

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	.regstk 4,0,0,0

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	.body

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	mov r2=psr

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	cmp.ne p9,p0=r34,r0;

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	rsm psr.i | psr.dt | psr.ic

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	;;

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	srlz.d

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	st8.rel [r32]=r33

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(p9)	st8.rel [r34]=r35

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	;;

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	mov psr.l=r2;;

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	srlz.d

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	br.ret.sptk.many rp

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END(pio_atomic_phys_write_mmrs)

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