Path: blob/master/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h
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#ifndef _M32700UT_M32700UT_LCD_H1#define _M32700UT_M32700UT_LCD_H23/*4* include/asm-m32r/m32700ut/m32700ut_lcd.h5*6* M32700UT-LCD board7*8* Copyright (c) 2002 Takeo Takahashi9*10* This file is subject to the terms and conditions of the GNU General11* Public License. See the file "COPYING" in the main directory of12* this archive for more details.13*/1415#ifndef __ASSEMBLY__16/*17* C functions use non-cache address.18*/19#define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)20#else21#define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)22#endif /* __ASSEMBLY__ */2324/*25* ICU26*/27#define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1)28#define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2)29#define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3)30#define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4)31#define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16)32#define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17)33#define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18)34#define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19)35#define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21)3637#define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)38#define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000)39#define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK)40#define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0)41#define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK)42#define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)43#define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)44#define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)45#define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)46#define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)47#define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)48#define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)49#define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)50#define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)51#define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036)52#define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a)5354#endif /* _M32700UT_M32700UT_LCD_H */555657