Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/m68k/include/asm/MC68332.h
10820 views
1


2
/* include/asm-m68knommu/MC68332.h: '332 control registers

3
 *

4
 * Copyright (C) 1998  Kenneth Albanowski <[email protected]>,

5
 *

6
 */

7


8
#ifndef _MC68332_H_

9
#define _MC68332_H_

10


11
#define BYTE_REF(addr) (*((volatile unsigned char*)addr))

12
#define WORD_REF(addr) (*((volatile unsigned short*)addr))

13


14
#define PORTE_ADDR	0xfffa11

15
#define PORTE	BYTE_REF(PORTE_ADDR)

16
#define DDRE_ADDR	0xfffa15

17
#define DDRE	BYTE_REF(DDRE_ADDR)

18
#define PEPAR_ADDR	0xfffa17

19
#define PEPAR	BYTE_REF(PEPAR_ADDR)

20


21
#define PORTF_ADDR	0xfffa19

22
#define PORTF	BYTE_REF(PORTF_ADDR)

23
#define DDRF_ADDR	0xfffa1d

24
#define DDRF	BYTE_REF(DDRF_ADDR)

25
#define PFPAR_ADDR	0xfffa1f

26
#define PFPAR	BYTE_REF(PFPAR_ADDR)

27


28
#define PORTQS_ADDR	0xfffc15

29
#define PORTQS	BYTE_REF(PORTQS_ADDR)

30
#define DDRQS_ADDR	0xfffc17

31
#define DDRQS	BYTE_REF(DDRQS_ADDR)

32
#define PQSPAR_ADDR	0xfffc16

33
#define PQSPAR	BYTE_REF(PQSPAR_ADDR)

34


35
#define CSPAR0_ADDR 0xFFFA44

36
#define CSPAR0 WORD_REF(CSPAR0_ADDR)

37
#define CSPAR1_ADDR 0xFFFA46

38
#define CSPAR1 WORD_REF(CSPAR1_ADDR)

39
#define CSARBT_ADDR 0xFFFA48

40
#define CSARBT WORD_REF(CSARBT_ADDR)

41
#define CSOPBT_ADDR 0xFFFA4A

42
#define CSOPBT WORD_REF(CSOPBT_ADDR)

43
#define CSBAR0_ADDR 0xFFFA4C

44
#define CSBAR0 WORD_REF(CSBAR0_ADDR)

45
#define CSOR0_ADDR 0xFFFA4E

46
#define CSOR0 WORD_REF(CSOR0_ADDR)

47
#define CSBAR1_ADDR 0xFFFA50

48
#define CSBAR1 WORD_REF(CSBAR1_ADDR)

49
#define CSOR1_ADDR 0xFFFA52

50
#define CSOR1 WORD_REF(CSOR1_ADDR)

51
#define CSBAR2_ADDR 0xFFFA54

52
#define CSBAR2 WORD_REF(CSBAR2_ADDR)

53
#define CSOR2_ADDR 0xFFFA56

54
#define CSOR2 WORD_REF(CSOR2_ADDR)

55
#define CSBAR3_ADDR 0xFFFA58

56
#define CSBAR3 WORD_REF(CSBAR3_ADDR)

57
#define CSOR3_ADDR 0xFFFA5A

58
#define CSOR3 WORD_REF(CSOR3_ADDR)

59
#define CSBAR4_ADDR 0xFFFA5C

60
#define CSBAR4 WORD_REF(CSBAR4_ADDR)

61
#define CSOR4_ADDR 0xFFFA5E

62
#define CSOR4 WORD_REF(CSOR4_ADDR)

63
#define CSBAR5_ADDR 0xFFFA60

64
#define CSBAR5 WORD_REF(CSBAR5_ADDR)

65
#define CSOR5_ADDR 0xFFFA62

66
#define CSOR5 WORD_REF(CSOR5_ADDR)

67
#define CSBAR6_ADDR 0xFFFA64

68
#define CSBAR6 WORD_REF(CSBAR6_ADDR)

69
#define CSOR6_ADDR 0xFFFA66

70
#define CSOR6 WORD_REF(CSOR6_ADDR)

71
#define CSBAR7_ADDR 0xFFFA68

72
#define CSBAR7 WORD_REF(CSBAR7_ADDR)

73
#define CSOR7_ADDR 0xFFFA6A

74
#define CSOR7 WORD_REF(CSOR7_ADDR)

75
#define CSBAR8_ADDR 0xFFFA6C

76
#define CSBAR8 WORD_REF(CSBAR8_ADDR)

77
#define CSOR8_ADDR 0xFFFA6E

78
#define CSOR8 WORD_REF(CSOR8_ADDR)

79
#define CSBAR9_ADDR 0xFFFA70

80
#define CSBAR9 WORD_REF(CSBAR9_ADDR)

81
#define CSOR9_ADDR 0xFFFA72

82
#define CSOR9 WORD_REF(CSOR9_ADDR)

83
#define CSBAR10_ADDR 0xFFFA74

84
#define CSBAR10 WORD_REF(CSBAR10_ADDR)

85
#define CSOR10_ADDR 0xFFFA76

86
#define CSOR10 WORD_REF(CSOR10_ADDR)

87


88
#define CSOR_MODE_ASYNC	0x0000

89
#define CSOR_MODE_SYNC	0x8000

90
#define CSOR_MODE_MASK	0x8000

91
#define CSOR_BYTE_DISABLE	0x0000

92
#define CSOR_BYTE_UPPER		0x4000

93
#define CSOR_BYTE_LOWER		0x2000

94
#define CSOR_BYTE_BOTH		0x6000

95
#define CSOR_BYTE_MASK		0x6000

96
#define CSOR_RW_RSVD		0x0000

97
#define CSOR_RW_READ		0x0800

98
#define CSOR_RW_WRITE		0x1000

99
#define CSOR_RW_BOTH		0x1800

100
#define CSOR_RW_MASK		0x1800

101
#define CSOR_STROBE_DS		0x0400

102
#define CSOR_STROBE_AS		0x0000

103
#define CSOR_STROBE_MASK	0x0400

104
#define CSOR_DSACK_WAIT(x)	(wait << 6)

105
#define CSOR_DSACK_FTERM	(14 << 6)

106
#define CSOR_DSACK_EXTERNAL	(15 << 6)

107
#define CSOR_DSACK_MASK		0x03c0

108
#define CSOR_SPACE_CPU		0x0000

109
#define CSOR_SPACE_USER		0x0010

110
#define CSOR_SPACE_SU		0x0020

111
#define CSOR_SPACE_BOTH		0x0030

112
#define CSOR_SPACE_MASK		0x0030

113
#define CSOR_IPL_ALL		0x0000

114
#define CSOR_IPL_PRIORITY(x)	(x << 1)

115
#define CSOR_IPL_MASK		0x000e

116
#define CSOR_AVEC_ON		0x0001

117
#define CSOR_AVEC_OFF		0x0000

118
#define CSOR_AVEC_MASK		0x0001

119


120
#define CSBAR_ADDR(x)		((addr >> 11) << 3) 

121
#define CSBAR_ADDR_MASK		0xfff8

122
#define CSBAR_BLKSIZE_2K	0x0000

123
#define CSBAR_BLKSIZE_8K	0x0001

124
#define CSBAR_BLKSIZE_16K	0x0002

125
#define CSBAR_BLKSIZE_64K	0x0003

126
#define CSBAR_BLKSIZE_128K	0x0004

127
#define CSBAR_BLKSIZE_256K	0x0005

128
#define CSBAR_BLKSIZE_512K	0x0006

129
#define CSBAR_BLKSIZE_1M	0x0007

130
#define CSBAR_BLKSIZE_MASK	0x0007

131


132
#define CSPAR_DISC	0

133
#define CSPAR_ALT	1

134
#define CSPAR_CS8	2

135
#define CSPAR_CS16	3

136
#define CSPAR_MASK	3

137


138
#define CSPAR0_CSBOOT(x) (x << 0)

139
#define CSPAR0_CS0(x)	(x << 2)

140
#define CSPAR0_CS1(x)	(x << 4)

141
#define CSPAR0_CS2(x)	(x << 6)

142
#define CSPAR0_CS3(x)	(x << 8)

143
#define CSPAR0_CS4(x)	(x << 10)

144
#define CSPAR0_CS5(x)	(x << 12)

145


146
#define CSPAR1_CS6(x)	(x << 0)

147
#define CSPAR1_CS7(x)	(x << 2)

148
#define CSPAR1_CS8(x)	(x << 4)

149
#define CSPAR1_CS9(x)	(x << 6)

150
#define CSPAR1_CS10(x)	(x << 8)

151


152
#endif

153


154