/*1* fp_cond.S2*3* Copyright Roman Zippel, 1997. All rights reserved.4*5* Redistribution and use in source and binary forms, with or without6* modification, are permitted provided that the following conditions7* are met:8* 1. Redistributions of source code must retain the above copyright9* notice, and the entire permission notice in its entirety,10* including the disclaimer of warranties.11* 2. Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in the13* documentation and/or other materials provided with the distribution.14* 3. The name of the author may not be used to endorse or promote15* products derived from this software without specific prior16* written permission.17*18* ALTERNATIVELY, this product may be distributed under the terms of19* the GNU General Public License, in which case the provisions of the GPL are20* required INSTEAD OF the above restrictions. (This clause is21* necessary due to a potential bad interaction between the GPL and22* the restrictions contained in a BSD-style copyright.)23*24* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED25* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES26* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE27* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,28* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES29* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR30* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)31* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,32* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)33* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED34* OF THE POSSIBILITY OF SUCH DAMAGE.35*/3637#include "fp_emu.h"38#include "fp_decode.h"3940.globl fp_fscc, fp_fbccw, fp_fbccl4142#ifdef FPU_EMU_DEBUG43fp_fnop:44printf PDECODE,"fnop\n"45jra fp_end46#else47#define fp_fnop fp_end48#endif4950fp_fbccw:51tst.w %d252jeq fp_fnop53printf PDECODE,"fbccw "54fp_get_pc %a055lea (-2,%a0,%d2.w),%a056jra 1f5758fp_fbccl:59printf PDECODE,"fbccl "60fp_get_pc %a061move.l %d2,%d062swap %d063fp_get_instr_word %d0,fp_err_ua164lea (-2,%a0,%d0.l),%a0651: printf PDECODE,"%x",1,%a066move.l %d2,%d067swap %d068jsr fp_compute_cond69tst.l %d070jeq 1f71fp_put_pc %a0,1721: printf PDECODE,"\n"73jra fp_end7475fp_fdbcc:76printf PDECODE,"fdbcc "77fp_get_pc %a1 | calculate new pc78fp_get_instr_word %d0,fp_err_ua179add.w %d0,%a180fp_decode_addr_reg81printf PDECODE,"d%d,%x\n",2,%d0,%a182swap %d1 | test condition in %d183tst.w %d184jne 2f85move.l %d0,%d186jsr fp_get_data_reg87subq.w #1,%d088jcs 1f89fp_put_pc %a1,1901: jsr fp_put_data_reg912: jra fp_end9293| set flags for decode macros for fs<cc>94do_fscc=195do_no_pc_mode=19697fp_fscc:98printf PDECODE,"fscc "99move.l %d2,%d0100jsr fp_compute_cond101move.w %d0,%d1102swap %d1103104| decode addressing mode105fp_decode_addr_mode106107.long fp_data, fp_fdbcc108.long fp_indirect, fp_postinc109.long fp_predecr, fp_disp16110.long fp_extmode0, fp_extmode1111112| addressing mode: data register direct113fp_data:114fp_mode_data_direct115move.w %d0,%d1 | save register nr116jsr fp_get_data_reg117swap %d1118move.b %d1,%d0119swap %d1120jsr fp_put_data_reg121printf PDECODE,"\n"122jra fp_end123124fp_indirect:125fp_mode_addr_indirect126jra fp_do_scc127128fp_postinc:129fp_mode_addr_indirect_postinc130jra fp_do_scc131132fp_predecr:133fp_mode_addr_indirect_predec134jra fp_do_scc135136fp_disp16:137fp_mode_addr_indirect_disp16138jra fp_do_scc139140fp_extmode0:141fp_mode_addr_indirect_extmode0142jra fp_do_scc143144fp_extmode1:145bfextu %d2{#13,#3},%d0146jmp ([0f:w,%pc,%d0*4])147148.align 41490:150.long fp_absolute_short, fp_absolute_long151.long fp_ill, fp_ill | NOTE: jump here to ftrap.x152.long fp_ill, fp_ill153.long fp_ill, fp_ill154155fp_absolute_short:156fp_mode_abs_short157jra fp_do_scc158159fp_absolute_long:160fp_mode_abs_long161| jra fp_do_scc162163fp_do_scc:164swap %d1165putuser.b %d1,(%a0),fp_err_ua1,%a0166printf PDECODE,"\n"167jra fp_end168169170#define tst_NAN btst #24,%d1171#define tst_Z btst #26,%d1172#define tst_N btst #27,%d1173174fp_compute_cond:175move.l (FPD_FPSR,FPDATA),%d1176btst #4,%d0177jeq 1f178tst_NAN179jeq 1f180bset #15,%d1181bset #7,%d1182move.l %d1,(FPD_FPSR,FPDATA)1831: and.w #0xf,%d0184jmp ([0f:w,%pc,%d0.w*4])185186.align 41870:188.long fp_f , fp_eq , fp_ogt, fp_oge189.long fp_olt, fp_ole, fp_ogl, fp_or190.long fp_un , fp_ueq, fp_ugt, fp_uge191.long fp_ult, fp_ule, fp_ne , fp_t192193fp_f:194moveq #0,%d0195rts196197fp_eq:198moveq #0,%d0199tst_Z200jeq 1f201moveq #-1,%d02021: rts203204fp_ogt:205moveq #0,%d0206tst_NAN207jne 1f208tst_Z209jne 1f210tst_N211jne 1f212moveq #-1,%d02131: rts214215fp_oge:216moveq #-1,%d0217tst_Z218jne 2f219tst_NAN220jne 1f221tst_N222jeq 2f2231: moveq #0,%d02242: rts225226fp_olt:227moveq #0,%d0228tst_NAN229jne 1f230tst_Z231jne 1f232tst_N233jeq 1f234moveq #-1,%d02351: rts236237fp_ole:238moveq #-1,%d0239tst_Z240jne 2f241tst_NAN242jne 1f243tst_N244jne 2f2451: moveq #0,%d02462: rts247248fp_ogl:249moveq #0,%d0250tst_NAN251jne 1f252tst_Z253jne 1f254moveq #-1,%d02551: rts256257fp_or:258moveq #0,%d0259tst_NAN260jne 1f261moveq #-1,%d02621: rts263264fp_un:265moveq #0,%d0266tst_NAN267jeq 1f268moveq #-1,%d0269rts270271fp_ueq:272moveq #-1,%d0273tst_NAN274jne 1f275tst_Z276jne 1f277moveq #0,%d02781: rts279280fp_ugt:281moveq #-1,%d0282tst_NAN283jne 2f284tst_N285jne 1f286tst_Z287jeq 2f2881: moveq #0,%d02892: rts290291fp_uge:292moveq #-1,%d0293tst_NAN294jne 1f295tst_Z296jne 1f297tst_N298jeq 1f299moveq #0,%d03001: rts301302fp_ult:303moveq #-1,%d0304tst_NAN305jne 2f306tst_Z307jne 1f308tst_N309jne 2f3101: moveq #0,%d03112: rts312313fp_ule:314moveq #-1,%d0315tst_NAN316jne 1f317tst_Z318jne 1f319tst_N320jne 1f321moveq #0,%d03221: rts323324fp_ne:325moveq #0,%d0326tst_Z327jne 1f328moveq #-1,%d03291: rts330331fp_t:332moveq #-1,%d0333rts334335336