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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/m68k/platform/5206e/config.c
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/***************************************************************************/

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/*

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 *	linux/arch/m68knommu/platform/5206e/config.c

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 *

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 *	Copyright (C) 1999-2002, Greg Ungerer ([email protected])

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 */

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/***************************************************************************/

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#include <linux/kernel.h>

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#include <linux/param.h>

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#include <linux/init.h>

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#include <linux/io.h>

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#include <asm/machdep.h>

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#include <asm/coldfire.h>

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#include <asm/mcfsim.h>

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#include <asm/mcfuart.h>

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#include <asm/mcfdma.h>

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/***************************************************************************/

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static struct mcf_platform_uart m5206e_uart_platform[] = {

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	{

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		.mapbase	= MCF_MBAR + MCFUART_BASE1,

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		.irq		= 73,

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	},

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	{

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		.mapbase 	= MCF_MBAR + MCFUART_BASE2,

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		.irq		= 74,

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	},

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	{ },

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};

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static struct platform_device m5206e_uart = {

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	.name			= "mcfuart",

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	.id			= 0,

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	.dev.platform_data	= m5206e_uart_platform,

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};

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static struct platform_device *m5206e_devices[] __initdata = {

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	&m5206e_uart,

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};

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/***************************************************************************/

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static void __init m5206e_uart_init_line(int line, int irq)

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{

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	if (line == 0) {

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		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

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		writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);

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		mcf_mapirq2imr(irq, MCFINTC_UART0);

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	} else if (line == 1) {

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		writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

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		writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);

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		mcf_mapirq2imr(irq, MCFINTC_UART1);

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	}

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}

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static void __init m5206e_uarts_init(void)

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{

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	const int nrlines = ARRAY_SIZE(m5206e_uart_platform);

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	int line;

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	for (line = 0; (line < nrlines); line++)

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		m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);

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}

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/***************************************************************************/

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static void __init m5206e_timers_init(void)

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{

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	/* Timer1 is always used as system timer */

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	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,

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		MCF_MBAR + MCFSIM_TIMER1ICR);

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	mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);

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#ifdef CONFIG_HIGHPROFILE

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	/* Timer2 is to be used as a high speed profile timer  */

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	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,

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		MCF_MBAR + MCFSIM_TIMER2ICR);

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	mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);

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#endif

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}

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/***************************************************************************/

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void m5206e_cpu_reset(void)

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{

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	local_irq_disable();

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	/* Set watchdog to soft reset, and enabled */

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	__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);

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	for (;;)

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		/* wait for watchdog to timeout */;

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}

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/***************************************************************************/

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void __init config_BSP(char *commandp, int size)

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{

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#if defined(CONFIG_NETtel)

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	/* Copy command line from FLASH to local buffer... */

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	memcpy(commandp, (char *) 0xf0004000, size);

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	commandp[size-1] = 0;

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#endif /* CONFIG_NETtel */

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	mach_reset = m5206e_cpu_reset;

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	m5206e_timers_init();

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	m5206e_uarts_init();

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	/* Only support the external interrupts on their primary level */

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	mcf_mapirq2imr(25, MCFINTC_EINT1);

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	mcf_mapirq2imr(28, MCFINTC_EINT4);

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	mcf_mapirq2imr(31, MCFINTC_EINT7);

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}

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/***************************************************************************/

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static int __init init_BSP(void)

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{

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	platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));

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	return 0;

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}

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arch_initcall(init_BSP);

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/***************************************************************************/

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