Path: blob/master/arch/m68k/platform/68328/head-ram.S
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1.global __main2.global __rom_start34.global _rambase5.global _ramstart67.global splash_bits8.global _start9.global _stext10.global _edata1112#define DEBUG13#define ROM_OFFSET 0x10C0000014#define STACK_GAURD 0x101516.text1718_start:19_stext:20movew #0x2700, %sr /* Exceptions off! */2122#if 023/* Init chip registers. uCsimm specific */24moveb #0x00, 0xfffffb0b /* Watchdog off */25moveb #0x10, 0xfffff000 /* SCR */2627movew #0x2400, 0xfffff200 /* PLLCR */28movew #0x0123, 0xfffff202 /* PLLFSR */2930moveb #0x00, 0xfffff40b /* enable chip select */31moveb #0x00, 0xfffff423 /* enable /DWE */32moveb #0x08, 0xfffffd0d /* disable hardmap */33moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */3435movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */36movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */3738movew #0x8f00, 0xfffffc00 /* DRAM configuration */39movew #0x9667, 0xfffffc02 /* DRAM control */40movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */41movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */4243moveb #0x40, 0xfffff300 /* IVR */44movel #0x007FFFFF, %d0 /* IMR */45movel %d0, 0xfffff3044647moveb 0xfffff42b, %d048andb #0xe0, %d049moveb %d0, 0xfffff42b5051moveb #0x08, 0xfffff907 /* Ignore CTS */52movew #0x010b, 0xfffff902 /* BAUD to 9600 */53movew #0xe100, 0xfffff900 /* enable */54#endif5556movew #16384, %d0 /* PLL settle wait loop */57L0:58subw #1, %d059bne L060#ifdef DEBUG61moveq #70, %d7 /* 'F' */62moveb %d7,0xfffff907 /* No absolute addresses */63pclp1:64movew 0xfffff906, %d765andw #0x2000, %d766beq pclp167#endif /* DEBUG */6869#ifdef DEBUG70moveq #82, %d7 /* 'R' */71moveb %d7,0xfffff907 /* No absolute addresses */72pclp3:73movew 0xfffff906, %d774andw #0x2000, %d775beq pclp376#endif /* DEBUG */77moveal #0x007ffff0, %ssp78moveal #_sbss, %a079moveal #_ebss, %a18081/* Copy 0 to %a0 until %a0 >= %a1 */82L1:83movel #0, %a0@+84cmpal %a0, %a185bhi L18687#ifdef DEBUG88moveq #67, %d7 /* 'C' */89jsr putc90#endif /* DEBUG */9192pea 093pea env94pea %sp@(4)95pea 09697#ifdef DEBUG98moveq #70, %d7 /* 'F' */99jsr putc100#endif /* DEBUG */101102lp:103jsr start_kernel104jmp lp105_exit:106107jmp _exit108109__main:110/* nothing */111rts112113#ifdef DEBUG114putc:115moveb %d7,0xfffff907116pclp:117movew 0xfffff906, %d7118andw #0x2000, %d7119beq pclp120rts121#endif /* DEBUG */122123.data124125/*126* Set up the usable of RAM stuff. Size of RAM is determined then127* an initial stack set up at the end.128*/129.align 4130_ramvec:131.long 0132_rambase:133.long 0134_ramstart:135.long 0136_ramend:137.long 0138139env:140.long 0141142143